JPH0556660B2 - - Google Patents
Info
- Publication number
- JPH0556660B2 JPH0556660B2 JP59195631A JP19563184A JPH0556660B2 JP H0556660 B2 JPH0556660 B2 JP H0556660B2 JP 59195631 A JP59195631 A JP 59195631A JP 19563184 A JP19563184 A JP 19563184A JP H0556660 B2 JPH0556660 B2 JP H0556660B2
- Authority
- JP
- Japan
- Prior art keywords
- collector
- transistor
- tab
- junction
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000758 substrate Substances 0.000 claims description 32
- 239000004065 semiconductor Substances 0.000 claims description 11
- 230000008878 coupling Effects 0.000 claims description 5
- 238000010168 coupling process Methods 0.000 claims description 5
- 238000005859 coupling reaction Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 239000000872 buffer Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/302—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/265—Current mirrors using bipolar transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Computer Hardware Design (AREA)
- Nonlinear Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Semiconductor Integrated Circuits (AREA)
- Amplifiers (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US55782683A | 1983-12-05 | 1983-12-05 | |
US557826 | 1983-12-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60124861A JPS60124861A (ja) | 1985-07-03 |
JPH0556660B2 true JPH0556660B2 (de) | 1993-08-20 |
Family
ID=24227040
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59195631A Granted JPS60124861A (ja) | 1983-12-05 | 1984-09-18 | Pn接合絶縁集積回路 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS60124861A (de) |
DE (1) | DE3444376A1 (de) |
FR (1) | FR2556133A1 (de) |
GB (1) | GB2150779B (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3615049C2 (de) * | 1986-05-03 | 1994-04-07 | Bosch Gmbh Robert | Integrierte Widerstandsanordnung mit Schutzelement gegen Verpolung und Über- bzw. Unterspannung |
JPS63274169A (ja) * | 1987-05-04 | 1988-11-11 | Rohm Co Ltd | 半導体装置 |
JP2642375B2 (ja) * | 1988-01-26 | 1997-08-20 | 株式会社東芝 | 半導体集積回路装置 |
JP2634679B2 (ja) * | 1990-03-12 | 1997-07-30 | シャープ株式会社 | Pnpトランジスタ回路 |
WO1998057375A1 (fr) | 1997-06-11 | 1998-12-17 | Seiko Epson Corporation | Composant a semi-conducteur, affichage a cristaux liquides et appareil electronique les comprenant |
DE10314151B4 (de) * | 2003-03-28 | 2008-04-24 | Infineon Technologies Ag | Halbleiterbauelementeanordnung und Verfahren zur Kompensation parasitärer Ströme |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3558267A (en) * | 1966-08-04 | 1971-01-26 | Du Pont | Method for dyeing high-temperature-resistant polyamides and polyimides |
US4028564A (en) * | 1971-09-22 | 1977-06-07 | Robert Bosch G.M.B.H. | Compensated monolithic integrated current source |
US4153909A (en) * | 1973-12-10 | 1979-05-08 | National Semiconductor Corporation | Gated collector lateral transistor structure and circuits using same |
GB2014387B (en) * | 1978-02-14 | 1982-05-19 | Motorola Inc | Differential to single-ended converter utilizing inverted transistors |
-
1984
- 1984-07-09 GB GB08417443A patent/GB2150779B/en not_active Expired
- 1984-09-18 JP JP59195631A patent/JPS60124861A/ja active Granted
- 1984-12-04 FR FR8418941A patent/FR2556133A1/fr active Pending
- 1984-12-05 DE DE19843444376 patent/DE3444376A1/de not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
FR2556133A1 (fr) | 1985-06-07 |
DE3444376A1 (de) | 1985-08-01 |
JPS60124861A (ja) | 1985-07-03 |
GB2150779A (en) | 1985-07-03 |
GB2150779B (en) | 1987-03-04 |
GB8417443D0 (en) | 1984-08-15 |
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