JPH0554697B2 - - Google Patents

Info

Publication number
JPH0554697B2
JPH0554697B2 JP60261483A JP26148385A JPH0554697B2 JP H0554697 B2 JPH0554697 B2 JP H0554697B2 JP 60261483 A JP60261483 A JP 60261483A JP 26148385 A JP26148385 A JP 26148385A JP H0554697 B2 JPH0554697 B2 JP H0554697B2
Authority
JP
Japan
Prior art keywords
insulating layer
polyimide insulating
polyimide
chip
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60261483A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62122258A (ja
Inventor
Shoji Nakakita
Hikari Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP60261483A priority Critical patent/JPS62122258A/ja
Publication of JPS62122258A publication Critical patent/JPS62122258A/ja
Priority to US07/259,319 priority patent/US4874721A/en
Publication of JPH0554697B2 publication Critical patent/JPH0554697B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W70/611—
    • H10W70/685—
    • H10W72/07236—
    • H10W72/07251—
    • H10W72/20—
    • H10W74/15—
    • H10W90/724—
    • H10W90/734—

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP60261483A 1985-11-11 1985-11-22 マルチチツプパツケ−ジ Granted JPS62122258A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP60261483A JPS62122258A (ja) 1985-11-22 1985-11-22 マルチチツプパツケ−ジ
US07/259,319 US4874721A (en) 1985-11-11 1988-10-18 Method of manufacturing a multichip package with increased adhesive strength

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60261483A JPS62122258A (ja) 1985-11-22 1985-11-22 マルチチツプパツケ−ジ

Publications (2)

Publication Number Publication Date
JPS62122258A JPS62122258A (ja) 1987-06-03
JPH0554697B2 true JPH0554697B2 (enExample) 1993-08-13

Family

ID=17362530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60261483A Granted JPS62122258A (ja) 1985-11-11 1985-11-22 マルチチツプパツケ−ジ

Country Status (1)

Country Link
JP (1) JPS62122258A (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0729158Y2 (ja) * 1987-08-10 1995-07-05 新日軽株式会社 通風ドア
JP2996510B2 (ja) * 1990-11-30 2000-01-11 株式会社日立製作所 電子回路基板
US5250843A (en) * 1991-03-27 1993-10-05 Integrated System Assemblies Corp. Multichip integrated circuit modules
WO1992017901A1 (en) * 1991-03-27 1992-10-15 Integrated System Assemblies Corporation Multichip integrated circuit module and method of fabrication
FR2675946B1 (fr) * 1991-04-25 1993-08-20 Sorep Procede de montage d'une puce a circuit integre sur un substrat de cablage.
US5841193A (en) * 1996-05-20 1998-11-24 Epic Technologies, Inc. Single chip modules, repairable multichip modules, and methods of fabrication thereof
KR101767108B1 (ko) 2010-12-15 2017-08-11 삼성전자주식회사 하이브리드 기판을 구비하는 반도체 패키지 및 그 제조방법

Also Published As

Publication number Publication date
JPS62122258A (ja) 1987-06-03

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