JPH0554200B2 - - Google Patents
Info
- Publication number
- JPH0554200B2 JPH0554200B2 JP58118278A JP11827883A JPH0554200B2 JP H0554200 B2 JPH0554200 B2 JP H0554200B2 JP 58118278 A JP58118278 A JP 58118278A JP 11827883 A JP11827883 A JP 11827883A JP H0554200 B2 JPH0554200 B2 JP H0554200B2
- Authority
- JP
- Japan
- Prior art keywords
- bubble memory
- magnetic bubble
- memory device
- loop
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000002950 deficient Effects 0.000 claims description 16
- 235000008331 Pinus X rigitaeda Nutrition 0.000 description 8
- 235000011613 Pinus brutia Nutrition 0.000 description 8
- 241000018646 Pinus brutia Species 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 241000208140 Acer Species 0.000 description 2
- 241001347978 Major minor Species 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000523 sample Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58118278A JPS6013386A (ja) | 1983-07-01 | 1983-07-01 | 磁気バブルメモリ装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58118278A JPS6013386A (ja) | 1983-07-01 | 1983-07-01 | 磁気バブルメモリ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6013386A JPS6013386A (ja) | 1985-01-23 |
JPH0554200B2 true JPH0554200B2 (enrdf_load_stackoverflow) | 1993-08-11 |
Family
ID=14732695
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58118278A Granted JPS6013386A (ja) | 1983-07-01 | 1983-07-01 | 磁気バブルメモリ装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6013386A (enrdf_load_stackoverflow) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5222601A (en) * | 1989-08-25 | 1993-06-29 | Fuji Photo Film Co., Ltd. | Package of rolled photosensitive material |
-
1983
- 1983-07-01 JP JP58118278A patent/JPS6013386A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6013386A (ja) | 1985-01-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5935263A (en) | Method and apparatus for memory array compressed data testing | |
US6519675B1 (en) | Two step memory device command buffer apparatus and method and memory devices and computer systems using same | |
US6014759A (en) | Method and apparatus for transferring test data from a memory array | |
US5226006A (en) | Write protection circuit for use with an electrically alterable non-volatile memory card | |
US6094704A (en) | Memory device with pipelined address path | |
US6175894B1 (en) | Memory device command buffer apparatus and method and memory devices and computer systems using same | |
JPH0785672A (ja) | 半導体メモリ回路 | |
US6826114B2 (en) | Data path reset circuit using clock enable signal, reset method, and semiconductor memory device including the data path reset circuit and adopting the reset method | |
JP3957008B2 (ja) | 半導体メモリデバイスの区別方法 | |
JPH0554200B2 (enrdf_load_stackoverflow) | ||
US4866662A (en) | Memory connected state detecting circuit | |
JP2616490B2 (ja) | 共有データ蓄積方式 | |
JPH04241296A (ja) | メモリ初期化方式 | |
JPH04248641A (ja) | メモリ制御装置 | |
JPS6244352B2 (enrdf_load_stackoverflow) | ||
JP2786061B2 (ja) | ディスク型記憶装置の制御装置 | |
JPH02302855A (ja) | メモリ制御装置 | |
JPH06175910A (ja) | メモリアクセス回路及びそのメモリアクセスタイミングの自動検知方法 | |
JPS63239545A (ja) | メモリエラ−検出回路 | |
JPH04243086A (ja) | 記憶装置 | |
JPS60179968A (ja) | デイスクキヤツシユのデ−タ保障方式 | |
JPH0561761A (ja) | 主記憶制御方式 | |
JPH0492290A (ja) | 半導体記憶装置 | |
JP2000259490A (ja) | 応答信号生成回路 | |
JPH0322060A (ja) | メモリエラー検出制御方式 |