JPH0548015B2 - - Google Patents

Info

Publication number
JPH0548015B2
JPH0548015B2 JP15764283A JP15764283A JPH0548015B2 JP H0548015 B2 JPH0548015 B2 JP H0548015B2 JP 15764283 A JP15764283 A JP 15764283A JP 15764283 A JP15764283 A JP 15764283A JP H0548015 B2 JPH0548015 B2 JP H0548015B2
Authority
JP
Japan
Prior art keywords
bits
bit
circuit
patterns
conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP15764283A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6048644A (ja
Inventor
Juichi Kojima
Shinichi Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP15764283A priority Critical patent/JPS6048644A/ja
Publication of JPS6048644A publication Critical patent/JPS6048644A/ja
Publication of JPH0548015B2 publication Critical patent/JPH0548015B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dc Digital Transmission (AREA)
JP15764283A 1983-08-29 1983-08-29 情報変換装置 Granted JPS6048644A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15764283A JPS6048644A (ja) 1983-08-29 1983-08-29 情報変換装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15764283A JPS6048644A (ja) 1983-08-29 1983-08-29 情報変換装置

Publications (2)

Publication Number Publication Date
JPS6048644A JPS6048644A (ja) 1985-03-16
JPH0548015B2 true JPH0548015B2 (cs) 1993-07-20

Family

ID=15654183

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15764283A Granted JPS6048644A (ja) 1983-08-29 1983-08-29 情報変換装置

Country Status (1)

Country Link
JP (1) JPS6048644A (cs)

Also Published As

Publication number Publication date
JPS6048644A (ja) 1985-03-16

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