JPH0542700B2 - - Google Patents

Info

Publication number
JPH0542700B2
JPH0542700B2 JP17845184A JP17845184A JPH0542700B2 JP H0542700 B2 JPH0542700 B2 JP H0542700B2 JP 17845184 A JP17845184 A JP 17845184A JP 17845184 A JP17845184 A JP 17845184A JP H0542700 B2 JPH0542700 B2 JP H0542700B2
Authority
JP
Japan
Prior art keywords
data
signal
input
shift register
shift
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP17845184A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6158070A (ja
Inventor
Takashi Koyanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP17845184A priority Critical patent/JPS6158070A/ja
Publication of JPS6158070A publication Critical patent/JPS6158070A/ja
Publication of JPH0542700B2 publication Critical patent/JPH0542700B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP17845184A 1984-08-29 1984-08-29 入出力チヤネル装置のデ−タ転送制御方式 Granted JPS6158070A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17845184A JPS6158070A (ja) 1984-08-29 1984-08-29 入出力チヤネル装置のデ−タ転送制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17845184A JPS6158070A (ja) 1984-08-29 1984-08-29 入出力チヤネル装置のデ−タ転送制御方式

Publications (2)

Publication Number Publication Date
JPS6158070A JPS6158070A (ja) 1986-03-25
JPH0542700B2 true JPH0542700B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-06-29

Family

ID=16048746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17845184A Granted JPS6158070A (ja) 1984-08-29 1984-08-29 入出力チヤネル装置のデ−タ転送制御方式

Country Status (1)

Country Link
JP (1) JPS6158070A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Also Published As

Publication number Publication date
JPS6158070A (ja) 1986-03-25

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