JPH0541471A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To improve the heat radiating characteristic of a semiconductor integrated circuit device in which a semiconductor chip mounted on a package substrate with CCB bumps in between is airtightly sealed with a cap. CONSTITUTION:A chip carrier 1 is formed by airtightly sealing a semiconductor chip 7 mounted on the main surface of a package substrate 2 with CCB bumps 6 in between with a cap 8 and comb-shaped recessing and projecting sections are formed on the top of the cap 8 so that the cap 8 can have the function of a radiating fin.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor integrated circuit device technology, and more particularly to CCB (Controlled Collapse Bondin).
g) A technique effective when applied to a flip-chip type semiconductor integrated circuit device in which a semiconductor chip is mounted on a substrate via bumps.

[0002]

2. Description of the Related Art One of the mounting methods for semiconductor integrated circuit devices is a chip carrier in which a semiconductor chip mounted on a package substrate via CCB bumps is hermetically sealed with a cap.

The chip carrier is described, for example, in Japanese Patent Laid-Open Nos. 62-249429 and 63-310139.

FIG. 5 shows a cross section of the chip carrier 20 described in the above document. The package substrate 21 that constitutes the chip carrier 20 is made of a ceramic material such as mullite, and electrodes 22a and 22b are formed on the main surface and the back surface thereof, respectively.

A semiconductor chip 24 is electrically connected to the electrodes 22a on the main surface of the package substrate 21 via CCB bumps 23. The semiconductor chip 24 is made of silicon (Si) single crystal and hermetically sealed by a cap 25.

The cap 25 is made of, for example, aluminum nitride (AlN), and is joined to the main surface of the package substrate 21 via the solder 26 for sealing.

Further, the lower surface of the cap 25 and the back surface of the semiconductor chip 24 are joined to each other via the heat transfer solder 27, and the heat generated in the semiconductor chip 24 during circuit operation is applied to the heat transfer solder 27 and the cap. It has a structure of being diffused to the outside through 25.

On the other hand, the electrode 2 on the main surface of the package substrate 21
2a is electrically connected to an electrode 22b on the back surface of the package substrate via an internal wiring 28 formed inside the package substrate 21. The internal wiring 28 is made of, for example, tungsten.

A CCB bump 29 having a diameter larger than that of the CCB bump 23 described above is bonded to the electrode 22b on the back surface of the package substrate 21. Such a chip carrier 2
0 is mounted on a module substrate to form a module.

The module structure using the chip carrier 20 is described in, for example, Nikkei BP, December 1, 1990.
Published on 0th, "Nikkei Electronics" P227.

FIG. 6 is a cross section of the module 30 described in this document. On the main surface of the module substrate 31, C
A plurality of chip carriers 20 are mounted via CB bumps 29.

A small fin 32 is mounted on the cap 25 of each chip carrier 20. Small fin 32
Is made of, for example, aluminum (Al), and unevenness is formed on the upper part thereof.

However, the cap 25 and the small fin 32
From the viewpoint of facilitating the assembly of the module, etc., they are usually in contact but not joined.

Each chip carrier 20 is hermetically sealed by a module cap 33. Concavities and convexities are formed on the lower surface of the module cap 33, and the concavities and convexities and the concavities and convexities on the upper part of the small fin 32 are fitted together.

A water cooling jacket 34 is provided on the upper surface of the module cap 33, and the chip carrier 20 is provided.
The heat generated in (3) is transferred to the water cooling jacket 34 via the small fins 32 and the module cap 33 to be cooled.

[0016]

By the way, in recent years, in semiconductor integrated circuit devices, improvements in the degree of element integration and circuit operation speed have been promoted. Along with this, the amount of heat generated in the semiconductor chip during circuit operation tends to increase, so how to efficiently dissipate the heat generated in the semiconductor chip to the outside is an important issue.

However, in the case of the conventional module structure using the chip carrier, since the cap of the chip carrier and the small fin of the module are in contact with each other but not joined, a slight gap formed in the contact portion. The present inventor has found that there is a problem in that the thermal resistance increases due to this, and sufficient heat dissipation characteristics cannot be obtained.

As a conventional technique for improving this, there is, for example, a technique in which He gas or the like is interposed in the gap between the cap of the chip carrier and the small fin of the module. The effect is not obtained. There is also a technique in which a heat conductive grease is interposed between the contact surfaces of the cap of the chip carrier and the small fins of the module, but there is a problem of contamination.

The present invention has been made in view of the above problems, and an object thereof is to provide a semiconductor integrated circuit device in which a semiconductor chip mounted on a package substrate via CCB bumps is hermetically sealed by a cap. It is to provide a technique capable of improving heat dissipation characteristics.

Another object of the present invention is to provide a heat dissipation characteristic of a module constructed using a semiconductor integrated circuit device in which a semiconductor chip mounted on a package substrate via CCB bumps is hermetically sealed by a cap. It is to provide a technology that can improve the

The above and other objects and novel features of the present invention will be apparent from the description of the specification and the accompanying drawings.

[0022]

Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.

That is, the invention according to claim 1 is CCB
A semiconductor integrated circuit device in which a semiconductor chip mounted on a main surface of a package substrate via bumps is hermetically sealed by a cap, and a semiconductor integrated circuit device structure in which unevenness is formed on at least a part of an outer surface of the cap. To do.

According to a third aspect of the present invention, there is provided a semiconductor integrated circuit device in which a semiconductor chip mounted on the main surface of a package substrate via CCB bumps is hermetically sealed by a cap, and at least one of the outer surface of the cap is provided. A heat dissipation fin made of a constituent material having the same thermal expansion coefficient as that of the cap is joined to the portion to form a semiconductor integrated circuit device structure.

[0025]

According to the invention described in claim 1, the CCB
By providing unevenness on the cap of the semiconductor integrated circuit device in which the semiconductor chip mounted on the package substrate via the bumps is hermetically sealed by the cap, and increasing the surface area of the cap, the cap functions as a radiation fin. Since it can be provided, the heat dissipation characteristics of the semiconductor integrated circuit device can be improved.

Further, since the cap has a function as a radiation fin and the cap and the module cap are in direct contact with each other, there is no need for the small fin which is conventionally interposed between the cap and the module cap.

Therefore, among the conventional module structures,
Since it is possible to eliminate the gap between the cap and the small fin, which has the worst heat conduction property, the heat conduction property of the module can be improved.

Further, since the small fins are not required when assembling the module, the module assembling work can be simplified and the cost of the module can be reduced.

According to the third aspect of the present invention, the heat dissipation characteristics of the semiconductor integrated circuit device can be improved and the stress generation due to the difference in thermal expansion between the cap and the heat dissipation fin can be suppressed. ..

[0030]

Embodiment 1 FIG. 1 is an overall sectional view of a semiconductor integrated circuit device which is an embodiment of the present invention, and FIG. 2 is a sectional view of a module using the semiconductor integrated circuit device of FIG.

A package substrate 2 constituting the chip carrier (semiconductor integrated circuit device) 1 of the first embodiment shown in FIG.
Is made of a ceramic material such as mullite, and has electrodes 3a and 3b on its main surface and back surface, respectively.
Are formed.

The electrodes 3a and 3b are electrically connected by the internal wiring 4 formed inside the package substrate 2. The internal wiring 4 is made of a refractory metal such as tungsten.

The electrodes 3b on the back surface of the package substrate 2 are
CCB (Controlled Collapse Bonding) bumps 5 are joined. The CCB bump 5 is made of, for example, a tin (Sn) / Ag alloy (melting point: about 200 to 250 ° C.) containing about 3.5 wt% silver (Ag).

The electrode 3a on the main surface of the package substrate 2
A CCB bump 6 having a diameter smaller than that of the CCB bump 5 is bonded to. CCB bump 6 is, for example, 1 to 5% by weight.
Lead (Pb) / Sn alloy containing about Sn (melting point: 3
20 to 330 ° C.).

The CCB bump 6 is bonded to a CCB bump base metal (not shown) formed on the main surface of the semiconductor chip 7. That is, the semiconductor chip 7 is electrically connected to the electrode 3 a on the main surface of the package substrate 2 via the CCB bump 6.

The semiconductor chip 7 is made of, for example, Si single crystal, and a semiconductor integrated circuit (not shown) such as an SRAM with logic (StaticRAM) composed of, for example, a BiC-MOS circuit is formed on its main surface. Has been done.

The semiconductor chip 7 is hermetically sealed by a cap 8. The cap 8 has, for example, a thermal conductivity of 1
Solder 9a made of AlN of about 70 W / mK
It is joined to the main surface of the package substrate 2 via. The sealing solder 9a is made of, for example, a Pb / Sn alloy (melting point: about 290 to 300 ° C.) containing about 10 wt% Sn.

In order to improve the wettability of the solder 9a for sealing, the surfaces of the package substrate 2 and the cap 8 at the joint between the cap 8 and the package substrate 2, for example, are made of titanium (Ti) / Nickel (Ni) /
A bonding metal layer (not shown) made of Au is formed.

Further, the back surface of the semiconductor chip 7 is joined to the lower surface of the cap 8 via the heat transfer solder 9b, whereby the heat generated in the semiconductor chip 7 during circuit operation is transferred to the heat transfer solder 9b. After that, the structure is such that it is diffused from the surface of the cap 8.

The heat transfer solder 9b is, for example, the sealing solder 9a.
It is composed of the same Pb / Sn alloy.

Although not shown, the above-mentioned joining metal layer is also formed on the lower surface of the cap 8 in order to improve the wettability of the heat transfer solder 9b.

By the way, in the first embodiment, comb-shaped irregularities are formed on the upper portion of the cap 8. That is, the surface area of the upper portion of the cap 8 is increased more than ever before,
By giving the upper portion of the cap 8 a function as a conventional small fin, the heat dissipation characteristics of the chip carrier 1 can be improved as compared with the conventional case.

The size of the upper surface of the cap 8 is, for example, 10 ×.
It is about 10 mm to 13 × 13 mm. The height of the convex portion 8a of the cap 8 is, for example, about 3 mm. Therefore, the surface area of the upper portion of the cap 8 is, for example, 600 mm.
It is about ² .

Next, a module structure using the chip carrier 1 of the first embodiment will be described with reference to FIG.

The module substrate 11 constituting the module 10 is made of a ceramic material such as mullite. The lead pins 12 are provided on the lower surface of the module substrate 11.
Are joined.

The lead pin 12 is made of, for example, 42 alloy or the like, and its surface is plated with Au. The module 10 is mounted on the wiring board by inserting the lead pins 12 into the through holes of the wiring board (not shown).

On the other hand, a plurality of chip carriers 1 are mounted on the module substrate 11 via CCB bumps 5. The CCB bumps 5 are electrically connected to the lead pins 12 described above through internal wiring (not shown) formed inside the module substrate 11.

Each chip carrier 1 is hermetically sealed by a module cap 13. The module cap 13 is provided on the module substrate 11 via the sealing solder 9c.
It is joined to the main surface of.

The cavity 14 formed by the module cap 13 and the module substrate 11 is filled with, for example, He gas or the like from the viewpoint of improving heat dissipation characteristics.

Concavities and convexities are formed on the lower surface of the module cap 13, and the concavities and convexities formed on the cap 8 of the chip carrier 1 are fitted into the concavities and convexities.

A cooling jacket 15 is provided on the upper surface of the module cap 13 through a heat conductive grease (not shown).
Is installed, whereby heat generated in the chip carrier 1 during circuit operation is transferred to the cooling jacket 15 via the module cap 13 and is cooled.

By the way, in the first embodiment, the cap 8 of the chip carrier 1 has a function as a radiation fin, and the cap 8 and the module cap 13 are brought into direct contact with each other with the respective concavities and convexities fitted. This eliminates the need for the small fin that has been conventionally interposed between the lower surface of the module cap and the upper surface of the chip carrier.

Therefore, it is possible to eliminate the gap between the cap 8 and the small fin, which has been the most deteriorating heat conduction characteristic of the module in the past, so that the heat conduction characteristic of the module 10 can be improved. ing.

Further, since the conventional small fins are not required for assembling the module 10, the assembling work of the module 10 can be simplified and the cost of the module 10 can be reduced.

The cooling jacket 15 is provided with a circulation hole 15a for circulating cooling water, for example. The reason why the flow holes 15a are provided is that the upper surface of the module cap 13 is uniformly cooled by guiding the flow of cooling water. Note that arrow A in FIG. 2 indicates the direction in which the cooling water flows.

As described above, according to the first embodiment, the following effects can be obtained.

(1). Asperity is formed on the upper portion of the cap 8 of the chip carrier 1 to increase its surface area as compared with the conventional one.
By providing the cap 8 with a function as a heat dissipation fin, the heat dissipation characteristics of the chip carrier 1 can be improved as compared with the conventional case.

(2). A state in which irregularities are formed on the upper portion of the cap 8 of the chip carrier 1, the cap 8 has a function as a heat radiation fin, and the irregularities of the cap 8 and the module cap 13 are fitted to each other. By directly contacting with each other, the small fin, which is conventionally interposed between the cap 8 and the module cap 13, is not necessary.

Therefore, among the conventional module structures,
Since it is possible to eliminate the gap between the cap 8 and the small fin, which has the worst heat conduction property, it is possible to improve the heat dissipation property of the module 10.

(3) Due to the above (1) and (2), an increase in the amount of heat generated due to an improvement in the degree of element integration in the chip carrier 1 and an increase in the circuit operation speed, that is, an increase in the power consumption of the chip carrier 1 It becomes possible to respond.

(4). An unevenness is formed on the upper portion of the cap 8 of the chip carrier 1 so that the cap 8 has a function as a conventional small fin, and the cap 8 and the module cap 13
By directly contacting and with the respective concave and convex parts fitted, small fins are not required. Therefore, the assembly work of the module 10 can be simplified, and the cost of the module 10 can be reduced.

[0062]

Second Embodiment FIG. 3 is an overall sectional view of a semiconductor integrated circuit device which is an embodiment of the present invention.

In the second embodiment, the cap 8 has no unevenness, and its upper surface is flat as in the conventional case. However, on the upper surface of the cap 8, the solder 9 for joining
Small fins 16 are joined via d.

Therefore, also in the second embodiment, the heat dissipation characteristics of the chip carrier 1 can be improved.

The small fin 16 is made of the same material as the cap 8, for example, AlN. That is, the small fin 16 and the cap 8 have the same coefficient of thermal expansion. Therefore, in the second embodiment, the generation of stress due to the difference in thermal expansion between the small fin 16 and the cap 8 is suppressed.

On the upper surface of the cap 8 and the lower surface of the small fin 16, in order to improve the wettability of the solder 9d for joining, a joining metal layer 17 made of, for example, Ti / Ni / Au is formed.
Are formed.

When the chip carrier 1 of the second embodiment has a module structure, it may be the same as that of the first embodiment.

As described above, according to the second embodiment, the following effects can be obtained.

(1). By joining the small fins 16 to the upper surface of the cap 8 of the chip carrier 1, the heat dissipation characteristics of the chip carrier 1 can be improved as compared with the conventional case.

(2). By joining the small fins 16 to the upper surface of the cap 8 of the chip carrier 1, between the cap 8 and the small fins 16 which have the worst heat conduction characteristics in the conventional module structure. Because it can eliminate the void of
It is possible to improve the heat dissipation characteristics of the module 10.

(3) Due to the above (1) and (2), an increase in the amount of heat generated due to an improvement in the degree of element integration in the chip carrier 1 and an increase in the circuit operation speed, that is, an increase in the power consumption of the chip carrier 1 It becomes possible to respond.

(4). By joining the small fin 16 to the upper surface of the cap 8 of the chip carrier 1 from the beginning,
It is possible to simplify the assembly work of the module 10.

(5). Since the small fin 16 and the cap 8 are made of the same material, it is possible to suppress the generation of stress due to the difference in thermal expansion between the small fin 16 and the cap 8.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention is not limited to the first and second embodiments, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

For example, in the first embodiment described above, the case where the concavities and convexities of the cap have a comb-tooth shape has been described, but the present invention is not limited to this, and various modifications are possible. Is also good.

In the first embodiment, the case where the concavities and convexities are formed on the upper part of the cap has been described. However, the place where the concavities and convexities are formed is not limited to the upper part of the cap and can be variously changed. Concavities and convexities may be formed on the side surface of the cap.

In this case, since the surface area of the cap is increased, it is possible to further improve the heat dissipation characteristics.

In the second embodiment, the cap is not provided with irregularities, but the present invention is not limited to this. For example, irregularities may be formed on the side surface of the cap.

In this case, since the surface area of the cap is increased, it is possible to further improve the heat dissipation characteristics.

Further, in the first and second embodiments, the structure in which the chip carrier of the module is cooled by using the cooling jacket has been described, but the structure is not limited to this, and as shown in FIG. Board 11
The above chip carrier 1 may have a structure in which it is directly cooled by, for example, a Fluorinert (company name: 3M (3M) company in the US) liquid.

The Fluorinert solution is guided by the guide member 18 and flows uniformly in the plane of the upper surface of the module substrate 11, thereby cooling each chip carrier 1 uniformly. The arrow B indicates the direction in which the Fluorinert solution flows.

In this case, since the concavities and convexities are formed on the upper portion of the cap 8 (or the small fins 16 are joined to the cap 8), the conventional chip carrier having a flat upper surface is directly cooled with Fluorinert liquid. It is possible to obtain a good effect in terms of cooling efficiency as compared with the case of performing.

Also in this case, it is possible to further improve the cooling efficiency by forming irregularities on the side surface of the cap 8 and increasing the surface area of the cap 8.

In the above description, the BiC, which is the field of application behind the invention made mainly by the present inventor, is the background.
The case where the present invention is applied to a semiconductor integrated circuit device having a MOS circuit has been described, but the present invention is not limited to this, and various applications are possible. Is.

In the first and second embodiments, the case where the present invention is applied to the semiconductor integrated circuit device in which the SRAM with logic is formed on the semiconductor chip has been described. However, the present invention is not limited to this and can be variously applied. , For example DRAM
The present invention can also be applied to other semiconductor integrated circuit devices in which other semiconductor integrated circuits are formed on a semiconductor chip, such as (Dynamic RAM), SRAM, and gate array.

[0086]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.
It is as follows.

(1) That is, according to the first aspect of the invention, the cap of the semiconductor integrated circuit device formed by hermetically sealing the semiconductor chip mounted on the package substrate through the CCB bumps with the cap is uneven. Since the cap has a function as a heat radiation fin by increasing the surface area of the cap, the heat radiation characteristic of the semiconductor integrated circuit device can be improved.

Further, since the cap has a function as a heat radiation fin and the cap and the module cap are in direct contact with each other, the small fin conventionally interposed between the cap and the module cap is not required.

Therefore, among the conventional module structures,
Since it is possible to eliminate the gap between the cap and the small fin, which has the worst heat conduction property, it is possible to improve the heat conduction property of the module.

That is, it is possible to improve the heat dissipation characteristics of a module configured using a semiconductor integrated circuit device in which a semiconductor chip mounted on a package substrate via CCB bumps is hermetically sealed by a cap. ..

Further, since the small fins are not required when assembling the module, the module assembling work can be simplified and the module cost can be reduced.

(2) According to the invention of claim 3, the heat dissipation characteristics of the semiconductor integrated circuit device can be improved and
It is possible to suppress the generation of stress due to the difference in thermal expansion between the cap and the radiation fin.

[Brief description of drawings]

FIG. 1 is an overall sectional view of a semiconductor integrated circuit device that is an embodiment of the present invention.

FIG. 2 is a sectional view of a module using the semiconductor integrated circuit device of FIG.

FIG. 3 is an overall sectional view of a semiconductor integrated circuit device that is an embodiment of the present invention.

FIG. 4 is a sectional view of a modified example of a module using the semiconductor integrated circuit device of FIG.

FIG. 5 is an overall sectional view of a conventional chip carrier.

FIG. 6 is an overall sectional view of a module using a conventional chip carrier.

[Explanation of symbols]

 1 Chip Carrier (Semiconductor Integrated Circuit Device) 2 Package Substrate 3a Electrode 3b Electrode 4 Internal Wiring 5 CCB Bump 6 CCB Bump 7 Semiconductor Chip 8 Cap 8a Convex 9a Sealing Solder 9b Heat Transfer Solder 9c Sealing Solder 9d Bonding Solder 10 module 11 module substrate 12 lead pin 13 module cap 14 cavity 15 cooling jacket 15a through hole 16 small fin 17 metal layer for joining 18 guide member A arrow B arrow 20 chip carrier 21 package substrate 22a electrode 22b electrode 23 CCB bump 24 semiconductor Chip 25 Cap 26 Sealing solder 27 Heat transfer solder 28 Internal wiring 29 CCB bump 30 Module 31 Module board 32 Small fin 33 Module cap 34 Cooling jacket

Claims (5)

[Claims] 1. A semiconductor integrated circuit device in which a semiconductor chip mounted on a main surface of a package substrate via CCB bumps is hermetically sealed by a cap, and unevenness is formed on at least a part of an outer surface of the cap. A semiconductor integrated circuit device characterized by the above. 2. The semiconductor integrated circuit device according to claim 1, wherein the cap is made of aluminum nitride. 3. A semiconductor integrated circuit device in which a semiconductor chip mounted on a main surface of a package substrate via CCB bumps is hermetically sealed by a cap, and the cap is provided on at least a part of an outer surface of the cap. A semiconductor integrated circuit device, wherein heat radiation fins made of constituent materials having the same coefficient of thermal expansion are joined. 4. The semiconductor integrated circuit device according to claim 3, wherein both the cap and the radiation fin are made of aluminum nitride. 5. The semiconductor integrated circuit device according to claim 3 or 4, wherein unevenness is formed in a portion where the radiation fin is not joined.