JPH05335746A - Ceramic multilayer wiring board and manufacture thereof - Google Patents

Abstract

PURPOSE:To adjust capacitance, and manufacture a ceramic multilayer wiring board having a high yield by providing a trimmed capacitor on an inner layer sandwiched between a number of ceramic substrates. CONSTITUTION:A capacitor upper electrode 16 with one side thereof formed into a comb tooth shape is printed on an upper part of a dielectric material 14, and it is calcined after having been dried. A probe is brought into contact with an area between a capacitance check pad 12b of a lower electrode 12a and the electrode 16 to check the capacitance of the capacitor. When the capacitance is outside of a tolerance, the upper electrode 16 is trimmed by a laser beam or the like, so that a trimmed portion 16a is formed. Thereafter, joint glass 18 is printed on a substrate, and an alumina substrate 20 is laminated on the glass. This laminated substrate is then calcined. Thereby, it is possible to manufacture with a high yield a ceramic multilayer wiring board on which a capacitor with its capacitance prepared is mounted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic multilayer wiring board used for electronic equipment and the like and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a ceramic multilayer wiring board is formed by printing a dielectric material for forming a capacitor together with conductors, resistors and the like on a molded body (green sheet) of glass-ceramic material and laminating (laminating) it. After that, it is manufactured by firing at once.

[0003]

SUMMARY OF THE INVENTION In the above conventional method,
Since the dielectric material is printed on the green sheet and then fired together, (1) the dielectric material may be damaged due to the mismatch between the firing shrinkage behavior of the green sheet and that of the dielectric material. . (2) Even if the dielectric is not damaged, the capacitance of the capacitor may be abnormal. Even if this abnormality occurs, the capacitance cannot be adjusted. Due to the above reasons, there is a problem that manufacturing with a high yield cannot be performed.

In view of the above-mentioned circumstances, the present invention provides a method for manufacturing a ceramic multilayer wiring board which can adjust the capacitance of a capacitor and thus has a high yield, and a ceramic multilayer wiring board in which a capacitance-adjusted capacitor is formed as an inner layer. The purpose is to

[0005]

In order to achieve the above object, a method for manufacturing a ceramic multilayer wiring board according to the present invention comprises printing one electrode pattern for a capacitor on a fired first ceramic board. And firing, a step of printing a dielectric on the one electrode pattern, a step of printing the other electrode pattern on the dielectric and firing.
A step of adjusting the capacitance of a capacitor composed of the one electrode pattern, the dielectric material, and the other electrode pattern by trimming, if necessary, and a step of printing glass for joining the ceramic substrates together. And a step of firing a second ceramic substrate that has been fired so as to sandwich the capacitor on the first ceramic substrate and firing the second ceramic substrate.

The ceramic multilayer wiring board of the present invention is
It is characterized in that an inner layer sandwiched between a plurality of ceramic substrates is provided with a trimmed capacitor.

[0007]

In the present invention, since the capacitor is printed and fired on the fired ceramic substrate, it is not necessary to consider the firing shrinkage of the substrate material and the matching of the capacitor material. The firing process can be simplified and the degree of freedom in selecting the capacitor material is increased. In addition, the capacitor capacity can be checked and adjustment can be performed by trimming before the ceramic substrates are stacked to form a multilayer structure, which improves the product yield.

[0008]

EXAMPLES Examples of the present invention will be described below. FIG. 1 is a sectional view of a capacitor portion of an example of a ceramic multilayer wiring board of the present invention, FIGS. 2 and 3 are diagrams showing examples of conductor patterns forming a lower electrode and an upper electrode of the capacitor, respectively. [Fig. 4] is a plan view of a capacitor portion.

Here, an example of a method for manufacturing a ceramic multilayer wiring board will be described with reference to these drawings. A plurality of fired alumina substrates 10 and 20 are prepared, and the conductor pattern 12 including the capacitor lower electrode 12a shown in FIG. 2 and the conductor pattern 22 are printed and dried on the alumina substrates 10 and 20 at 850 ° C. It was baked for 10 minutes. Then, the dielectric 14 is formed on the lower electrode 12a.
3 is printed, dried, and then on top of the dielectric 14, FIG.
As shown in (4), the capacitor upper electrode 16 having one side formed into a comb blade was printed, dried, and then baked at 850 ° C. for 30 minutes. After that, a probe was applied between the capacitance check pad 12b of the lower electrode 12a and the upper electrode 16 to check the capacitance.

Here, the center value of the capacity is set so as to fluctuate to a value slightly larger than the target value, and when the capacity is out of the allowable range by the capacity check, it is shown in FIG. The upper electrode 16 is cut (trimmed) by laser light or the like along the alternate long and short dash line until the capacitance falls within the allowable range, and the trimming portion 1 as shown in FIG.
6a is formed. After the capacitance of the capacitor is adjusted by trimming in this way, the glass for bonding 18
Was printed, and the alumina substrates 20 were laminated and fired. Figure 1
In the example shown in, the upper electrode 16 is connected to the conductor pattern 22 via the conductor in the through hole 24 provided in the alumina substrate 20.

When the manufacturing process was performed by setting the permissible range to the target capacitance value to ± 20% by the above process, the yield of this capacitor was 100%.

[0012]

As described above, according to the present invention, the ceramic multi-layer wiring board on which the capacitor of which the capacitance is adjusted is mounted is manufactured with a high yield.

[Brief description of drawings]

FIG. 1 is a sectional view of a capacitor portion of an example of a ceramic multilayer wiring board of the present invention.

FIG. 2 is a diagram showing an example of a conductor pattern forming a lower electrode of a capacitor.

FIG. 3 is a diagram showing an example of a conductor pattern forming an upper electrode of a capacitor.

FIG. 4 is a plan view of a capacitor portion.

[Explanation of symbols]

 10, 20 Alumina substrate 12, 22 Conductor pattern 12a Capacitor lower electrode 14 Dielectric 16 Capacitor upper electrode 16a Trimming part 18 Bonding glass

Claims (2)

[Claims] 1. A ceramic multilayer wiring board comprising a trimmed capacitor in an inner layer sandwiched between a plurality of ceramic boards. 2. A step of printing and firing one electrode pattern for a capacitor on a fired first ceramic substrate; a step of printing a dielectric material on the one electrode pattern; By printing the other electrode pattern on the body and firing, and by trimming the capacitance of the capacitor composed of the one electrode pattern, the dielectric, and the other electrode pattern, if necessary. A step of adjusting, a step of printing glass for bonding the ceramic substrates together, and a step of stacking and firing a second ceramic substrate that has been fired so as to sandwich the capacitor on the first ceramic substrate. A method for manufacturing a ceramic multilayer wiring board, comprising: