JPH04280615A - Manufacture of laminated body - Google Patents

Manufacture of laminated body

Info

Publication number
JPH04280615A
JPH04280615A JP3043590A JP4359091A JPH04280615A JP H04280615 A JPH04280615 A JP H04280615A JP 3043590 A JP3043590 A JP 3043590A JP 4359091 A JP4359091 A JP 4359091A JP H04280615 A JPH04280615 A JP H04280615A
Authority
JP
Japan
Prior art keywords
conductive material
film
material film
exposed
main body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3043590A
Other languages
Japanese (ja)
Other versions
JP2766085B2 (en
Inventor
Haruo Kuraki
椋木 春雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP3043590A priority Critical patent/JP2766085B2/en
Publication of JPH04280615A publication Critical patent/JPH04280615A/en
Application granted granted Critical
Publication of JP2766085B2 publication Critical patent/JP2766085B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To obtain a laminated body manufacturing method with which whether the desired laminated body is formed or not can be judged easily without wastefully using time and labor. CONSTITUTION:At least a position confirming film (position confirming electrode 17), which is exposed to the edge face corresponding to the position of the above-mentioned second conductive material film, is arranged on the same layer of the second conductive material film (inner electrode 12) which is not exposed to the edge face, and first conductive material films (inner electrodes 11a and 11b), which are exposed to the edge face together with the above- mentioned film, are alternately laminated through the intermediary of a sheet (dielectric layer 13) having insulating property and plasticity, and a laminated body is formed. As the position of the second conductive material film can be realized by visually recognizing the position confirming film exposed to the edge face, whether the desired laminated body is formed or not can be judged easily without wasting time and labor and the like.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、積層セラミックコンデ
ンサ等の電子部品に用いる積層体の製造方法に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a laminate used for electronic components such as a multilayer ceramic capacitor.

【0002】0002

【従来の技術】従来、低容量のセラミックコンデンサを
作成する場合、静電容量の誤差を小さくするために、図
2及び図3に示すように直列に接続したコンデンサを一
体に構成するために、コンデンサ本体の端面に露出しな
い内部電極を配置している。即ち、図2はコンデンサの
側面断面図、図3は図2におけるA−A線矢視方向の平
面断面図であり、図において、10はコンデンサ本体(
以下、本体と称する)で、直方体形状を有している。
2. Description of the Related Art Conventionally, when producing a low-capacitance ceramic capacitor, in order to reduce errors in capacitance, capacitors connected in series are integrated as shown in FIGS. 2 and 3. Internal electrodes are placed on the end face of the capacitor body so that they are not exposed. That is, FIG. 2 is a side sectional view of the capacitor, and FIG. 3 is a plan sectional view taken along the line A-A in FIG.
(hereinafter referred to as the main body), and has a rectangular parallelepiped shape.

【0003】また、本体10は複数の内部電極11a,
11b,12と誘電体層13が積層して形成され、内部
電極11aは本体10の長手方向一端側に導出され、内
部電極11bは他端側に導出されている。内部電極11
aと内部電極11bは同層に配置されると共に、本体1
0の長手方向中央部において内部電極11aと内部電極
11bとは誘電体層13によって絶縁されている。内部
電極12は、誘電体層13を介在して内部電極11a,
11bの層に積層されている。さらに、内部電極12は
、本体10の端面に露出しないように本体10の中央部
に配置されると共に、長手方向の一端部が内部電極11
aに重なり、他端部が内部電極11bに重なるように配
置されている。
The main body 10 also includes a plurality of internal electrodes 11a,
11b, 12 and a dielectric layer 13 are stacked, and the internal electrode 11a is led out to one end in the longitudinal direction of the main body 10, and the internal electrode 11b is led out to the other end. Internal electrode 11
a and the internal electrode 11b are arranged in the same layer, and the main body 1
The internal electrode 11a and the internal electrode 11b are insulated by a dielectric layer 13 at the center in the longitudinal direction. The internal electrodes 12 are connected to internal electrodes 11a and 11a with a dielectric layer 13 interposed therebetween.
It is laminated on the layer 11b. Further, the internal electrode 12 is arranged at the center of the main body 10 so as not to be exposed to the end surface of the main body 10, and one longitudinal end thereof is connected to the internal electrode 12.
a, and the other end thereof is arranged to overlap the internal electrode 11b.

【0004】さらに、本体10の両端部には、内部電極
11a,11bに導通する外部電極14が形成され、こ
の外部電極14を介して外部回路と接続できるようにな
っている。
Further, external electrodes 14 are formed at both ends of the main body 10 and are electrically connected to the internal electrodes 11a and 11b, so that the main body 10 can be connected to an external circuit via the external electrodes 14.

【0005】前述の構成よりなるコンデンサによれば、
内部電極11aと内部電極12によって静電容量C1の
コンデンサが構成され、内部電極11bと内部電極12
によって静電容量C2のコンデンサが構成される。これ
らのコンデンサは直列接続された一体のものとなり、そ
の静電容量Cは個々の静電容量C1,C2よりも小さな
ものとなる。
According to the capacitor having the above-mentioned configuration,
The internal electrode 11a and the internal electrode 12 constitute a capacitor with a capacitance C1, and the internal electrode 11b and the internal electrode 12 constitute a capacitor with a capacitance C1.
A capacitor with capacitance C2 is constructed by: These capacitors are connected in series and are integrated, and the capacitance C thereof is smaller than the individual capacitances C1 and C2.

【0006】次に、前述したコンデンサの製造方法を説
明する。BaTiO3 系の誘電体材料からなり、可塑
性を有するグリ−ンシ−トに、銀パラジウム系導電ペ−
スロをスクリ−ン印刷してマトリックス状に並ぶ内部電
極11a,11bを形成したものを複数枚作成する。さ
らに、パラジウム系導電ペ−ストを前記グリ−ンシ−ト
にスクリ−ン印刷して、前記内部電極11a,11bに
対応してマトリックス状に並ぶ内部電極12を形成した
ものを複数枚作成する。このとき、前述したように本体
10の両端に、内部電極11a,11bが導出され、本
体10の中央部に内部電極12が配置されるようにする
Next, a method for manufacturing the above-mentioned capacitor will be explained. A plastic green sheet made of BaTiO3-based dielectric material is coated with silver-palladium-based conductive paint.
A plurality of sheets with internal electrodes 11a and 11b arranged in a matrix are created by screen printing slots. Further, palladium-based conductive paste is screen printed on the green sheet to produce a plurality of sheets having internal electrodes 12 arranged in a matrix corresponding to the internal electrodes 11a and 11b. At this time, as described above, the internal electrodes 11a and 11b are led out from both ends of the main body 10, and the internal electrode 12 is arranged at the center of the main body 10.

【0007】さらに、これらを積層して一体となすと共
に、上下にグリ−ンシ−ト15をかさねて層方向に加圧
して圧着した後、前述した本体10の形状に合わせて切
断し、脱バインダ処理を行う。この後、所定の温度にて
焼成する。これにより、本体10が得られる。さらに、
本体10の両端部に銀パラジウム系導電性材料によって
外部電極14を形成し、この上にハンダメッキを施すこ
とによりコンデンサが形成される。
[0007]Furthermore, these are laminated to form an integral body, green sheets 15 are stacked on top and bottom, and pressure is applied in the direction of the layers to bond them, and then cut to match the shape of the main body 10 described above, and the binder is removed. Perform processing. After that, it is fired at a predetermined temperature. Thereby, the main body 10 is obtained. moreover,
A capacitor is formed by forming external electrodes 14 from a silver-palladium-based conductive material at both ends of the main body 10 and applying solder plating thereon.

【0008】[0008]

【発明が解決しようとする課題】しかしながら、前述し
た従来の製造方法においては、内部電極11a,11b
,12と誘電体層13とを積層して加圧した際に、図4
に示すように、内部電極12が本体10の幅方向にずれ
て、内部電極11a,11bに対して所定位置に重なら
ないことがある。
However, in the conventional manufacturing method described above, the internal electrodes 11a, 11b
, 12 and the dielectric layer 13 are laminated and pressurized, as shown in FIG.
As shown in FIG. 2, the internal electrode 12 may be shifted in the width direction of the main body 10 and may not overlap with the internal electrodes 11a and 11b at a predetermined position.

【0009】このため、静電容量の誤差が規定値を上回
り不良品が発生する。さらに、不良品であるか否かは、
本体10に外部電極14を形成した後、この静電容量を
計測しなければ判定できないため、生産に要した時間、
労力等が無駄になるという問題点があった。
[0009] Therefore, the capacitance error exceeds the specified value, resulting in defective products. Furthermore, whether it is a defective product or not,
After forming the external electrode 14 on the main body 10, it cannot be determined unless this capacitance is measured, so the time required for production,
There was a problem that labor etc. were wasted.

【0010】本発明の目的は上記の問題点に鑑み、時間
、労力等を無駄にすることなく、所望の積層体が形成さ
れたか否かを容易に判定することができる積層体の製造
方法を提供することにある。
SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a method for manufacturing a laminate that can easily determine whether or not a desired laminate has been formed without wasting time and labor. It is about providing.

【0011】[0011]

【課題を解決するための手段】本発明は上記の目的を達
成するために、請求項1では、絶縁性及び可塑性を有す
るシ−トを介在して、端面に露出する第1の導電性材料
膜と端面に露出しない第2の導電性材料膜とを交互に積
層した後、層方向に加圧して積層体を形成する積層体の
製造方法において、前記積層時に、前記第2の導電性材
料膜と同層に前記第2の導電性材料膜の位置に対応して
端面に露出する位置確認用膜を、前記第2の導電性材料
膜と間隔をおいて配置した積層体の製造方法を提案する
[Means for Solving the Problems] In order to achieve the above object, the present invention provides a structure in which a first conductive material exposed on an end face is interposed between a sheet having insulating properties and plasticity. In a method for manufacturing a laminate in which a laminate is formed by alternately laminating films and second conductive material films that are not exposed on the end faces, and then applying pressure in the layer direction, during the lamination, the second conductive material film is A method for manufacturing a laminate, in which a position confirmation film exposed on an end surface corresponding to the position of the second conductive material film is arranged in the same layer as the film, with a space between the second conductive material film and the second conductive material film. suggest.

【0012】また、請求項2では、請求項1記載の積層
体の製造方法において、前記位置確認用膜は前記第2の
導電性材料膜と同一の導電性材料膜からなる積層体の製
造方法を提案する。
According to a second aspect of the present invention, in the method of manufacturing a laminate according to the first aspect, the position confirmation film is made of the same conductive material film as the second conductive material film. propose.

【0013】[0013]

【作用】本発明の請求項1によれば、積層時に、第2の
導電性材料膜と同層に前記第2の導電性材料膜の位置に
対応して端面に露出する位置確認用膜が、前記第2の導
電性材料膜と間隔をおいて配置される。これにより、第
1及び第2の導電性材料膜、位置確認用膜及び誘電体層
を積層した後、これを層方向に加圧した際に、前記第2
の導電性材料膜の位置がずれると、これに対応して前記
位置確認用膜がずれる。従って、端面に露出した前記位
置確認用膜を視認することにより、前記第2の導電性材
料膜の位置を知ることができる。
[Function] According to claim 1 of the present invention, during lamination, a position confirmation film is provided on the same layer as the second conductive material film and exposed on the end surface corresponding to the position of the second conductive material film. , and are spaced apart from the second conductive material film. As a result, when the first and second conductive material films, the position confirmation film, and the dielectric layer are laminated and then pressurized in the layer direction, the second
When the position of the conductive material film shifts, the position confirmation film shifts accordingly. Therefore, the position of the second conductive material film can be known by visually checking the position confirmation film exposed on the end face.

【0014】また、請求項2によれば、前記位置確認用
膜は前記第2の導電性材料膜と同一の導電性材料膜から
なるので、前記第2の導電性材料膜と共に前記位置確認
用膜を形成することができる。
According to a second aspect of the present invention, since the position confirmation film is made of the same conductive material film as the second conductive material film, the position confirmation film is made of the same conductive material film as the second conductive material film. A film can be formed.

【0015】[0015]

【実施例】図1は本発明を適用した低容量のセラミック
コンデンサの側面断面図、図6は図1におけるB−B線
矢視方向の平面断面図である。図において、前述した従
来例と同一構成部分は同一符号をもって表す。即ち、1
0はコンデンサ本体(以下、本体と称する)で、直方体
形状を有し、複数の内部電極11a,11b,12、位
置確認電極17及び誘電体層13が積層して形成されて
いる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a side cross-sectional view of a low-capacity ceramic capacitor to which the present invention is applied, and FIG. 6 is a plan cross-sectional view taken along the line B--B in FIG. In the figures, the same components as those of the conventional example described above are indicated by the same reference numerals. That is, 1
0 is a capacitor main body (hereinafter referred to as main body), which has a rectangular parallelepiped shape and is formed by laminating a plurality of internal electrodes 11a, 11b, 12, a position confirmation electrode 17, and a dielectric layer 13.

【0016】内部電極11aは本体10の長手方向一端
側に導出され、内部電極11bは他端側に導出されてい
る。また、内部電極11aと内部電極11bは対にして
同層に配置されると共に、本体10の長手方向中央部に
おいて内部電極11aと内部電極11bとは誘電体層1
3によって絶縁されている。内部電極12及び位置確認
電極17は同層に配置され、誘電体層13を介在して内
部電極11a,11bの層に積層されている。さらに、
内部電極12は、本体10の端面に露出しないように本
体10の中央部に配置されると共に、長手方向の一端部
が内部電極11aに重なり、他端部が内部電極11bに
重なるように配置されている。位置確認電極17は、内
部電極12とは絶縁され、本体10の端面に露出するよ
うに内部電極12の長手方向の両側にそれぞれ配置され
ている。
The internal electrode 11a is led out to one end in the longitudinal direction of the main body 10, and the internal electrode 11b is led out to the other end. Further, the internal electrodes 11a and 11b are arranged as a pair on the same layer, and the internal electrodes 11a and 11b are arranged in the dielectric layer 1 in the central part of the main body 10 in the longitudinal direction.
3. The internal electrode 12 and the position confirmation electrode 17 are arranged in the same layer, and are laminated on the internal electrodes 11a and 11b with the dielectric layer 13 interposed therebetween. moreover,
The internal electrode 12 is arranged at the center of the main body 10 so as not to be exposed to the end surface of the main body 10, and is arranged so that one end in the longitudinal direction overlaps the internal electrode 11a and the other end overlaps the internal electrode 11b. ing. The position confirmation electrodes 17 are insulated from the internal electrodes 12 and arranged on both sides of the internal electrodes 12 in the longitudinal direction so as to be exposed on the end surface of the main body 10 .

【0017】さらに、本体10の両端部には、内部電極
11a,11bに導通する外部電極14が形成され、こ
の外部電極14を介して外部回路と接続できるようにな
っている。
Further, external electrodes 14 are formed at both ends of the main body 10 and are electrically connected to the internal electrodes 11a and 11b, so that the main body 10 can be connected to an external circuit via the external electrodes 14.

【0018】次に、前述したコンデンサの製造方法を説
明する。BaTiO3 系の誘電体材料からなり、可塑
性を有するグリ−ンシ−ト15に、図7の(a) に示
すように、パラジウム系導電ペ−ストをスクリ−ン印刷
して、マトリックス状に並ぶ第1の導電性材料膜すなわ
ち内部電極11a,11bを形成したものを複数枚作成
する。 さらに、図7の(b) に示すように、パラジウム系導
電ペ−ストを前記グリ−ンシ−ト15にスクリ−ン印刷
して、内部電極11a,11bに対応してマトリックス
状に並ぶ第2の導電性材料膜すなわち内部電極12及び
位置確認用膜すなわち位置確認電極17を形成したもの
を複数枚作成する。このとき、前述したように本体10
の両端に、内部電極11a,11b及び位置確認電極1
7が導出され、本体10の中央部に内部電極12が配置
されるようにする。
Next, a method of manufacturing the above-mentioned capacitor will be explained. As shown in FIG. 7(a), a palladium-based conductive paste is screen printed on a green sheet 15 made of a BaTiO3-based dielectric material and has plasticity, so that the sheets are arranged in a matrix. A plurality of conductive material films, ie, internal electrodes 11a and 11b formed thereon, are prepared. Furthermore, as shown in FIG. 7(b), a palladium-based conductive paste is screen printed on the green sheet 15 to form second electrodes arranged in a matrix corresponding to the internal electrodes 11a and 11b. A plurality of conductive material films, ie, internal electrodes 12, and position confirmation films, ie, position confirmation electrodes 17 are formed. At this time, as mentioned above, the main body 10
Internal electrodes 11a, 11b and position confirmation electrode 1 are provided at both ends of the
7 is led out, and the internal electrode 12 is placed in the center of the main body 10.

【0019】さらに、これらを積層して一体となすと共
に、上下にグリ−ンシ−ト15をかさねて層方向に加圧
して圧着し、積層体を形成した後、前述した本体10の
形状に合わせて切断する。ここで、本体10の長手方向
の端面に内部電極11a,11b及び位置確認電極17
が露出するので、これを視認し、内部電極11a,11
bの位置に対する位置確認電極17の位置を知ることに
より、内部電極11a,11bの位置に対する内部電極
12の位置を簡単に知ることができる。即ち、加圧によ
って内部電極12の位置がずれたときは、これに対応し
て位置確認電極17の位置がずれるからである。
Further, these are laminated to form an integral body, and green sheets 15 are stacked on top and bottom, and pressure is applied in the layer direction to form a laminate. Cut. Here, internal electrodes 11a, 11b and a position confirmation electrode 17 are provided on the longitudinal end surface of the main body 10.
is exposed, so visually check it and connect the internal electrodes 11a, 11
By knowing the position of the position confirmation electrode 17 with respect to the position b, it is possible to easily know the position of the internal electrode 12 with respect to the positions of the internal electrodes 11a and 11b. That is, when the position of the internal electrode 12 shifts due to pressurization, the position of the position confirmation electrode 17 shifts accordingly.

【0020】従って、内部電極11a,11bに対する
内部電極12の位置からコンデンサの静電容量が規定範
囲内にあるか否かを容易に判定することができ、不良品
となる場合はここで作業を中断することができる。これ
により、従来に比べて時間及び労力の無駄を低減するこ
とができる。
Therefore, it is possible to easily determine whether the capacitance of the capacitor is within the specified range based on the position of the internal electrode 12 with respect to the internal electrodes 11a and 11b, and if the product is defective, work should be done here. Can be interrupted. Thereby, waste of time and labor can be reduced compared to the conventional method.

【0021】良品であると判定されたものは、脱バイン
ダ処理が行われた後、所定の温度にて焼成される。これ
により、本体10が得られる。さらに、本体10の両端
部に銀パラジウム系導電性材料によって外部電極14が
形成され、この上にハンダメッキを施すことによりコン
デンサが形成される。
Those determined to be good are subjected to binder removal treatment and then fired at a predetermined temperature. Thereby, the main body 10 is obtained. Furthermore, external electrodes 14 are formed at both ends of the main body 10 using a silver-palladium-based conductive material, and a capacitor is formed by applying solder plating thereon.

【0022】前述したように本実施例によれば、時間、
労力等を無駄にすることなく、所望の積層体が形成され
たか否かを容易に判定することができる。また、内部電
極12と共に位置確認電極17を形成することができる
ので、製造工程の大幅な変更を行うこと無く、容易に実
施することができ、コストの上昇を招くこともない。 尚、本実施例では、本発明をセラミックコンデンサに適
用したが、これに限定されることはない。例えば、圧電
アクチュエ−タ、積層インダクタ等の積層体の製造にも
適用することができる。
As mentioned above, according to this embodiment, time,
It is possible to easily determine whether or not a desired laminate has been formed without wasting labor or the like. In addition, since the position confirmation electrode 17 can be formed together with the internal electrode 12, it can be easily implemented without major changes in the manufacturing process, and the cost will not increase. In this example, the present invention is applied to a ceramic capacitor, but the present invention is not limited thereto. For example, it can be applied to the manufacture of laminates such as piezoelectric actuators and laminated inductors.

【0023】また、本実施例では、内部電極12の両側
に位置確認電極17を配置したが一方のみでも同様の効
果を得ることができる。さらに、図8に示すように、内
部電極12の幅方向の端部に対応した位置のみに、位置
確認電極17を配置しても同様の効果を得ることができ
る。
Further, in this embodiment, the position confirmation electrodes 17 are arranged on both sides of the internal electrode 12, but the same effect can be obtained even if only one electrode is provided. Furthermore, as shown in FIG. 8, the same effect can be obtained by arranging the position confirmation electrodes 17 only at positions corresponding to the ends of the internal electrodes 12 in the width direction.

【0024】[0024]

【発明の効果】以上説明したように本発明の請求項1に
よれば、端面に露出した位置確認用膜を視認することに
より、第2の導電性材料膜の位置を知ることができるの
で、時間、労力等を無駄にすることなく、所望の積層体
が形成されたか否かを容易に判定することができる。
As explained above, according to claim 1 of the present invention, the position of the second conductive material film can be known by visually checking the position confirmation film exposed on the end face. It is possible to easily determine whether or not a desired laminate has been formed without wasting time, effort, and the like.

【0025】また、請求項2によれば、上記の効果に加
えて、前記第2の導電性材料膜と共に前記位置確認用膜
を形成することができるので、製造工程の大幅な変更を
行うこと無く、容易に実施することができ、コストの上
昇を招くこともない。
Further, according to claim 2, in addition to the above-mentioned effects, since the position confirmation film can be formed together with the second conductive material film, it is not necessary to make a significant change in the manufacturing process. It can be easily implemented without causing any increase in cost.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】  本発明を適用した低容量のセラミックコン
デンサの側面断面図
[Figure 1] Side cross-sectional view of a low-capacity ceramic capacitor to which the present invention is applied

【図2】  従来例の低容量のセラミックコンデンサの
側面断面図
[Figure 2] Side cross-sectional view of a conventional low-capacity ceramic capacitor

【図3】  従来例の低容量のセラミックコンデンサの
平面断面図
[Figure 3] Planar cross-sectional view of a conventional low-capacity ceramic capacitor

【図4】  従来例における問題点を説明する図[Figure 4] Diagram explaining problems in the conventional example

【図5
】  一実施例における低容量のセラミックコンデンサ
の平面断面図
[Figure 5
] Planar sectional view of a low capacitance ceramic capacitor in one embodiment

【図6】  グリ−ンシ−トへの電極の形成状態を示す
[Figure 6] Diagram showing how electrodes are formed on the green sheet

【図7】  本発明を適用した他の低容量のセラミッ
クコンデンサの平面断面図
[Figure 7] Planar sectional view of another low-capacity ceramic capacitor to which the present invention is applied

【符号の説明】[Explanation of symbols]

10…コンデンサ本体、11a,11b,12…内部電
極、13…誘電体層、14…外部電極、15…グリ−ン
シ−ト、17…位置確認電極。
DESCRIPTION OF SYMBOLS 10... Capacitor body, 11a, 11b, 12... Internal electrode, 13... Dielectric layer, 14... External electrode, 15... Green sheet, 17... Position confirmation electrode.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  絶縁性及び可塑性を有するシ−トを介
在して、端面に露出する第1の導電性材料膜と端面に露
出しない第2の導電性材料膜とを交互に積層した後、層
方向に加圧して積層体を形成する積層体の製造方法にお
いて、前記積層時に、前記第2の導電性材料膜と同層に
前記第2の導電性材料膜の位置に対応して端面に露出す
る位置確認用膜を、前記第2の導電性材料膜と間隔をお
いて配置した、ことを特徴とする積層体の製造方法。
1. After alternately laminating a first conductive material film exposed on the end face and a second conductive material film not exposed on the end face with an insulating and plastic sheet interposed therebetween, In the method for manufacturing a laminate in which a laminate is formed by applying pressure in the layer direction, during the lamination, a layer is formed on the end face in the same layer as the second conductive material film in a manner corresponding to the position of the second conductive material film. A method for manufacturing a laminate, characterized in that the exposed position confirmation film is arranged at a distance from the second conductive material film.
【請求項2】  前記位置確認用膜は前記第2の導電性
材料膜と同一の導電性材料膜からなることを特徴とする
請求項1記載の積層体の製造方法。
2. The method of manufacturing a laminate according to claim 1, wherein the position confirmation film is made of the same conductive material film as the second conductive material film.
JP3043590A 1991-03-08 1991-03-08 Manufacturing method of laminate Expired - Fee Related JP2766085B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3043590A JP2766085B2 (en) 1991-03-08 1991-03-08 Manufacturing method of laminate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3043590A JP2766085B2 (en) 1991-03-08 1991-03-08 Manufacturing method of laminate

Publications (2)

Publication Number Publication Date
JPH04280615A true JPH04280615A (en) 1992-10-06
JP2766085B2 JP2766085B2 (en) 1998-06-18

Family

ID=12668010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3043590A Expired - Fee Related JP2766085B2 (en) 1991-03-08 1991-03-08 Manufacturing method of laminate

Country Status (1)

Country Link
JP (1) JP2766085B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000012377A (en) * 1998-06-17 2000-01-14 Murata Mfg Co Ltd Laminated ceramic electronic component and manufacture of the same
JP2010103176A (en) * 2008-10-21 2010-05-06 Tdk Corp Manufacturing method for multilayer capacitor
US12033775B2 (en) 2021-03-11 2024-07-09 KYOCERA AVX Components Corporation Varistor array including matched varistors

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60182713A (en) * 1984-02-02 1985-09-18 スプラグ・エレクトリック・カンパニー Integral ceramic condenser and method of producing same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60182713A (en) * 1984-02-02 1985-09-18 スプラグ・エレクトリック・カンパニー Integral ceramic condenser and method of producing same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000012377A (en) * 1998-06-17 2000-01-14 Murata Mfg Co Ltd Laminated ceramic electronic component and manufacture of the same
JP2010103176A (en) * 2008-10-21 2010-05-06 Tdk Corp Manufacturing method for multilayer capacitor
US12033775B2 (en) 2021-03-11 2024-07-09 KYOCERA AVX Components Corporation Varistor array including matched varistors

Also Published As

Publication number Publication date
JP2766085B2 (en) 1998-06-18

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