JPH0338812A - Laminated capacitor - Google Patents

Laminated capacitor

Info

Publication number
JPH0338812A
JPH0338812A JP17530389A JP17530389A JPH0338812A JP H0338812 A JPH0338812 A JP H0338812A JP 17530389 A JP17530389 A JP 17530389A JP 17530389 A JP17530389 A JP 17530389A JP H0338812 A JPH0338812 A JP H0338812A
Authority
JP
Japan
Prior art keywords
sheet
electrodes
electrode
sheetlike
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17530389A
Other languages
Japanese (ja)
Inventor
Kiyoji Handa
半田 喜代二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marcon Electronics Co Ltd
Original Assignee
Marcon Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marcon Electronics Co Ltd filed Critical Marcon Electronics Co Ltd
Priority to JP17530389A priority Critical patent/JPH0338812A/en
Publication of JPH0338812A publication Critical patent/JPH0338812A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a laminated capacitor whose volume efficiency is high at a high breakdown strength and whose reliability is excellent by a method wherein three kinds of sheetlike electrodes exposed on three different end faces are used and any of one kind of sheetlike electrode used as a common electrode and the two other kinds of sheetlike electrodes are piled up alternately. CONSTITUTION:Three kinds of sheetlike electrodes 1 to 3 are used as sheetlike electrodes; one end each of these sheetlike electrodes 1 to 3 is exposed on three different end faces of a laminated element to be formed. The laminated element is formed in such a way that any of one kind of sheetlike electrode is used as the common electrode 1 and that this common electrode 1 and the two other kinds of sheetlike electrodes 2, 3 are laminated so as to be piled up alternately. Thereby, it is possible to obtain a laminated capacitor whose volume efficiency is high at a high breakdown strength and whose reliability is excellent; this capacitor contributes to a large capacity of a small-sized laminated capacitor for high voltage use.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、積層コンデンサに関し、特に、その内部電極
の積層構造に係る。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a multilayer capacitor, and particularly to a multilayer structure of internal electrodes thereof.

[従来の技術] 従来、積層コンデンサの製造に当たっては、形成される
積層素子の一方の端面に露出し、且つ反対側の端面にマ
ージン部を有するような2種類のシート状電極を、互い
の電極露出端が反対側に位置するように、シート状誘電
体を介して交互に積層し、この後、形成された積層素子
の電極露出面に外部電極を設けている。第6図は、この
ような従来の一般的な積層コンデンサを示す図であり、
11.12は2種類のシート状電極、13はシート状誘
電体、14は外部電極である。
[Prior Art] Conventionally, in manufacturing a multilayer capacitor, two types of sheet-like electrodes, which are exposed on one end surface of a multilayer element to be formed and have a margin portion on the opposite end surface, are connected to each other. They are alternately laminated with sheet-like dielectrics in between so that the exposed ends are located on opposite sides, and then external electrodes are provided on the electrode exposed surfaces of the formed laminated elements. FIG. 6 is a diagram showing such a conventional general multilayer capacitor,
11 and 12 are two types of sheet-like electrodes, 13 is a sheet-like dielectric, and 14 is an external electrode.

ところで、このような構成の積層コンデンサにおいては
、耐電圧を高くした場合に、体積当たりの静電容量が低
下してしまうという欠点がある。
By the way, a multilayer capacitor having such a structure has a drawback in that when the withstand voltage is increased, the capacitance per volume decreases.

この理由を以下に説明する。即ち、誘電体の厚さは、製
品となるコンデンサの耐電圧に応じて決定されているが
、耐電圧と誘電体の厚さとは理論上は正比例するものの
、実際は一定の割合で誘電体の厚さを大きくしても、耐
電圧を同じ割合で増大させることは不可能である。例え
は、最も代表的な積層コンデンサの一つとして、積層セ
ラミ・ンクコンデンサが存在するが、この積層セラミッ
クコンデンサにおける誘電体の厚さと耐電圧との関係は
、第8図に示す通りである。この第8図に示すように、
誘電体の厚さを50μmとした場合の実際の耐電圧は、
0.76kVであるのに対し、誘電体の厚さを2倍の1
00μmとした場合の実際の耐電圧は、2倍の1.52
kVとはならず、]、。
The reason for this will be explained below. In other words, the thickness of the dielectric is determined according to the withstand voltage of the product capacitor.Although in theory the withstand voltage and the thickness of the dielectric are directly proportional, in reality the thickness of the dielectric is determined at a certain rate. Even if the resistance is increased, it is impossible to increase the withstand voltage at the same rate. For example, one of the most typical multilayer capacitors is a multilayer ceramic capacitor, and the relationship between the dielectric thickness and withstand voltage in this multilayer ceramic capacitor is as shown in FIG. As shown in this Figure 8,
The actual withstand voltage when the dielectric thickness is 50 μm is:
0.76 kV, while the dielectric thickness is doubled to 1.
00μm, the actual withstand voltage is twice as high as 1.52
It is not kV, ],.

20kVと、1.6倍弱程度に止どまっており、実際の
耐電圧を2倍の1.52kVとするためには、誘電体の
厚さを3倍の150μm以−にとしなければならない。
20 kV, which is just under 1.6 times as high. In order to double the actual withstand voltage to 1.52 kV, the thickness of the dielectric must be tripled to 150 μm or more. .

一方、コンデンサの静電容量は誘電体の厚さに反比例す
るから、コンデンサの耐電圧を高くするほど、必然的に
体積当たりの静電容量(以下、体積効率と称する)が低
下してしまうのである。従って、特に製品寸法が制限さ
れているような小型の高電圧用積層コンデンサを、第6
図の構造とした場合、大きな静電容量を得ることは困難
である。
On the other hand, since the capacitance of a capacitor is inversely proportional to the thickness of the dielectric, the higher the withstand voltage of the capacitor, the lower the capacitance per volume (hereinafter referred to as volumetric efficiency) will inevitably be. be. Therefore, especially for small high-voltage multilayer capacitors whose product dimensions are limited,
With the structure shown in the figure, it is difficult to obtain a large capacitance.

第7図は、以上のような欠点を回避するために提案され
た積層コンデンサを示している。この第7図の積層コン
デンサは、形成される積層素子の両側の端面にそれぞれ
露出し、且つ中央部にマシンを有する第1のシート状電
極15と、この第1のシート状電極15の電極露出面と
なる両端面にマージンを有する第2のシート状電極16
とを使用し、これらを、シート状誘電体17を介して交
互に積層してなるものである。このような第7図の積層
コンデンサにおいては、2個のコンデンサを直列に接続
した構造となり、印加電圧が半分になるため、シート状
誘電体17の厚さが同じ場合、第6図の構造の積層コン
デンサに比べて耐電圧が2倍になる。しかしながら、第
7図の積層コンデンサにおいては、素子の中央部に設け
られたマージン部分が静電容量に寄与しない無駄な体積
となる。即ち、素子の中間部に設けられるマージン部分
は、定格電圧に応して一定寸法以」二とる必要があるか
、特に、小型の高電圧用積層コンデンザでは、素子全体
の寸法に対するマージンの寸法文の比率が高くなるため
、それだけ体積効率が低下し、結局小型で大容量の高電
圧用積層コンデンサを得ることは困難となる。
FIG. 7 shows a multilayer capacitor proposed to avoid the above drawbacks. The multilayer capacitor shown in FIG. 7 includes a first sheet-like electrode 15 that is exposed on both end faces of the multilayer element to be formed and has a machine in the center, and an exposed electrode of the first sheet-like electrode 15. A second sheet-like electrode 16 having margins on both end faces
These are alternately laminated with sheet-like dielectric material 17 interposed therebetween. The multilayer capacitor shown in FIG. 7 has a structure in which two capacitors are connected in series, and the applied voltage is halved. Therefore, if the thickness of the sheet dielectric 17 is the same, the structure shown in FIG. The withstand voltage is twice that of a multilayer capacitor. However, in the multilayer capacitor shown in FIG. 7, the margin portion provided at the center of the element becomes a wasted volume that does not contribute to capacitance. In other words, does the margin provided in the middle of the element need to be larger than a certain size depending on the rated voltage?In particular, in the case of small-sized, high-voltage multilayer capacitors, the size of the margin relative to the overall element size must be As the ratio of .

また、積層セラミックコンデンサの製造に当たっては、
誘電体粉末とバインダとなる樹脂とを混合し、一定の厚
さのシート状誘電体を底形し、この」二にシート状電極
を付着形成して積み重ね、加圧して一体化しているため
、第7図の構造とした場合には、加圧−像化の際に、中
央部のマージン部分だけ部分的に密度が低くなってしま
う。この結果、焼成体の中央部分の密度が低くなり、回
部の機械的な強度が低下したり、或いは電極とセラミッ
ク誘電体の密着強度が弱くなり、層はがれを生じ易くな
り、電気的な特性や信頼性が低下してしまう。
In addition, when manufacturing multilayer ceramic capacitors,
Dielectric powder and binder resin are mixed, a sheet-like dielectric of a certain thickness is formed into a bottom shape, and sheet-like electrodes are attached and stacked on top of this dielectric, which is then integrated by applying pressure. In the case of the structure shown in FIG. 7, during pressurization and imaging, the density becomes partially low in the central margin area. As a result, the density in the central part of the fired body decreases, and the mechanical strength of the circular part decreases, or the adhesion strength between the electrode and the ceramic dielectric decreases, making it easy for layers to peel off, and the electrical properties and reliability will decrease.

[発明が解決しようとする課題] 本発明は、」二連した従来技術の課題を解決するために
提案されたものであり、その目的は、耐電圧を高くした
場合における体積効率が高く、しかも信頼性に優れた積
層コンデンサを提供することにより、小型の高電圧用積
層コンデンサの大容量化に寄与することである。
[Problems to be Solved by the Invention] The present invention has been proposed in order to solve the two problems of the prior art, and its purpose is to achieve high volumetric efficiency when the withstand voltage is increased, and By providing a highly reliable multilayer capacitor, we can contribute to increasing the capacity of small, high-voltage multilayer capacitors.

[課題を解決するための手段] 本発明による積層コンデンサは、シート状電極として、
3種類のシート状電極を使用し、これらのシート状電極
を、形成される積層素子の異なる3方の端面に、それぞ
れの一端を露出させるものとし、且つ積層素子を、いず
れか1種類のシート状電極を共通電極としてこの共通電
極と他の2種類のシート状電極とを交互に重ね合わせる
ように積層して形成したことを特徴としている。
[Means for Solving the Problems] The multilayer capacitor according to the present invention has a sheet-like electrode,
Three types of sheet-like electrodes are used, and one end of each of these sheet-like electrodes is exposed on three different end faces of the laminated element to be formed, and the laminated element is made of any one type of sheet. It is characterized in that it is formed by using a common electrode as a common electrode and stacking this common electrode and two other types of sheet-like electrodes so as to overlap each other alternately.

また、積層コンデンサと外部との接続に当たっては、積
層体の電極露出面に外部電極を設けることが考えられる
Furthermore, in connecting the multilayer capacitor to the outside, it is conceivable to provide an external electrode on the exposed electrode surface of the multilayer body.

[作用] 以」二のような構成を有する本発明の積層コンデンサは
、2個のコンデンサを直列に接続した構造であるため、
第6図に示したような、従来の一般的な構造を有する積
層コンデンサと、製品寸法、誘電体の厚さ、積層数を同
一とした場合、この従来技術に比べて、静電容量は1.
/2、耐電圧は2倍となり、耐電圧を高くしても、体積
効率が低下することがない。このように、本発明におい
ては、耐電圧を高くしても、高い体積効率を得られるた
め、小型の高電圧用積層コンデンサの大容量化に貢献で
きる。また、第7図に示した従来技術のように、中央部
にマージンを設けることもないため、特に積層セラミッ
クコンデンザに適用した場合には、機械的強度や密着強
度における弱点もなく、信頼性の高い積層コンデンサを
得られる。
[Function] Since the multilayer capacitor of the present invention having the configuration as described below has a structure in which two capacitors are connected in series,
When the product dimensions, dielectric thickness, and number of laminated layers are the same as that of a conventional multilayer capacitor having a general structure as shown in Fig. 6, the capacitance is 1 ..
/2, the withstand voltage is doubled, and even if the withstand voltage is increased, the volumetric efficiency will not decrease. As described above, in the present invention, even if the withstand voltage is increased, a high volumetric efficiency can be obtained, so that it can contribute to increasing the capacity of a small-sized multilayer capacitor for high voltage. In addition, unlike the conventional technology shown in Figure 7, there is no margin provided at the center, so when applied to multilayer ceramic capacitors, there is no weakness in mechanical strength or adhesion strength, resulting in improved reliability. It is possible to obtain a multilayer capacitor with high performance.

[実施例] 以下に、本考案による積層コンデンサの一実施例を第1
図乃至第4図を参照して具体的に説明する。
[Example] Below, a first example of a multilayer capacitor according to the present invention will be described.
This will be explained in detail with reference to FIGS. 4 to 4.

第1図は、本実施例の積層コンデンサを示す図であり、
図中1〜3は、第1乃至第3のシート状電極、4はシー
ト状誘電体である。ここで第1のシート状電極1は、積
層素子の長平方向に沿った第1の端面S1に電極を露出
させ、且つ共通電極となるシート状電極であり、第2の
シート状電極2は、積層素子の長平方向両側の第2、第
3の端面S2.S3に電極を露出させるシート状電極で
ある。そして、積層素子の」一方においては、第1のシ
ート状電極1と、第2のシート状電極2とが交互に重ね
合わされ、積層素子の下方においては、第1のシート状
電極1と第3のシート状電極3とが交互に重ね合わされ
ている。
FIG. 1 is a diagram showing a multilayer capacitor of this example,
In the figure, 1 to 3 are first to third sheet-like electrodes, and 4 is a sheet-like dielectric. Here, the first sheet-like electrode 1 is a sheet-like electrode that exposes the electrode on the first end surface S1 along the longitudinal direction of the laminated element and serves as a common electrode, and the second sheet-like electrode 2 is Second and third end faces S2 on both sides in the longitudinal direction of the laminated element. This is a sheet-like electrode that exposes the electrode to S3. Then, on one side of the laminated element, the first sheet-like electrode 1 and the second sheet-like electrode 2 are stacked alternately, and on the lower side of the laminated element, the first sheet-like electrode 1 and the third sheet-like electrode Sheet electrodes 3 are alternately stacked on top of each other.

次に、本実施例の積層コンデンサの製造工程を説明する
Next, the manufacturing process of the multilayer capacitor of this example will be explained.

■高誘電系セラミック誘電体の微粉末にバインダを加え
、ボールミルで混合してスラリーとし、ドクターブレー
ド法により、厚さ50μmの誘電体シートを成形し、一
定寸法に打ち抜く。
■ Add a binder to fine powder of high dielectric ceramic dielectric, mix in a ball mill to make a slurry, form a dielectric sheet with a thickness of 50 μm using the doctor blade method, and punch out to a certain size.

■2種類の印刷パターンを使用し、パラジウム粉末と有
機ビヒクルよりなる電極ペーストを誘電体シート」二に
スクリーン印刷法で塗布し、乾燥して、第2図(A)(
B)に示すような、第1、第2の印刷シー)・PI、P
2を形成する。ここで、第1の印刷シー)P+は、シー
ト状誘電体4」二に、第1のシート状電極1となる第1
の電極パターン5を形成してなるものであり、第2の印
刷シー1− P2は、シート状誘電体4上に、第2、第
3のシト状電極2,3となる第2の電極パターン6を形
成してなるものである。また、7はカットマークである
■Using two types of printing patterns, an electrode paste consisting of palladium powder and an organic vehicle is applied to a dielectric sheet by screen printing, dried, and then dried as shown in Figure 2 (A).
B) The first and second printing sheets)・PI, P
form 2. Here, the first printed sheet) P+ is applied to the sheet-like dielectric material 4'' and the first sheet-like electrode 1, which becomes the first sheet-like electrode 1.
The second printed sheet 1-P2 is formed by forming an electrode pattern 5 on the sheet-like dielectric material 4, which becomes the second and third sheet-like electrodes 2 and 3. 6. Further, 7 is a cut mark.

■第1、第2の印刷シートp、、p2を各20枚ずつ用
意し、このうちの10枚ずつを、それぞれのカットマー
ク7が一致するように位置決めして交互に積み重ねる。
(2) Prepare 20 each of the first and second printing sheets p, p2, position each 10 of them so that their cut marks 7 match, and stack them alternately.

続いて残り10枚の第2の印刷シートP2を平面上で1
80°回転し、残り10枚の第1の印刷シートP1の方
向はそのままとして、カットマーク7が一致するように
位置決めして交互に積み重ねる。第3図は、このような
積層方法を示す斜視断面図である。この後、積層体の」
二下に、電極を印刷していないシート状誘電体4を各5
枚ずつ積み重ねる。
Next, the remaining 10 second printing sheets P2 are placed 1 on a flat surface.
The remaining ten first printed sheets P1 are rotated by 80 degrees, and while the orientation of the remaining ten first printed sheets P1 remains unchanged, they are positioned so that the cut marks 7 coincide with each other and stacked alternately. FIG. 3 is a perspective sectional view showing such a lamination method. After this, the laminate
5 sheets of dielectric material 4 without printed electrodes are placed below the second layer.
Stack them one by one.

■積層体全体を加熱プレスし、完全に圧着した後、カッ
トマーク7の位置で縦横に切断する。この後、高温で焼
結し、第1図に示すような積層素子を作戊する。
(2) After the entire laminate is hot-pressed and completely crimped, it is cut vertically and horizontally at the cut mark 7 position. Thereafter, it is sintered at a high temperature to produce a laminated element as shown in FIG.

以」二■〜■に示すような工程で、長さ4.5mm、幅
3.2mm、厚さ1.5mmの素子を形成し、続いて、
内部電極の露出面(3箇所)に銀ペストを焼付けて、第
4図に示すような、外部電極5を有するチップ形のコン
デンサを作製すると共に、比較例1,2として、それぞ
れ第6図及び第7図に示した従来の構造により、同じ製
品寸法のコンデンサを作製した。即ち、比較例1として
は、厚さ100μmの同じ材質のシート状誘電体上に同
じ第4質のシート状電極を形成し、積層数20層にて第
6図に示した構造の積層セラミックコンデンサを作製し
、比較例2としては、厚さ50μmの同じ材質のシート
状誘電体上に同じ材質のシート状電極を形成し、積層数
40層にて第7図に示した構造の積層セラミックコンデ
ンサを作製した。このようにして得られた本実施例のコ
ンデンサと比較例1,2のコンデンサについて、各種の
特性試験を行ったところ、表1及び表2に示すような結
果が得られた。
By the steps shown in "2" to "■", an element of length 4.5 mm, width 3.2 mm, and thickness 1.5 mm was formed, and then
A chip-shaped capacitor having an external electrode 5 as shown in FIG. 4 was manufactured by baking silver paste on the exposed surface (3 locations) of the internal electrode, and as Comparative Examples 1 and 2, FIGS. Capacitors with the same product dimensions were manufactured using the conventional structure shown in FIG. That is, in Comparative Example 1, a sheet-like electrode of the same quaternary material was formed on a sheet-like dielectric of the same material with a thickness of 100 μm, and a multilayer ceramic capacitor having the structure shown in FIG. 6 was obtained by laminating 20 layers. In Comparative Example 2, a sheet-like electrode made of the same material was formed on a sheet-like dielectric material made of the same material with a thickness of 50 μm, and a multilayer ceramic capacitor having the structure shown in FIG. 7 was fabricated with 40 layers. was created. Various characteristic tests were conducted on the thus obtained capacitor of this example and the capacitors of Comparative Examples 1 and 2, and the results shown in Tables 1 and 2 were obtained.

まず、表1は、3種類のコンデンサについて、それぞれ
10個の試料を使用し、それぞれの静電容量の平均値及
び絶縁破壊電圧の平均値を調べた結果を示している。
First, Table 1 shows the results of examining the average value of capacitance and average value of dielectric breakdown voltage for three types of capacitors using 10 samples each.

表1 この表1から、本実施例のコンデンサは、比較例1に対
しては、等しい静電容量を得ながら、直流破壊電圧か6
0%も向」ニしており、また、比較例2に対しては、1
.4倍の静電容量を有しながら、直流破壊電圧も、14
%程度上昇していることがわかる。
Table 1 From Table 1, it can be seen that the capacitor of the present example has a DC breakdown voltage of 6.5% compared to Comparative Example 1 while obtaining the same capacitance.
The difference was 0%, and compared to Comparative Example 2, it was 1%.
.. Although it has four times the capacitance, the DC breakdown voltage is also 14
It can be seen that it has increased by about %.

次に、表2は、3種類のコンデンサについて、それぞれ
55個の試料を使用し、温度125℃、電圧250Vd
c、試験時間5000hの寿命試験を行った結果を示し
ている。
Next, Table 2 shows three types of capacitors using 55 samples each, temperature 125°C, voltage 250Vd.
c shows the results of a life test with a test time of 5000 hours.

表2 この表2から、比較例1、比較例2においては、それぞ
れ5000時間当たりの不良数が55個山土2個或いは
7個と、10%乃至20%も発生しており、1000時
間当たりの故障率をとっても、4.4%と2.5%と高
いのに対し、本実施例においては、55個中手良は零で
あり、故障率は、0.33%以下と低く、本実施例のコ
ンデンサの寿命が比較例1.2に比べて大幅に向上して
いることは明らかである。
Table 2 From Table 2, in Comparative Example 1 and Comparative Example 2, the number of defects per 5000 hours was 55, 2 and 7, respectively, which was 10% to 20%, and the number of defects per 1000 hours was 10% to 20%. Although the failure rates of these are high at 4.4% and 2.5%, in this example, the number of failures out of 55 is zero, and the failure rate is as low as 0.33% or less. It is clear that the life of the capacitor of Example is significantly improved compared to Comparative Example 1.2.

さらに、中央部にマージンを有する比較例2のコンデン
サにおいては、中央部だけ部分的に密度が低くなり、機
械的な強度や密着強度が弱くなり、電気的な特性や信頼
性が低下してしまう欠点があるのに対し、本実施例のコ
ンデンサは、このよう1 な強度的な弱点がないため、電気的な特性や信頼性に優
れている。
Furthermore, in the capacitor of Comparative Example 2 which has a margin in the center, the density is partially lowered only in the center, the mechanical strength and adhesion strength are weakened, and the electrical characteristics and reliability are reduced. In contrast to the drawbacks, the capacitor of this embodiment has no such weak point in terms of strength and has excellent electrical characteristics and reliability.

なお、本発明は、前記実施例に限定されるものではなく
、具体的な積層数や定格、製品寸法などは自IJ:l+
こ選択可能である。また、前記実施例においては、第4
図に示すように、内部電極の露出面(3箇所)に銀ペー
ストを焼(=Iけて、外部電極5を設けたが、さらに、
必要に応じて、第5図に示すように、リード線6を半田
7などにより電気的に接続し、外装材8で被覆すること
も可能である。
Note that the present invention is not limited to the above embodiments, and the specific number of laminated layers, ratings, product dimensions, etc.
This can be selected. Furthermore, in the embodiment, the fourth
As shown in the figure, silver paste was burnt on the exposed surfaces (3 locations) of the internal electrodes to provide external electrodes 5.
If necessary, as shown in FIG. 5, the lead wires 6 can be electrically connected with solder 7 or the like and covered with an exterior material 8.

[発明の効果] 以」二説明したように、本発明においては、異なる3方
の端面に露出する3種類のシート状電極を使用し、いず
れか1種類のシート状電極を共通電極として他の2種類
のシート状電極と交互に重ね合わせるように積層すると
いう簡単な構成の改良により、耐電圧を高くした場合に
おける体積効率が高く、しかも信頼性に優れた積層コン
デンサを提供できるため、小型の高電圧用積層コンデン
サの大容量化に寄与することができる。
[Effects of the Invention] As explained below, in the present invention, three types of sheet-like electrodes exposed on three different end faces are used, and one type of sheet-like electrode is used as a common electrode and the other sheet-like electrodes are connected to each other. By simply improving the structure by stacking two types of sheet-shaped electrodes and stacking them alternately, we can provide a multilayer capacitor with high volumetric efficiency and excellent reliability when the withstand voltage is increased. It can contribute to increasing the capacity of high-voltage multilayer capacitors.

 zz

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例による積層コンデンサの積層
構造を示す図であり、第1図(A)は斜視図、第1図(
B)は第1図(A)のA−A線断面図、第1図(C)は
第1図(A)のB−B線断面図、第2図は同実施例の製
造工程において使用する印刷シートを示す図であり、第
2図(A)は共通電極となる電極パターンを印刷した第
1の印刷シートを示す平面図、第2図(B)はその他の
シート状電極となる電極パターンを印刷した第2の印刷
シートを示す平面図、第3図は第2図に示した印刷シー
トの積層方法を示す斜視断面図、第4図は同実施例にお
いて作成したチップ形のコンデンサを示す斜視図、第5
図は本発明の異なる実施例を示す断面図である。 第6図及び第7図は従来の異なる積層コンデンサを示す
断面図であり、第8図は、積層セラミックコンデンサに
おける誘電体の厚さと耐電圧との関係を示すグラフであ
る。 1・・・第1のシート状電極(共通電極)、2・・・第
2のシート状電極、3・・・第3のシート状電極、4・
・・シート状誘電体、5・・外部電極、6・・・リード
線、7・・・半田、8・・・外装材、81〜S3・・・
積層素子の端面、PI、P2・・・印刷シート。 11.12,15.16・・・シート状電極、13゜1
7・・・シート状誘電体、14・・・外部電極。
FIG. 1 is a diagram showing the laminated structure of a multilayer capacitor according to an embodiment of the present invention, and FIG. 1(A) is a perspective view, and FIG.
B) is a cross-sectional view taken along the line A-A in Figure 1 (A), Figure 1 (C) is a cross-sectional view taken along the line B-B in Figure 1 (A), and Figure 2 is used in the manufacturing process of the same example. FIG. 2(A) is a plan view showing a first printed sheet on which an electrode pattern that becomes a common electrode is printed, and FIG. 2(B) shows an electrode that becomes another sheet-like electrode. FIG. 3 is a plan view showing a second printed sheet with a pattern printed thereon, FIG. 3 is a perspective cross-sectional view showing a method of laminating the printed sheets shown in FIG. 2, and FIG. Perspective view shown, fifth
The figures are cross-sectional views showing different embodiments of the invention. 6 and 7 are cross-sectional views showing different conventional multilayer capacitors, and FIG. 8 is a graph showing the relationship between dielectric thickness and withstand voltage in a multilayer ceramic capacitor. DESCRIPTION OF SYMBOLS 1... 1st sheet-like electrode (common electrode), 2... 2nd sheet-like electrode, 3... 3rd sheet-like electrode, 4...
... Sheet dielectric, 5... External electrode, 6... Lead wire, 7... Solder, 8... Exterior material, 81-S3...
End face of laminated element, PI, P2...Printed sheet. 11.12, 15.16...Sheet electrode, 13゜1
7... Sheet-like dielectric material, 14... External electrode.

Claims (2)

【特許請求の範囲】[Claims] (1)複数のシート状電極を、シート状誘電体を介して
積層し、積層素子を形成してなる積層コンデンサにおい
て、 前記シート状電極として、3種類のシート状電極を使用
し、これらのシート状電極を、形成される積層素子の異
なる3方の端面に、それぞれの一端を露出させるものと
し、且つ積層素子を、いずれか1種類のシート状電極を
共通電極としてこの共通電極と他の2種類のシート状電
極とを交互に重ね合わせるように積層して形成したこと
を特徴とする積層コンデンサ。
(1) In a multilayer capacitor formed by laminating a plurality of sheet-like electrodes via a sheet-like dielectric material to form a multilayer element, three types of sheet-like electrodes are used as the sheet-like electrodes, and these sheet-like electrodes are One end of each of the sheet-shaped electrodes is exposed on three different end faces of the laminated element to be formed, and one of the sheet-shaped electrodes is used as a common electrode, and this common electrode and the other two A multilayer capacitor characterized by being formed by laminating different types of sheet-like electrodes in an alternating manner.
(2)積層素子の電極露出面に外部電極を設けたことを
特徴とする特許請求の範囲第1項記載の積層コンデンサ
(2) The multilayer capacitor according to claim 1, characterized in that an external electrode is provided on the exposed electrode surface of the multilayer element.
JP17530389A 1989-07-05 1989-07-05 Laminated capacitor Pending JPH0338812A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17530389A JPH0338812A (en) 1989-07-05 1989-07-05 Laminated capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17530389A JPH0338812A (en) 1989-07-05 1989-07-05 Laminated capacitor

Publications (1)

Publication Number Publication Date
JPH0338812A true JPH0338812A (en) 1991-02-19

Family

ID=15993741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17530389A Pending JPH0338812A (en) 1989-07-05 1989-07-05 Laminated capacitor

Country Status (1)

Country Link
JP (1) JPH0338812A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019046877A (en) * 2017-08-30 2019-03-22 Tdk株式会社 Electronic component device
JP2019046876A (en) * 2017-08-30 2019-03-22 Tdk株式会社 Multilayer capacitor
JP2019062023A (en) * 2017-09-25 2019-04-18 Tdk株式会社 Electronic component device
JP2019062022A (en) * 2017-09-25 2019-04-18 Tdk株式会社 Electronic component device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63188925A (en) * 1987-01-30 1988-08-04 株式会社村田製作所 Laminated ceramic capacitor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63188925A (en) * 1987-01-30 1988-08-04 株式会社村田製作所 Laminated ceramic capacitor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019046877A (en) * 2017-08-30 2019-03-22 Tdk株式会社 Electronic component device
JP2019046876A (en) * 2017-08-30 2019-03-22 Tdk株式会社 Multilayer capacitor
JP2019062023A (en) * 2017-09-25 2019-04-18 Tdk株式会社 Electronic component device
JP2019062022A (en) * 2017-09-25 2019-04-18 Tdk株式会社 Electronic component device
US11373807B2 (en) 2017-09-25 2022-06-28 Tdk Corporation Electronic component device

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