JPH0563007B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multilayer ceramic capacitor.

[Prior Art] A plurality of internal electrodes are formed inside a ceramic laminate that forms the main body of a multilayer ceramic capacitor. Furthermore, external electrodes are formed on both end faces of the ceramic laminate. Focusing on the state in which the internal electrodes are formed in the ceramic laminate, the internal electrodes are formed so as to reach the end surface where the external electrodes to be connected are formed, but in other parts, A margin is left. That is, an end margin is left on the end face where the external electrode is formed and is not connected to the internal electrode, and a side margin is left on each side of the ceramic laminate.

Normally, when manufacturing multilayer ceramic capacitors in large quantities, one large ceramic green sheet is printed with conductive films that are to become internal electrodes arranged vertically and horizontally. A plurality of sheets are stacked and then cut. Therefore, when using such a process, it is necessary to take into account errors in the process of printing the conductive film, errors in the process of stacking the ceramic green sheets, and errors in the process of cutting the stacked sheets. Therefore, if the end margins and side margins are set too loosely, the above-mentioned errors may be superimposed, which may cause a problem in that the predetermined margins are not formed. For example, if the side margin is smaller than a predetermined value, internal electrodes may be exposed from the sides of the ceramic laminate as a result of the cutting process.
When the internal electrodes are exposed, the obtained multilayer ceramic capacitor has poor voltage resistance with the outside, and there is a possibility that an undesired electrical connection with the external electrodes may occur.

As described above, as long as the above-described normal manufacturing method is used, the end margin and side margin must be formed with enough margin to allow for errors. Therefore, the area of the mutually overlapping portions of the internal electrodes has to be small, and particularly in small multilayer ceramic capacitors, it is not possible to achieve a very high capacitance acquisition efficiency.

In order to solve the above-mentioned problems, in the cutting process, the sides forming the side margins are
For example, Japanese Patent Publication No. 53-23496 describes a technique in which internal electrodes are actively exposed and portions functioning as side margins are formed later.

In this conventional technique, after the ceramic is fired, it is cut, and the cut surface where the internal electrodes are exposed is coated with glaze and fired. The glaze has insulating properties and acts as a side margin for the internal electrodes.

By applying the glaze later as described above, errors in the printing process, stacking process, and cutting process of the conductive film, which had to be taken into consideration in conventional manufacturing methods, can be avoided. Even without consideration, the glaze reliably forms side margins, making it possible to form internal electrodes across the entire width between both sides of the ceramic laminate.
Capacitance acquisition efficiency can be increased.

[Problems to be Solved by the Invention] The above-mentioned glaze is made of glass, which is a material different from ceramic. Therefore, it has been found that the following problems occur due to the properties of glass.

First, the obtained multilayer ceramic capacitor is
Weak against heat shots. This is because glass and ceramic have different coefficients of thermal expansion.

Additionally, the thickness of the glass layer formed by baking the glaze is relatively difficult to control. This is because when baking the glaze,
This is because the glass may melt and the initial amount of adhesion may not be maintained until after baking. That is, the thickness of the glass after baking is delicately influenced by the surface tension during melting.

Further, since glass has a lower dielectric constant than ceramic, electric field concentration occurs in the glass portion, resulting in a decrease in voltage resistance.

In addition, since the dielectric loss of glass is relatively large,
The resulting multilayer ceramic capacitor also has a large dielectric loss.

Furthermore, the baking of the glaze must be carried out again after the ceramic is sintered. Further, when baking the glaze, they must be kept apart from each other to prevent welding with other ceramic laminates. For these reasons, productivity is not so high.

Therefore, the present invention aims to provide a multilayer ceramic capacitor that can solve the above-mentioned problems.

[Means for Solving the Problems] The present invention provides a rectangular parallelepiped-shaped ceramic laminate including a plurality of ceramic dielectric layers stacked together and having an upper surface, a lower surface, opposing side surfaces, and opposing end surfaces. , an external electrode formed on each end face of the ceramic laminate, and an external electrode formed between the ceramic dielectric layers so as to face each other with the ceramic dielectric layer sandwiched between them inside the ceramic laminate, and an external electrode formed on one of the external electrodes. A plurality of internal electrodes are formed to reach the end face of the ceramic laminate on which the external electrodes are formed so as to be connected to the electrodes, and each internal electrode is formed with an external electrode that is not connected to the internal electrodes. The multilayer ceramic capacitor is formed so as to leave an end margin on the edge of the ceramic laminate, and a side margin on each side of the ceramic laminate. resolved to.

In other words, the portions forming the side margins of the ceramic laminate are coated with a slurry of the same ceramic material as the ceramic dielectric layer in the ceramic laminate, excluding the side margin portions, during the unfired stage of the ceramic laminate. It is obtained when a layer is added and the ceramic laminate is fired together in that state, and the thickness of the layer is 200 μm or less.

[Operations and Effects of the Invention] According to the present invention, side margins for internal electrodes are formed with a layer having a thickness of 200 μm or less. Therefore, the width of the internal electrodes that occupies the width of the ceramic laminate can be increased, the capacitance acquisition efficiency can be increased, and the equivalent series resistance can be reduced.

In addition, since the part forming the side margin is made of the same ceramic material that makes up the rest of the ceramic laminate, that is, the common material,
Thermal expansion coefficients match, improving heat shock resistance.

Further, since the ceramic material forming the side margin does not melt during baking unlike glaze, its thickness can be easily controlled.

Further, since ceramic has a smaller dielectric loss than glass, the dielectric loss as a capacitor is smaller than when the side margin is formed of glass.

In addition, the ceramic material forming the side margin is added to the ceramic laminate at an unfired stage, and after this addition, the ceramic laminate including the side margin part is fired as a whole, so that after the ceramic is fired, Productivity is improved compared to baking the glaze. Further, unlike in the case of glaze baking, there is no need to consider mutual welding, which also leads to improved productivity.

[Embodiment] FIG. 1 is a perspective view showing the appearance of a multilayer ceramic capacitor 26 according to an embodiment of the present invention. In order to clarify the structure of this multilayer ceramic capacitor 26, a method of manufacturing the multilayer ceramic capacitor 26 will be explained with reference to FIGS. 2 to 7.

First, a plurality of ceramic green sheets 11 as shown in FIG. 2, which will become ceramic dielectric layers, are prepared. Each ceramic green sheet 11 has a plurality of conductive films 12 to serve as internal electrodes.
They are formed by, for example, printing, arranged in a horizontal direction and spaced apart from each other via gaps 13, and then dried. In this embodiment, each conductive film 12 is
is formed in a strip-like state extending in the vertical direction.

After drying the printed conductive film 12, a plurality of semi-conductive green sheets 11 are stacked in a positional relationship as shown in FIG. In this embodiment, conductive films 12 formed with the same pattern are used.
A predetermined number of ceramic green sheets 11 having the same shape are stacked while changing their orientation by alternately rotating them by 180 degrees in a horizontal plane.
In this stacked state, the gap 13 on one ceramic green sheet 11 and the conductive film 12 on another ceramic green sheet 11 (approximately the center of the conductive film 12 in this example) are aligned in the stacking direction. Furthermore, a predetermined number of ceramic green sheets on which no conductive film is formed are stacked on the upper and lower sides of the ceramic green sheets 11 stacked in this manner, if necessary.

Stacked ceramic green sheets 11
When pressed together, they constitute a laminate 14 as shown in FIG. This laminate 1
4, the positional relationship between each conductive film 12 and gap 13 is schematically shown.

The laminate 14 shown in FIG. 4 is then cut through its thickness by the laterally oriented cutting line 15 shown in FIG. 2, thereby producing a longitudinal laminate as shown in FIG. A body block 16 is formed. The conductive film 12 is exposed at a cut surface 17 along the cutting line 15 forming the side surface of the laminate block 16.

Next, as shown in FIG. 6, ceramic slurry 18 is applied to both cut surfaces 17 of the laminate block 16.
is applied. The thickness of this ceramic slurry 18 is selected to be about 50 to 200 μm after the subsequent firing, and particularly preferably about 50 μm. Note that the thickness of the ceramic slurry 18 can be precisely controlled by a printing method or a spray method.

The transferred ceramic slurry 18 is composed of the same ceramic material that constitutes the ceramic green sheet 11, ie, a co-base slurry. In this way, the ceramic green sheet 11
If the ceramic green sheet 11 and the ceramic slurry 18 are made of the same ceramic material, both can be fired under the same conditions in the firing process described later, and an abnormal reaction at the boundary between the ceramic green sheet 11 and the ceramic slurry 18 can be avoided. does not occur.

Note that the binder, solvent, and additives contained in the ceramic slurry 18 and their blending ratio may be selected depending on the method of applying the same. Further, the binder contained in the ceramic slurry 18 is preferably specified as either an organic solvent-based binder or a water-soluble binder in relation to the binder used in the ceramic green sheet 11. That is, if an organic solvent-based binder such as polyvinyl alcohol or polyvinyl butyral is used for the ceramic green sheet 11, a water-soluble binder such as polyvinyl acetate is used as the binder for the ceramic slurry 18; If a water-soluble binder is used for the ceramic green sheet 11, it is preferable to use an organic solvent-based binder for the ceramic slurry 18. This is to prevent the binder of the ceramic slurry 18 from dissolving the binder of the ceramic green sheet 11.

Next, the laminate block 16 shown in FIG.
A cut is made in the thickness direction at a position passing through the gap 13 by a longitudinally oriented cutting line 19 shown in FIGS. 2 and 4. As a result, a laminate chip 20 as shown enlarged in FIG. 7 is obtained. On each of the cut surfaces 21 forming both end surfaces of the multilayer chip 20, a conductive film 12 to be an internal electrode is provided.
is exposed. Note that different conductive films 12 are exposed on each of the two cut surfaces 21.

Rectangular parallelepiped-shaped laminate chip 2 as shown in FIG.
0 is fired. and. As shown in FIG. 1, external electrodes 22 and 23 are formed on each end face of the fired laminate chip 20. As shown in FIG. external electrode 22,
23 can be formed by applying a metal-containing paste and then baking it, or by plating. When the external electrodes 22 and 23 are formed in this way, the first group of internal electrodes provided with the conductive film 12 formed inside the multilayer chip 20 are replaced by the first external electrodes 22. Similarly, the second group of capacitors are connected to the second external electrode 23 to form a multilayer ceramic capacitor 26. Further, the layer of ceramic slurry 18 described above becomes a ceramic layer 18a that provides side margins for these internal electrodes after firing.

The characteristics of the multilayer ceramic capacitor obtained as described above will be explained in more detail in comparison with conventional capacitors with reference to FIGS. 8 and 9.

8 and 9 are two-dimensional diagrams showing the relationship in size between the ceramic portion 24 and the internal electrode 25, in order to clarify the comparison between multilayer ceramic capacitors having the same external dimensions. , the planar dimensions of the ceramic portion 24 are shown to be the same. The region where the internal electrode 25 is formed is shown by hatching, and the internal electrode 25 hidden inside the ceramic portion 24 is shown by a dotted line. Note that the units of numbers representing the dimensions entered in Fig. 8 and Fig. 9 are [mm], and the one shown in Fig. 8 is the conventional example, and the one shown in Fig. 9 is according to the present invention. .

When trying to obtain a small multilayer ceramic capacitor with external planar dimensions of 1.5 x 0.8 mm, conventionally, as shown in Figure 8, side margins have been set from the viewpoint of printing accuracy and cutting accuracy. It was manufactured with an end margin of 0.25mm in mind. Therefore, the ratio of the area of the overlapping portion of the internal electrode 25 to the total area of the ceramic portion 24 was (1.0×0.3)/(1.5×0.8)=0.25, that is, only reached 25%.
In addition, considering the deviation in the overlap of the internal electrodes 25 caused by errors in stacking the ceramic green sheets, the above-mentioned ratio has actually reached only 22 to 23%.

In contrast, in FIG. 9, the ceramic layer 18
If the thickness of a is 50 μm, it corresponds to this thickness.
There is only a 0.05mm portion corresponding to the side margin, and the aforementioned ratio is (1.0 x 0.7)/(1.5 x 0.8) = 0.58, making it possible to obtain 2.5 times the capacitance at once.

Furthermore, the variation in capacitance can be reduced from 30% in the past to 7 to 8% at 3CV.

FIG. 10 shows a perspective view of a multilayer ceramic capacitor 127 according to another embodiment of the invention. In order to clarify the structure of this multilayer ceramic capacitor 17, a manufacturing method thereof will be explained with reference to FIGS. 11 to 18.

First, as shown in FIGS. 11 and 12,
A plurality of unfired ceramic dielectric layers 112 each having a conductive film 111 to become an internal electrode formed thereon.
will be prepared. In this embodiment as well, the conductive film 111 extends in a strip shape and is formed in a plurality of rows.

In each of FIGS. 11 and 12,
The ceramic dielectric layer 112 shown above and the ceramic dielectric layer 112 shown below are identical to each other, but the upper and lower layers are rotated 180 degrees in the plane direction of the ceramic dielectric layer 112. ing.
That is, as a next step, a plurality of ceramic dielectric layers 112 are stacked alternately, one shown above and one shown below.

The stacking process as described above is performed on the workbench 113, as shown in FIGS. 13 and 14. After stacking the ceramic dielectric layers 112, the ceramic dielectric layers 112 are pressed together by pressing. In this state, the conductive film 111
are opposed to each other with the ceramic dielectric layer 112 in between. In addition, Figures 12 to 14
As can be seen, a certain ceramic dielectric layer 1
The gap between the plurality of conductive films 111 formed on the ceramic dielectric layer 112 is positioned so as to face approximately the center of a particular conductive film 111 formed on the ceramic dielectric layer 112.

The laminated structure 114 of the ceramic dielectric layers 112 stacked and crimped as described above is firmly fixed on a workbench 113 as shown in FIG. 14 in proceeding with the steps described below. For example, wax is used as this fixing means.

Next, as partially shown in FIG.
13 (not shown), a plurality of parallel cuts 115 are formed in the laminate structure 114. These cuts 115 are made along the plurality of cutting lines 116 shown in FIG. 13, for example.
It is formed by cutting with a blade approximately 300 μm thick. As a result, a plurality of rod-shaped blocks 117 are obtained. Since the cutting line 116 shown in FIG. 13 is at a position where the conductive film 111 is cut, the conductive film 111 is exposed on each cut surface of each block 117 obtained. The exposed edge of the conductive film 111 corresponds to the edge that should be adjacent to the side margin of the internal electrode of the multilayer ceramic capacitor 127 (FIG. 10) to be obtained.

Next, while being held on the workbench 113, as shown in FIG. 16, the notch 115 is filled with a ceramic slurry 118 that will later form a side margin. This ceramic slurry 118 is made of the same ceramic material that makes up the ceramic dielectric layer 112.
Note that when filling the ceramic slurry 118, care must be taken to prevent air from entering the notch 115. Therefore, for example, it may be advantageous to pour the ceramic slurry while applying a negative pressure, or to flow the ceramic slurry in the direction of the wind while blowing the wind. Furthermore, it is also conceivable to run a blade, the surface of which is coated with ceramic slurry, into the notch 115.

Next, while still being held on the workbench 113, the ceramic slurry 118 filled in the notch 115 is again cut into two, as shown in FIG. The cutting line obtained at this time is indicated by "119". This second cutting is performed with a blade that is thinner than the blade that previously formed the cut 115, for example, about 150 to 200 μm thick. In this way, the ceramic slurry 118 is divided and its thickness is further reduced. Each portion of the divided ceramic slurry 118 is attached to both sides of the block 117.

The cut is then performed with a 90 degree change in direction. That is, cutting is performed along the cutting line 120 shown in FIGS. 12, 13, and 14. Unfired ceramic laminate 1 obtained by this cutting
21 is shown enlarged in FIG. The ceramic laminate 121, like the laminate chip 20 shown in FIG. 7, has a rectangular parallelepiped shape having an upper surface, a lower surface, opposing side surfaces, and opposing end surfaces. In FIG. 18, the top surface 112, one side surface 123, and one end surface 124 are illustrated. The side surface 123 is located along the above-mentioned cutting line 119.
This occurred as a result of. In addition, the end surface 12
4 is formed by cutting along the cutting line 120 described above. In Fig. 18, end face 1
24, a specific part of the conductive film 111 is exposed, and although not shown, the remaining conductive film is also exposed on the other end face. The conductive film 111 left inside the ceramic laminate 121 serves as an internal electrode.

The green ceramic laminate 121 is then fired. As shown in FIG. 10, external electrodes 125 and 126 are formed on both end surfaces of the fired ceramic laminate 121.
25 and 126 can be formed by the same method as in the embodiment described above.

As shown in FIG. 10, the obtained multilayer ceramic capacitor 127 has a chip shape. Here, the ceramic slurry 118 described above becomes ceramic layers 118a extending along both side surfaces of the ceramic laminate 121, and the ceramic slurry 118
Sintered together as part of 0. And the first
This constitutes a side margin for the conductive film 111 (internal electrode) shown in FIG.

FIGS. 19 and 20 show a cross-sectional view of an example of a multilayer ceramic capacitor 30 according to the present invention. This multilayer ceramic capacitor 3
0 includes a plurality of internal electrodes 31, each forming a side margin 32. Also, the 21st
The figure shows a conventional multilayer ceramic capacitor 40 in cross-section. This multilayer ceramic capacitor 40 includes a plurality of internal electrodes 41, each forming a side margin 42.

These multilayer ceramic capacitors 30 and 4
0 is common, each side margin 3
It has the dimensional feature that the cross section in which 2 and 42 appear is substantially square. Further, the respective thicknesses of the outermost ceramic layers 33, 43 extending parallel to the respective internal electrodes 31, 41 are represented by "A" and "a", respectively. In addition, the width of the side margin 32 is represented by "B", and the width of the side margin 32 is expressed as "B".
The width of 2 is represented by "b".

First, in the conventional multilayer ceramic capacitor 40 shown in FIG. 21, the thickness a is determined by the thickness of the ceramic green sheets and the number of laminated sheets, and can be made relatively thin. Conventionally,
The thickness a was set to, for example, 100 μm or more. On the other hand, as described above, the width b cannot be made so short, and conventionally has a length of 250 μm or more.

In contrast, the multilayer ceramic capacitor 3 according to the present invention shown in FIGS. 19 and 20
0, the width B can be as short as about 50 to 200 μm. Therefore, the width B is the thickness A
In the ceramic capacitor 30, both the thickness A and the width B are equal to
The dimensions can be from 500 to 200 μm.

In each of FIGS. 19 and 20, the printed circuit board 34 is shown in a very simplified manner. In Figure 19, the multilayer ceramic capacitor 3
0 is mounted on the substrate 34 with its internal electrode 31 oriented parallel to the substrate 34. On the other hand,
In FIG. 20, a multilayer ceramic capacitor 30
is mounted on the substrate 34 with its internal electrode 31 oriented perpendicularly to the substrate 34. As mentioned above, the cross section of the multilayer ceramic capacitor 30 is substantially square, and the thickness is A.
is equal to the width B, the multilayer ceramic capacitor 30 is connected to the wiring conductor (not shown) on the board 34 and the inside, whether it is in the mounted state shown in FIG. 19 or in the mounted state shown in FIG. The mutual inductance generated between the electrode 31 and the electrode 31 remains almost unchanged. Therefore, if the multilayer ceramic capacitor 30 is designed to have the dimensional relationships shown in FIGS. 19 and 20, the multilayer ceramic capacitor 30 can be mounted in two ways without changing the mutual inductance. It is.

On the other hand, in the multilayer ceramic capacitor 40 shown in FIG. 21, since the thickness a and the width b are different from each other, the internal Since the mutual inductance generated between the electrode 41 and the wiring conductor of the printed circuit board changes, the direction of the laminated ceramic capacitor 40 must be controlled when mounting it.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing the appearance of a multilayer ceramic capacitor 26 according to an embodiment of the present invention. 2 to 7 sequentially show each step included in the manufacturing method for obtaining the multilayer ceramic capacitor 26 of FIG. 1. Figures 8 and 9
The figure is a diagram showing the relationship in size between the ceramic portion 24 and the internal electrode 25 in order to more specifically explain the effects of the embodiments shown in FIGS. 1 to 7 in comparison with the prior art. It is a diagram. FIG. 10 is a perspective view showing the appearance of a multilayer ceramic capacitor 127 according to another embodiment of the present invention. 11 to 18 sequentially show each step included in the manufacturing method for obtaining the multilayer ceramic capacitor 127 shown in FIG. 10. Figure 19 and 2
FIG. 0 is a schematic cross-sectional view showing an example of mounting a multilayer ceramic capacitor according to the present invention. 21st
This figure corresponds to FIGS. 19 and 20, and is a schematic cross-sectional view of a conventional multilayer ceramic capacitor. In the figure, 11 is a ceramic green sheet (ceramic dielectric layer), 12 is a conductive film to be an internal electrode, 17 is a cut surface (side surface), 18 is ceramic slurry, 18a is a ceramic layer, and 21 is a cut surface (end surface). , 22 and 23 are external electrodes, 26 is a multilayer ceramic capacitor, 30 is a multilayer ceramic capacitor, 31 is an internal electrode, 32 is a side margin, 111 is a conductive film to be an internal electrode, 112
118 is a ceramic dielectric layer, 118 is a ceramic slurry, 118a is a ceramic layer, 121 is a ceramic laminate, 122 is a top surface, 123 is a side surface, 124
125 and 126 are external electrodes, and 127 is a multilayer ceramic capacitor.

Claims (1)

[Scope of Claims] 1. A rectangular parallelepiped-shaped ceramic laminate formed by laminating a plurality of ceramic dielectric layers and having an upper surface, a lower surface, opposing side surfaces, and opposing end surfaces, and each end surface of the ceramic laminate. and external electrodes formed inside the ceramic laminate between the ceramic dielectric layers so as to sandwich the ceramic dielectric layers so as to face each other and to be connected to one of the external electrodes. A plurality of internal electrodes are formed to reach the end face of the ceramic laminate on which the external electrode is formed, and each internal electrode has a plurality of internal electrodes formed on the end face where the external electrode is not connected to the internal electrode. Leave an end margin, and leave side margins on each side of the ceramic laminate.
In the formed multilayer ceramic capacitor, the portion forming the side margin of the ceramic laminate is formed by applying the ceramic dielectric to the portion of the ceramic laminate other than the side margin portion in the unfired stage of the ceramic laminate. A slurry of the same ceramic material as that constituting the body layer is added, and the ceramic laminate is integrally fired in that state,
A multilayer ceramic capacitor characterized by a layer thickness of 200 μm or less.