JPH0531826B2 - - Google Patents

Info

Publication number
JPH0531826B2
JPH0531826B2 JP24582286A JP24582286A JPH0531826B2 JP H0531826 B2 JPH0531826 B2 JP H0531826B2 JP 24582286 A JP24582286 A JP 24582286A JP 24582286 A JP24582286 A JP 24582286A JP H0531826 B2 JPH0531826 B2 JP H0531826B2
Authority
JP
Japan
Prior art keywords
wiring board
wiring
insulating
board
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP24582286A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6399558A (ja
Inventor
Myoshi Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP61245822A priority Critical patent/JPS6399558A/ja
Publication of JPS6399558A publication Critical patent/JPS6399558A/ja
Publication of JPH0531826B2 publication Critical patent/JPH0531826B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Landscapes

  • Combinations Of Printed Boards (AREA)
JP61245822A 1986-10-15 1986-10-15 半導体装置 Granted JPS6399558A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61245822A JPS6399558A (ja) 1986-10-15 1986-10-15 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61245822A JPS6399558A (ja) 1986-10-15 1986-10-15 半導体装置

Publications (2)

Publication Number Publication Date
JPS6399558A JPS6399558A (ja) 1988-04-30
JPH0531826B2 true JPH0531826B2 (enrdf_load_stackoverflow) 1993-05-13

Family

ID=17139367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61245822A Granted JPS6399558A (ja) 1986-10-15 1986-10-15 半導体装置

Country Status (1)

Country Link
JP (1) JPS6399558A (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5793116A (en) * 1996-05-29 1998-08-11 Mcnc Microelectronic packaging using arched solder columns
US6147411A (en) * 1998-03-31 2000-11-14 Micron Technology, Inc. Vertical surface mount package utilizing a back-to-back semiconductor device module
US6418033B1 (en) 2000-11-16 2002-07-09 Unitive Electronics, Inc. Microelectronic packages in which second microelectronic substrates are oriented relative to first microelectronic substrates at acute angles
AU2003256360A1 (en) 2002-06-25 2004-01-06 Unitive International Limited Methods of forming electronic structures including conductive shunt layers and related structures
JP6382888B2 (ja) * 2016-06-09 2018-08-29 Ｎｉｓｓｈａ株式会社 電極パターン一体化成形品及びその製造方法

Also Published As

Publication number Publication date
JPS6399558A (ja) 1988-04-30

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