JPH05315604A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize a semiconductor device capable of improving hot carrier withstand voltage of a high withstand transistor by using a gate electrode film of an ordinary transistor as its side wall of a high withstand voltage. CONSTITUTION:An element-separating insulation film 2 is formed on a semiconductor substrate 1, a first gate oxide film 3 and a first gate electrode film 4 are provided, a first photo-resist 5 is subjected to patterning and etching, a gate is formed and impurities are injected into the source drain region, and a first impurities scattering layer 6 is formed. Then, a second gate oxide film 7 and a second gate electrode film 8 are provided, a second photo-resist is subjected to patterning and etching, a gate electrode of 5V operation transistor is formed, and the second gate electrode film 8 remains and side wall 11 is formed along the gate electrode of + or -5V operation transistor. Then, the second impurities scattering layer is formed on in both source drain regions, and hot carrier withstand ability of + or -5V operation transistor can be enhanced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device having a plurality of types of transistors having different characteristics and structures.
The present invention relates to a method for manufacturing a semiconductor device which can improve hot carrier resistance by using a gate electrode film of a normal transistor also as a sidewall of a high breakdown voltage transistor and having an LDD structure.

[0002]

2. Description of the Related Art As semiconductor devices are becoming one chip,
A technique has been developed in which a plurality of transistors having different structures are manufactured on one silicon substrate and the difference in characteristics is used to apply to various electric operations. For example, a semiconductor device called an analog MOS process used as a modem for a personal computer has one transistor of ± 5V.
Higher precision analog-to-digital conversion is realized by operating with the system power supply and operating the other transistor with the normal 5V system power supply.

A conventional method of manufacturing a semiconductor device using an analog MOS process will be described below.

FIG. 2 is a sectional view showing the steps in the conventional method for manufacturing a semiconductor device. In FIG. 2, 1 is a semiconductor substrate, 2 is an element isolation insulating film, 3 is a first gate oxide film,
4 is a first gate electrode film, 5 is a first photoresist, 6 is a first impurity diffusion layer, 7 is a second gate oxide film, 8 is a second gate electrode film, 9 is a second photoresist, and 10 is a second impurity diffusion layer. It is a layer.

A method of manufacturing the semiconductor device configured as described above will be described. First, as shown in FIG. 2A, after the element isolation insulating film 2 is formed on the semiconductor substrate 1 by the selective oxidation method, the first gate oxide film 3 is formed to form a transistor of ± 5 V operation. The first gate electrode film 4 is provided, and the first photoresist 5 for forming a gate is patterned by a normal lithography technique. Next, as shown in FIG. 2B, after etching the first gate electrode film 4 and the first gate oxide film 3 to form a gate, impurities are implanted into the source / drain regions of the transistor, The first impurity diffusion layer 6 is formed by annealing. Next, as shown in FIG. 2C, a second gate oxide film 7 and a second gate electrode film 8 are provided in order to form a 5 V operation transistor having a different structure from the ± 5 V operation transistor. The second photoresist 9 for forming a gate is patterned by a normal lithography technique. And FIG.
(D), after the second gate electrode film 8 and the second gate oxide film 7 are etched to form a gate,
Impurities are implanted into the source / drain regions of both the 5 V operation and 5 V operation transistors, and the second impurity diffusion layer 10 is formed by annealing.

[0006]

However, in the above-mentioned conventional method, since the so-called high breakdown voltage transistor of ± 5 V operation has the DDD structure, the characteristic fluctuation due to hot carriers generated in the high electric field region near the drain region is caused. Could not be sufficiently prevented, which was a reliability problem.

The present invention solves the above conventional problems and provides a method of manufacturing a semiconductor device capable of dramatically improving the hot carrier breakdown voltage of a high breakdown voltage transistor without adding any steps. With the goal.

[0008]

In order to achieve this object, a method of manufacturing a semiconductor device of the present invention is characterized by using a gate electrode film of a normal transistor as a sidewall of a high breakdown voltage transistor. .

[0009]

With this configuration, without adding steps,
The high breakdown voltage transistor can have an LDD structure, a high electric field in the vicinity of the drain region can be relaxed, and fluctuations in transistor characteristics due to hot carriers can be largely prevented.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view showing a step sequence in a method of manufacturing a semiconductor device according to an embodiment of the present invention. In FIG. 1, 1 is a semiconductor substrate, 2 is an insulating film for element isolation, 3
Is a first gate oxide film, 4 is a first gate electrode film, and 5 is a first
Photoresist, 6 is a first impurity diffusion layer, 7 is a second gate oxide film, 8 is a second gate electrode film, 9 is a second photoresist, 10 is a second impurity diffusion layer, and 11 is a sidewall.

A method of manufacturing the semiconductor device configured as described above will be described. First, as shown in FIG. 1A, after forming an element isolation insulating film 2 on a semiconductor substrate 1 by a selective oxidation method, a first gate oxide film 3, for forming a transistor of ± 5 V operation, The first gate electrode film 4 is provided, and the first photoresist 5 for forming a gate is patterned by a normal lithography technique. Next, as shown in FIG. 1B, after etching the first gate electrode film 4 and the first gate oxide film 3 to form a gate, impurities are implanted into the source / drain regions of the transistor, The first impurity diffusion layer 6 is formed by annealing. Next, as shown in FIG. 1C, a second gate oxide film 7 and a second gate electrode film 8 are provided in order to form a transistor of 5V operation having a different structure from the ± 5V operation transistor. The second photoresist 9 for forming a gate is patterned by a normal lithography technique. And FIG.
2D, the second gate electrode film 8 is etched to form the gate electrode of the 5V operation transistor. At that time, the etching amount is adjusted to form the sidewall 11 while leaving the second gate electrode film 8 along the gate electrode of the ± 5V operation transistor. Then the second
After the gate oxide film 7 is etched, an impurity of the same conductivity type as the first impurity diffusion layer is injected into the source / drain regions of the transistors operating both ± 5 V and 5 V, so that the impurity is shallower than the first impurity diffusion layer and has a high concentration. The second impurity diffusion layer 10 is formed (the region indicated by the broken line in FIG. 1D).

As described above, according to this embodiment, as shown in FIG. 1 (d), the ± 5V operation transistor can be easily made into the LDD structure without adding steps, and the hot carrier can be obtained. The durability can be dramatically improved as compared with the conventional technology.

Although a semiconductor device having two types of transistors has been described here, the same applies to a semiconductor device having three or more types of transistors.

[0015]

As described above, according to the present invention, when the gate of one transistor is formed, the side wall is simultaneously formed along the gate of the other transistor which is previously formed, so that the transistor can be easily formed. It is an excellent method for manufacturing a semiconductor device having an LDD structure and capable of improving hot carrier resistance.

[Brief description of drawings]

FIG. 1 is a cross-sectional view in order of steps of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view in order of steps of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Element isolation insulating film 3 First gate oxide film 4 First gate electrode film 5 First photoresist 6 First impurity diffusion layer 7 Second gate oxide film 8 Second gate electrode film 9 Second photoresist 10 Second Impurity diffusion layer 11 Sidewall

Claims (1)

[Claims] 1. A step of forming a first gate insulating film and a first gate electrode film on a semiconductor substrate, a step of forming a gate electrode of a first transistor, and a source / drain region of the first transistor. Forming the first impurity diffusion layer, forming the second gate insulating film and the second gate electrode film, forming the gate electrode of the second transistor, and forming the second gate electrode film into the first transistor. 2. A method of manufacturing a semiconductor device, comprising: leaving a side wall along the gate electrode, and forming a second impurity diffusion layer in the source / drain region of the first transistor.