JPH0529994B2 - - Google Patents
Info
- Publication number
- JPH0529994B2 JPH0529994B2 JP1270500A JP27050089A JPH0529994B2 JP H0529994 B2 JPH0529994 B2 JP H0529994B2 JP 1270500 A JP1270500 A JP 1270500A JP 27050089 A JP27050089 A JP 27050089A JP H0529994 B2 JPH0529994 B2 JP H0529994B2
- Authority
- JP
- Japan
- Prior art keywords
- stage
- pair
- sense amplifier
- transistors
- differential
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/416—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP88480066A EP0365730B1 (en) | 1988-10-28 | 1988-10-28 | Double stage bipolar sense amplifier for BICMOS SRAMS with a common base amplifier in the final stage |
EP88480066.5 | 1988-10-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02158998A JPH02158998A (ja) | 1990-06-19 |
JPH0529994B2 true JPH0529994B2 (enrdf_load_stackoverflow) | 1993-05-06 |
Family
ID=8200502
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1270500A Granted JPH02158998A (ja) | 1988-10-28 | 1989-10-19 | 2段式センス増幅回路 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5172340A (enrdf_load_stackoverflow) |
EP (1) | EP0365730B1 (enrdf_load_stackoverflow) |
JP (1) | JPH02158998A (enrdf_load_stackoverflow) |
DE (1) | DE3850970T2 (enrdf_load_stackoverflow) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0469894A (ja) * | 1990-07-09 | 1992-03-05 | Fujitsu Ltd | 半導体記憶装置 |
JP2616198B2 (ja) * | 1990-10-01 | 1997-06-04 | 日本電気株式会社 | 半導体メモリ回路 |
JP2715004B2 (ja) * | 1991-01-07 | 1998-02-16 | 三菱電機株式会社 | 半導体メモリ装置 |
JP2939027B2 (ja) * | 1991-10-31 | 1999-08-25 | 三菱電機株式会社 | 半導体記憶装置 |
US5878269A (en) * | 1992-03-27 | 1999-03-02 | National Semiconductor Corporation | High speed processor for operation at reduced operating voltage |
US5341333A (en) * | 1992-08-11 | 1994-08-23 | Integrated Device Technology, Inc. | Circuits and methods for amplification of electrical signals |
US6492211B1 (en) | 2000-09-07 | 2002-12-10 | International Business Machines Corporation | Method for novel SOI DRAM BICMOS NPN |
KR100666181B1 (ko) * | 2005-12-27 | 2007-01-09 | 삼성전자주식회사 | 센스앰프 및 워드라인 드라이버 영역을 위한 면적을최소화하는 레이아웃을 가지는 반도체 메모리 장치 |
US7986189B1 (en) | 2010-04-29 | 2011-07-26 | Freescale Semiconductor, Inc. | Amplifier with feedback |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2460146C3 (de) * | 1974-12-19 | 1981-11-05 | Ibm Deutschland Gmbh, 7000 Stuttgart | Bipolare Leseschaltung für integrierte Speichermatrix |
DE2926514A1 (de) * | 1979-06-30 | 1981-01-15 | Ibm Deutschland | Elektrische speicheranordnung und verfahren zu ihrem betrieb |
JPS59914B2 (ja) * | 1979-08-23 | 1984-01-09 | 富士通株式会社 | 半導体記憶装置 |
JPS6028076B2 (ja) * | 1980-12-25 | 1985-07-02 | 富士通株式会社 | 半導体メモリの書込み回路 |
US4553053A (en) * | 1983-10-03 | 1985-11-12 | Honeywell Information Systems Inc. | Sense amplifier |
JPS628394A (ja) * | 1985-07-03 | 1987-01-16 | Hitachi Ltd | センス回路 |
JPS62117190A (ja) * | 1985-11-15 | 1987-05-28 | Hitachi Ltd | 半導体記憶装置 |
KR0141494B1 (ko) * | 1988-01-28 | 1998-07-15 | 미다 가쓰시게 | 레벨시프트회로를 사용한 고속센스 방식의 반도체장치 |
ES2022698B3 (es) * | 1988-02-26 | 1991-12-01 | Ibm | Amplificador de sentido de doble fase para memorias de acceso aleatorias. |
US4984196A (en) * | 1988-05-25 | 1991-01-08 | Texas Instruments, Incorporated | High performance bipolar differential sense amplifier in a BiCMOS SRAM |
-
1988
- 1988-10-28 DE DE3850970T patent/DE3850970T2/de not_active Expired - Fee Related
- 1988-10-28 EP EP88480066A patent/EP0365730B1/en not_active Expired - Lifetime
-
1989
- 1989-10-19 JP JP1270500A patent/JPH02158998A/ja active Granted
-
1991
- 1991-06-10 US US07/714,319 patent/US5172340A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5172340A (en) | 1992-12-15 |
DE3850970D1 (de) | 1994-09-08 |
EP0365730A1 (en) | 1990-05-02 |
JPH02158998A (ja) | 1990-06-19 |
DE3850970T2 (de) | 1995-03-16 |
EP0365730B1 (en) | 1994-08-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4074150A (en) | MOS interchip receiver differential amplifiers employing resistor shunt CMOS amplifiers | |
EP0249541B1 (en) | Switched impedance emitter coupled logic gate | |
US4547685A (en) | Sense amplifier circuit for semiconductor memories | |
US4027176A (en) | Sense circuit for memory storage system | |
JP2003323800A (ja) | Sram半導体メモリーセルのメモリー状態を評価するための差動電流評価回路およびセンスアンプ回路 | |
US3986045A (en) | High speed logic level converter | |
US4771194A (en) | Sense amplifier for amplifying signals on a biased line | |
JP3779341B2 (ja) | 半導体メモリ装置 | |
US4769564A (en) | Sense amplifier | |
JP3103154B2 (ja) | サンプル・ホールド回路 | |
JPH0529994B2 (enrdf_load_stackoverflow) | ||
US4860257A (en) | Level shifter for an input/output bus in a CMOS dynamic ram | |
US6075729A (en) | High-speed static random access memory | |
US4099266A (en) | Single-chip bi-polar sense amplifier for a data processing system using MOS memory | |
JP3800520B2 (ja) | 半導体集積回路装置と半導体装置 | |
JP2760634B2 (ja) | 集積メモリ | |
JPS62132419A (ja) | センス増幅器 | |
JPS63244878A (ja) | 半導体記憶装置 | |
JPS6331879B2 (enrdf_load_stackoverflow) | ||
US5483183A (en) | Bipolar current sense amplifier | |
JPS61134993A (ja) | センス・アンプ | |
JPH0777075B2 (ja) | デコーダ−ドライバ回路 | |
US4964081A (en) | Read-while-write ram cell | |
JPH0241112B2 (enrdf_load_stackoverflow) | ||
JP2802920B2 (ja) | 半導体集積回路装置 |