JPH05299484A - Semiconductor wafer - Google Patents

Abstract

PURPOSE:To provide a semiconductor wafer capable of making the probing easier while maintaining an area for an integrated circuit-forming portion. CONSTITUTION:A scribe line 5 is interposed between an integrated circuit forming portion 2 arranged in a plurality of rows to semiconductor wafer 1 and a plurality of integrated circuit forming portion 2 formed to the semiconductor wafers 1; and testing pads 6 for measuring by touching a probe card are enlarged and extended on mounting pads 4 to scribe line 5 located at the peripheral edge of the integrated circuit forming portion 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a semiconductor wafer capable of obtaining a pad arrangement which facilitates propping while maintaining the area of an integrated circuit forming portion.

[0002]

2. Description of the Related Art As is well known in the field of semiconductor integrated circuit formation,
When a large number of wafers are regularly arranged in a single wafer, they are individually contact-measured with a probe card, defective ink is marked with mark ink to classify them, and then each is incorporated into the package. Individually divided.

[0003] By the way, in the past, when contact measurement of the integrated circuit forming portion was individually performed by the probe card, there was no test pad for contact measurement on the probe card. Therefore, instead of the test pad, the integrated circuit was used. The measurement was performed by bringing the probe card into contact with many small mounting pads in the forming portion.

[0004]

As described above, in the conventional semiconductor assembly, the probe card is contacted with a large number of small mounting pads of the integrated circuit forming portion instead of the test pads for measurement. Therefore, for example, it is very difficult to bring the probe card into contact with the mounting pad provided for the flip chip. In other words, as the number of mounting pads shrinks and increases with higher integration,
It is very difficult to bring the probe card into contact with the mounting pad that has been reduced in size and increased, and there is a possibility that the mounting pad may be damaged by the probe card during contact measurement.

The present invention has been made in view of the above, and an object thereof is to provide a semiconductor wafer capable of facilitating propping while maintaining an area of an integrated circuit forming portion.

[0006]

In order to achieve the above-mentioned object in the present invention, a plurality of integrated circuit forming portions arranged on a semiconductor wafer are arranged, and a plurality of integrated circuits formed on the semiconductor wafer. It is characterized in that a dividing line interposed between the forming portions is provided, and a test pad for contact measurement with the probe is arranged on the dividing line separately from the mounting pad of the integrated circuit forming portion.

In order to achieve the above-mentioned object in the present invention, a plurality of integrated circuit forming portions arranged on a semiconductor wafer are arranged between the plurality of integrated circuit forming portions formed on the semiconductor wafer. And a test line to be measured by contact with the probe is extended from the mounting pad located on the peripheral edge of the integrated circuit forming portion to the test line. ..

[0008]

According to the present invention, instead of contacting the probe card with a mounting pad having a high density or lacking regularity,
Testing is performed by contacting the probe card with the test pad extended and extended on the scribe line, so propping is extremely easy, and it is possible to reliably prevent expansion of the chip area and to make contact. At the time of measurement, it can be expected that the risk of damaging the mounting pad with the probe card can be reliably eliminated.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to one embodiment shown in FIGS. 1 and 2.
As shown in FIG. 2, a test pad 6 which is contact-measured with a probe card on the scribe line 5 from the mounting pad 4 of the integrated circuit forming portion 2 of the wafer 1 made of GaAs, for example.
Has been extended.

As shown in FIG. 1, the integrated circuit forming section 2 is as follows.
A large number of semiconductor wafers 1 made of GaAs are regularly arranged in rows and columns to form semiconductor integrated circuits 3.
A plurality of mounting pads 4 are irregularly extended from the peripheral edge of the semiconductor integrated circuit 3 in the outer peripheral direction. Further, the scribe lines (division lines) 5 are formed on the wafer 1 as shown in the same figure, and are located between the plurality of semiconductor integrated circuit forming portions 2 in a substantially lattice pattern. It is designed to be used when the part 2 is divided. Further, as shown in FIG. 2, the test pad 6 is regularly extended from each of the plurality of mounting pads 4 on the scribe line 5 and is expanded from the mounting pad 4, and is configured as a semiconductor integrated circuit. Instead of the mounting pads 4 at the time of classifying the circuit forming portion 2, contact measurement is individually performed with a probe card (not shown).

According to the above configuration, instead of contacting the probe card with the mounting pad 4 having high density or lacking regularity, the test card 6 having regularity and expanded on the scribe line 5 is attached to the probe card. Since the test is performed by contacting with each other, the propping is extremely easy and the expansion of the chip area can be surely prevented.

Further, it is expected that the risk of damaging the mounting pad 4 with the probe card can be reliably eliminated during the contact measurement.

Although the wafer 1 made of GaAs is used in the above embodiment, the wafer 1 made of Si is used.
Even if it is used, the same effect as that of the above-mentioned embodiment can be expected. Further, although the scribe line 5 is formed on the wafer 1 in the above embodiment, the dicing line may be formed.

Further, in the above embodiment, the test pad 6 is used.
In FIG. 4, the test pads 6 are regularly extended from the plurality of mounting pads 4 on the scribe line 5, but the test pads 6 are regularly extended from some of the mounting pads 4 to the scribe line 5. Or, as shown in the lower left part of FIG.
It goes without saying that the test pads 6 may be extended from the mounting pads 4 that are not centrally arranged.

[0015]

As described above, according to the present invention, the test pad for contact measurement with the probe is arranged on the dividing line separately from the mounting pad of the integrated circuit forming portion, so that the propping is performed. There is a remarkable effect that it becomes extremely easy and, moreover, the expansion of the chip area can be surely prevented. Further, there is a remarkable effect that it is possible to surely eliminate the risk of damaging the mounting pad 4 with the probe card during contact measurement.

[Brief description of drawings]

FIG. 1 is an overall explanatory view showing an embodiment of a semiconductor wafer according to the present invention.

FIG. 2 is an enlarged explanatory view of a main part showing an enlarged part II of FIG.

[Explanation of symbols]

1 ... Wafer, 2 ... Integrated circuit forming part, 3 ... Semiconductor integrated circuit, 4 ... Mounting pad, 5 ... Scribing line (dividing line), 6 ... Test pad.

Claims (2)

[Claims] 1. A semiconductor wafer comprising a plurality of integrated circuit forming portions arranged on a semiconductor wafer and dividing lines formed on the semiconductor wafer and interposed between the plurality of integrated circuit forming portions. A semiconductor wafer, wherein a test pad to be contact-measured with a probe is provided separately from the mounting pad of the integrated circuit forming portion on the dividing line. 2. A semiconductor wafer comprising an integrated circuit forming portion arranged in a plurality on a semiconductor wafer and dividing lines formed between the plurality of integrated circuit forming portions formed on the semiconductor wafer. A semiconductor wafer, in which a test pad for contact measurement with a probe is extended and extended from a mounting pad located at a peripheral edge of the integrated circuit forming portion on a division line.