JPH05243871A - High frequency transistor - Google Patents

Abstract

PURPOSE:To eliminate a ground pattern corresponding to a capacitor chip, and to prevent the deterioration of the gain of a high frequency transistor. CONSTITUTION:As a plane arrangement condition on an insulating substrate 1, plural metalized faces 4, 6 and 8 are provided on the insulating substrate 1, and on one metalized face 6 of these metalized faces, a transistor chip 15 is placed. Also, on a ground metalized face 5 provided separately, the capacitor chip 14 for an input matching circuit is placed, and used for amplifying electric power in a high frequency band. Moreover, to the ground metalized face 5, this transistor is arranged and constituted by providing at least a metallic thin wire connected directly from the transistor chip 15, and a non-metalized face 10 divided into plural parts, for forming a solder dam on the ground metalized face 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency transistor, and more particularly to a high power high frequency transistor.

[0002]

2. Description of the Related Art In a conventional high-power high-frequency transistor, a plurality of metallized surfaces 4, 6 and 8 are formed on an insulating substrate 1 as shown in a plan view of FIG.
And ground metallization surfaces 5 and 7 are provided, and the metallization surfaces 4 and 5 are provided with input leads 2 respectively.
And the output lead 3 are connected by brazing. A thin metal wire 11 is used to connect the metallized surface 4 and the input bonding pad 17 of the transistor chip 15, and the thin metal wire 11 is connected to the grounded metallized surface 5.
An internal matching circuit is formed by using the capacitor pattern 20 of the capacitor chip 19 mounted on the substrate as a relay. The ground bonding pad 16 of the transistor chip 15 is connected to the ground metallization surface 7 by the thin metal wire 12.
And a ground pattern 21 provided on the capacitor chip 19. This ground pattern 21 is
Since it is electrically connected to the back surface of the capacitor chip 19,
It is grounded by the ground metallized surface 5. Also, FIG.
Although not shown in (a), the ground metallized surfaces 5 and 7 are electrically connected to the back surface of the insulating substrate 1 and the side surface metallized surfaces (not shown) to be grounded. Since the output terminal of the transistor chip 15 is taken out from the back side, it is connected to the output lead 3 by connecting the metallized surface 6 and the metallized surface 8 with the thin metal wire 13. The alumina coat 9 is for preventing the solder from flowing and making it impossible to bond the metal wires 13 when the transistor chip 15 is bonded to the metallized surface 6. In addition, in FIG.
The transistor chip 15, the ground bonding pad 16, the input bonding pad 17, the metal thin wires 11 to 13 and the like are of the same kind, and therefore, only representative ones thereof are designated by the reference numerals. Has been shown.

[0003]

In the above-mentioned conventional high frequency transistor, as shown in the equivalent circuit of FIG. 2B, the input matching circuit is composed of the inductances L _11a and L _11b due to the thin metal wire 11 and the capacitor. .Capacitance C ₂₀ of the capacitor pattern 20 provided on the chip 19
However, since the transistor chip 15 is grounded via the ground pattern 21 of the capacitor chip 19, the equivalent series resistance R ₂₀ of the capacitor pattern 20 in the equivalent circuit of FIG. In addition, the ground pattern of the transistor chip 15 is connected to the ground pattern 2
The equivalent series resistance R _{21 of 1} is added, and in particular, the latter becomes ground impedance, which becomes a factor of reducing the gain of the high frequency transistor.

The size of the ground pattern 21 is 2 mm × 0.
When the thickness of the capacitor chip is 1 mm and the thickness of the capacitor chip is 160 μm and the specific resistance of the substrate is 0.01 Ωcm, the resistance value R ₂₁ is 0.08 Ω. This resistance value seems to be small at first glance, but as the input resistance is multiplied by the current gain, it increases, so at a frequency of 1 GHz,
In the case of a transistor with a W output, the gain bandwidth product is 4
At GHz, if the original input impedance is about 2Ω, it causes a gain decrease of 0.6 dB.

That is, the conventional high frequency transistor has a drawback that the ground impedance is apt to be large and the gain at high output is lowered.

[0006]

In the high frequency transistor of the present invention, a plurality of metallized surfaces are provided on the insulating substrate as a planar arrangement condition on the insulating substrate, and a transistor chip is provided on one of the metallized surfaces. Place the capacitor chip for the input matching circuit on the grounded metallization surface that is separately provided, and in the high frequency transistor with the internal matching circuit that is used for power amplification in the high frequency band, On the other hand, at least a thin metal wire directly connected to the transistor chip and a plurality of non-metallized surfaces forming a solder dam on the ground metallized surface are arranged.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a plan layout view showing an embodiment of the present invention. As shown in FIG. 1A, in this embodiment, the insulating substrate 1 is provided with metallized surfaces 4, 5, 6, 7 and 8, and the input lead 2 is brazed to the metallized surface 4 to output the output. The lead 3 is brazed to the metallized surface 8. Metallized surfaces 5 and 7 are connected to the ground back surface through side metallized surfaces (not shown).
The transistor chip 15 is mounted on the metallized surface 6, and the capacitor chip 14 is bonded to the grounded metallized surface 5 by soldering. However, the grounded bonding pad 16 of the transistor chip 15 and the grounded metallized surface 5 are attached. The connection by the thin metal wire 12 between and is because the divided non-metallized surface 10 blocks the solder flow.
The bonding area is secured.

Dividing the non-metallized surface 10 is divided into
If not divided, as shown in the explanatory plan layout view shown in FIG. 1B, the non-divided non-metallized surface 18 has the metal thin wire 12 for grounding the capacitor chip 14 and the transistor chip 15 grounded. This is because the resistance between and becomes large and the gain of the high frequency output decreases. The method for the alumina coat 9 corresponding to the connection with the back surface output terminal of the transistor chip 15 is considered to be facilitated by replacing the non-metallized surface 18 in FIG. 2B with the alumina coat 9. ,
In this case, the dimensional constraint of the alumina coat 9 is interposed, and the constraint on the constant of the internal matching circuit is added. However, in the present invention, by providing the solder dam by the divided non-metallized surface 10 on the grounded metallized surface 5 on which the input matching capacitor chip 14 is mounted, the ground pattern corresponding to the capacitor chip 14 is unnecessary, This prevents an increase in ground resistance and prevents a decrease in gain of the high frequency transistor.

[0010]

As described above, according to the present invention, the connection area of the metal thin wire for grounding can be provided without using the grounding pattern of the capacitor chip used for the internal matching circuit.
By providing the divided non-metallized surface on the grounded metallized surface on which the capacitor chip is mounted,
There is an effect that an increase in ground resistance derived from the capacitor chip can be avoided, and a decrease in gain of the high frequency transistor can be prevented.

[Brief description of drawings]

FIG. 1 is a plan layout view and a plan layout view for explaining an operation according to an embodiment of the present invention.

FIG. 2 is a plan layout diagram and a diagram showing an equivalent circuit of a conventional example.

[Explanation of symbols]

 1 Insulating Substrate 2 Input Lead 3 Output Lead 4, 6, 8 Metallized Surface 5, 7 Ground Metallized Surface 9 Alumina Coat 10 Split Non-metallized Surface 11-13 Metal Fine Wire 14, 19 Capacitor Chip 15 Transistor Chip 16 Ground Bonding Pad 17 Input Bonding Pad 18 Unmetallized Surface 20 Capacitor Pattern 21 Ground Pattern

Claims (1)

[Claims] 1. As a planar arrangement condition on an insulating substrate, a plurality of metallized surfaces are provided on the insulating substrate, a transistor chip is mounted on one metallized surface of the metallized surface, and a ground metallized surface is separately provided. In a high-frequency transistor with an internal matching circuit that is used for power amplification in a high frequency band by mounting a capacitor chip for an input matching circuit, directly from the transistor chip to the ground metallized surface. A high-frequency transistor, comprising: a thin metal wire to be connected; and a plurality of non-metallized surfaces that form a solder dam on the ground metallized surface.