JPS647682B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a high frequency semiconductor device having an internal matching circuit.

Conventionally, high-frequency, high-power transistors are placed in a transistor container made of an insulating substrate in order to minimize ground inductance and obtain maximum gain or output. Two emitter terminal electrodes with different directions are provided, and a thin bonding wire is connected to each via the emitter bonding pad of the transistor chip, or the ground inductance from the emitter electrode of the transistor chip to the emitter terminal electrode of the transistor container is In order to further reduce the noise, a ground electrode plate in the form of a ribbon is provided in advance between both emitter terminal electrodes of the transistor container, and a thin bonding wire or the like is connected to this ground electrode plate from the emitter bonding pad of the transistor chip. There was a structure in which connections were made over short distances.

In addition, as a method to reduce grounding inductance, a tanza-shaped through hole is provided in the ground electrode on the emitter bonding pad side in parallel to the transistor chip in the transistor container made of an insulating substrate, and is provided on the back side of the insulating substrate. The commonly used method was to connect the ground metallized surface to a ground metallized surface.

However, the above-described methods for reducing grounding inductance all have complicated structures and manufacturing methods, which are factors that increase the price of transistor containers. Furthermore, in any of the above-mentioned methods, it is impossible to physically reduce the ground inductance to zero, and there is a limit to obtaining high gain and high output.

An object of the present invention is to provide a high-output, high-bandwidth, high-frequency, high-output transistor that eliminates the causes of the price increase as described above and reduces grounding inductance.

Another object of the present invention is to provide a transistor that can be used as a chip carrier or as part of a film circuit board, and that can easily realize a high-frequency output hybrid film integrated circuit.

According to the present invention, it is possible to reduce ground inductance both physically and circuit-wise without providing a ground electrode plate within the transistor container or within the hybrid film integrated circuit. That is, the present invention provides an emitter grounding conductor portion which is metallized in a band shape approximately at the center of the surface of an insulating substrate, and whose both ends are connected to the metallization on the back side of the substrate through a through hole or side surface metallization, and an emitter grounding conductor portion sandwiching the emitter grounding portion. An insulating substrate having a base, a collector and each terminal conductor portion metalized on both sides of the insulating substrate, a transistor chip and a plurality of capacitor chips mounted on the insulating substrate, and the transistor chip and the capacitor. In a semiconductor device comprising a plurality of bonding wires connecting a chip, the emitter grounding conductor portion, and each of the terminal conductor portions, the transistor chip is provided approximately at the center of the emitter grounding conductor portion, and the emitter grounding conductor portion is different from the semiconductor device. The capacitor chip is mounted and connected to a separated island-shaped collector conductor, and one electrode of the capacitor chip is mounted and connected to an emitter grounded conductor between the transistor chip and the base terminal conductor. A terminal bonding line, a base bonding line, and a collector bonding line each connect the plurality of terminals from an emitter ground conductor located between the transistor chip and the collector terminal section to the emitter bonding pad of the transistor chip. from the base bonding pad of the transistor chip to the base terminal portion of the plurality of capacitor chips through the remaining other electrodes of the plurality of capacitor chips; , and are connected to the collector terminal portion, respectively.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a first embodiment of a semiconductor device of the present invention, and FIG. 2 is an equivalent circuit diagram thereof. Each circuit element in FIG. 2 is shown with the same number as the number of the part in FIG. 1 with a "dash" added to make it correspond to each part in FIG. 1. In FIG. 1, an insulating substrate 1
A band-shaped emitter grounding conductor part 2 is provided with a metallized layer approximately in the center of the insulating substrate 1, and this emitter grounding conductor part is connected to side metallization 21, 2 on both sides of the insulating substrate 1.
2, it is electrically connected to the backside metallized layer of the insulating substrate. Further, emitter terminals 23 and 24 for leading to the outside are provided at both ends of the emitter grounding conductor portion, respectively. On the other hand, on the insulating substrate 1, a base terminal part 3 and a collector terminal part 4 are metalized on both sides of the emitter conductor part 2 in different directions of 180 degrees from each other. A base terminal 31 and a collector terminal 41 are connected to these terminals, respectively. Further, an island-shaped collector conductor portion 5 is provided approximately at the center of the emitter ground conductor portion 2 with a gap 25 for electrical insulation from the emitter ground conductor land. A transistor chip 50 and one capacitor array chip 60 containing five capacitors are die-bonded to the collector conductor portion 5 and the emitter grounded conductor portion on the base terminal side, respectively. The emitter bonding lines 71 and 72 are connected from the emitter grounding conductor 2 on the collector terminal 4 side to the capacitor in the capacitor array chip 60 via the emitter bonding pad of the transistor chip 50. . Base bonding lines 81 and 82 are connected from the base bonding pad of transistor chip 50 to base terminal portion 3 via the remaining capacitors of capacitor array chip 60. Collector bonding wires 90 and 91 are each connected from the end of the collector conductor section 5 to the collector terminal section 4.

As is well known, when a high frequency, high output transistor chip is operated with a common emitter, the input impedance between the base and emitter is inductive, while the output impedance between the collector and emitter is capacitive. When using the chip in a container, in order to obtain high gain and high output at the operating frequency, in addition to creating a structure that minimizes emitter grounding impedance, it is necessary to minimize the Q of the transistor chip on both the input and output sides. In order to prevent the Q from increasing, use a transistor container with capacitance on the input side to cancel out the inductance, and an inductance on the output side to cancel out the capacitance, or between each terminal of the transistor and the transistor chip. It is necessary to configure a matching circuit. However, if you try to design a transistor housed in such a transistor container or a transistor container with an internal matching circuit, if you try to minimize the grounded emitter inductance, the Q of the input or output impedance increases, and the input/output impedance increases. If you try to minimize the Q of the impedance, the grounded emitter inductance tends to increase, so minimizing both the Q of the input/output impedance and the grounded inductance at the same time will, in other words, improve the performance of the transistor by improving the performance of the transistor chip. It was a challenge to improve its performance.
The semiconductor device of the present invention is intended to simultaneously minimize both the emitter-grounded inductance of the transistor and the Q of the input and output impedances of the transistor. The impedance is set between the capacitor 62 and the capacitor 62 so that the emitter bonding wire 72 and the capacitor 62 resonate in series at the operating frequency.
can be minimized by selecting the capacity of At this time, the emitter current of the transistor can bypass the bonding line 71 and flow to the ground.

The Q of the input impedance on the base side of the transistor is determined by a matching circuit consisting of the bonding line 81, the capacitor 65 in the capacitor array chip 60 on the emitter grounding part 2 closest to the emitter bonding pad, and the bonding line 82. This makes it possible to keep it to a minimum.

Next, the Q of the collector side output impedance of the transistor is determined by separating the collector conductor part for collector die bonding from the collector terminal part.
Since the emitter is provided as an island in the grounded conductor section with a minimum area, the capacitance component of the output impedance hardly increases compared to that of the chip, and it is connected to the collector terminal section 4 via the bonding wires 90 and 91. This can also be minimized by designing the lengths of the bonding wires 90, 91 and the collector terminal portion 4 in a manner similar to a matching circuit at the operating frequency.

FIG. 3 shows another embodiment of the semiconductor device of the present invention, in which the emitter terminals 23, 24 of the embodiment of FIG.
This is the case without the base terminal portion 3, base terminal 31, collector terminal portion 4, and collector terminal 41, and its equivalent circuit diagram is surrounded by a dotted line 100 in FIG. If this semiconductor device is used in a hybrid film integrated circuit, that is, it is inserted between the film circuit boards or into a hole provided in the film circuit board, and placed on the film circuit board located on the left side of this embodiment. By connecting the input circuit and the capacitances 61, 63, and 65 of the capacitor chips with bonding wires, the output circuit on the membrane circuit board located on the right side of this embodiment and the collector conductor portion 5 can be connected with bonding wires. By connecting, it becomes possible to have the same function as the first semiconductor device of the present invention. At this time, it goes without saying that the bonding lines on the input and output sides for connecting the membrane circuit and the semiconductor device each play a role as a part of the matching circuit. In the embodiments shown in FIGS. 1 and 3, capacitors 62 and 64 for grounding the emitters
The shunt capacitors 61, 63, and 65 for the input matching circuit on the base side are capacitor array chips having a common electrode on the back surface of one side, but the semiconductor device of the present invention does not need to be a capacitor array chip; It is only necessary that one electrode of the circuit capacitor and the emitter grounding capacitor be separately connected to the emitter grounding conductor portion on the bonding side of the base side of the transistor.

To achieve higher pressure, high-frequency, high-output transistors are generally used by arranging a large number of transistor elements in the same chip, or by arranging multiple such chips in the same container. , in such a high frequency high power transistor,
Thermal and high-frequency power disharmony often occur, and therefore it may not be possible to obtain an output proportional to the number of transistor elements used. In order to eliminate this disharmony, higher output may be obtained by setting an appropriate amount of grounding inductance between the emitter of each transistor element and the emitter grounding conductor.
For this reason, it may be better not to provide the ground capacitances 62, 64 and the bonding lines 72, 74.

As explained above, the semiconductor device of the present invention has
(1) A grounded emitter conductor is provided on the surface of the insulating substrate and electrically connected to the grounded metallization on the rear surface. (2) An island-shaped collector conductor with the minimum area is provided within the grounded emitter, and the transistor is connected there. (3) At least a shunt capacitor for the base input matching circuit has been die-bonded on the emitter grounding conductor on the base bonding pad side close to and parallel to the transistor chip; (4) The emitter , each of the base bonding wires is connected at least from the emitter bonding pad to an emitter ground conductor land on the same side, and from the base bonding pad to the input matching shunt capacitor, respectively (1). The impedance from the emitter grounding conductor to the backside metallized grounding is minimized. (2) Parasitic capacitance at the collector terminal can be eliminated, so the capacitance between the collector and grounding can be kept to a minimum, making the output side Q unnecessary. (3) Since the length of the bonding wire connecting the base bonding pad to the shunt capacitor can be minimized, the input matching circuit with the lowest Q can be provided. (4) Emitter bonding pad The inductance from the emitter to the ground conductor can be optimized.

For the above reasons, the present invention can provide a semiconductor device that is structurally simpler than conventional high-frequency, high-output transistors, is inexpensive, has high performance, has a low Q, and is therefore easy to use in terms of circuitry.

High-power transistors generate a large amount of heat, and to improve the dissipation of this heat, BeO substrates are often used as insulating substrates. The size of this BeO substrate must be made much larger than the size of the transistor chip in order to reduce thermal resistance, and for this reason conventionally, this has been done at the expense of increasing the Q of the input and output impedance of the transistor. Ta. Another advantage of the present invention is that if the second semiconductor device of the present invention is used in a hybrid film integrated circuit, the size of the BeO substrate can be reduced without increasing the Q of the input and output impedance of the transistor chip, as can be seen from the above explanation. Since it can be made much larger than the size of a transistor chip, it is possible to provide a high-frequency, high-output hybrid film integrated circuit with low thermal resistance and high reliability.

Although the embodiment of the emitter grounding device has been described above, it can be similarly applied to the base grounding device, and in this case, the base electrode becomes the ground electrode and the emitter electrode becomes the input electrode.

[Brief explanation of the drawing]

1, 2, and 3 are a plan view of a semiconductor device according to one embodiment of the present invention, an equivalent circuit diagram thereof, and a plan view of a semiconductor device according to another embodiment of the present invention, respectively. 1... Insulating board, 2... Emitter grounding conductor land, 21, 22... Side metallization, 23, 2
4... Emitter (external connection) terminal, 25... Gap,
3... Base terminal land, 31... Base (external connection) terminal, 4... Collector terminal land, 41...
...Collector (external connection) terminal, 5...Collector conductor land, 50...Transistor chip, 60...
...Capacitor array chip, 61, 62, 63,
64, 65... Each capacitor in the capacitor array, 70, 71, 72... Emitter bonding wire, 80, 81, 82... Base bonding wire,
90,91,92...Collector bonding wire, 1
00...Equivalent circuit diagram of FIG. 3.

Claims (1)

[Claims] 1. A common electrode conductor portion formed on the surface of the insulating substrate, a ground electrode terminal connected to the common electrode conductor portion, and a ground electrode terminal facing both sides of the surface of the insulating substrate with the common electrode conductor portion sandwiched therebetween. In a semiconductor device having input and output conductor parts formed respectively, and a transistor chip and a capacitor chip mounted on the insulating substrate, the transistor chip is separated from the common electrode conductor part in the vicinity of the common electrode conductor part. The capacitor chip includes a plurality of unit capacitors mounted on the provided island-shaped conductor part, and one electrode of which is mounted and connected on the common electrode conductor part between the transistor chip and the input conductor part. , the common electrode thin wire is connected from the common electrode conductor portion to the other electrode of the predetermined unit capacitor through the ground electrode of the transistor chip, and between the ground electrode of the transistor chip and the other electrode of the predetermined unit capacitor. The inductance component of the common electrode thin wire provided between the two and the capacitance value of the predetermined unit capacitor are connected so as to cause a resonance phenomenon at a desired operating frequency of the transistor chip, and the input thin wire is connected from the input electrode of the transistor chip. A semiconductor device characterized in that the unit capacitor is connected to the input conductor section through another electrode of another unit capacitor, and the output thin wire is connected from the output conductor section to the island-shaped conductor section.