JPS63197346A - High-frequency semiconductor device - Google Patents

Abstract

PURPOSE:To increase the output of high frequency high-power transistors by a method wherein an internal aligning circuit composed mainly of stripe lines is divided into multiplicity to correspond to each of unit transistor blocks divided in a multiple parallel pattern. CONSTITUTION:A strip line 2 corresponds to each of transistors 1 divided in a multiple parallel pattern. A stripe line 2 is connected to a capacitor 3 for the construction of an aligning circuit for each of the transistors divided in a multiple parallel pattern. This ensures a parallel transistor behavior free of uniformity, which easily renders the transistors enhanced in power. In this way, a high-frequency high-power transistor may be built featuring a high output and less power efficiency reduction.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a high frequency semiconductor device, and particularly to a structure of a high frequency transistor device suitable for increasing the output of a high frequency, high output transistor.

[Conventional technology]

Generally speaking, in high frequency, high power transistors.

In order to increase the output, a plurality of unit transistor blocks are connected in parallel and operated. In that case, as the number of parallel connections increases, the input impedance decreases, so a method of providing an internal matching circuit as shown in FIG. 2 is used.

The internal matching circuit is constituted by the inductance 7 and capacitance 8 of the bonding wires of the transistors, and serves to increase the input impedance which has been lowered by the parallel connection of the transistors as described above. Regarding this type of device, for example, Japanese Patent Publication No. 60-311
There is 03.

[Problem that the invention seeks to solve]

In this type of device, a bonding wire of a transistor is used as the inductance 7 of the matching circuit, and the reproducibility of the inductance is poor.
There was a problem with large variations in construction. Furthermore, in the prior art, there was only one internal matching circuit for each transistor connected in parallel. Therefore, when the number of parallel connections is increased, the input impedance is significantly lowered, resulting in a significant increase in capacitance 8 and a significant decrease in inductance 7, which constitute the internal matching circuit. As a result, due to the parasitic inductance effect of the capacitance 8 and the increased variation in the inductance 7, there is a problem in that it becomes extremely difficult to implement the internal matching circuit described in Section 2 above.

An object of the present invention is to provide means for solving the above-mentioned mounting problems, thereby significantly increasing the output of a high-frequency, high-output transistor.

[Means for solving problems]

The above purpose is to use unit transistors divided into multiple parallel units.
This is achieved by dividing the internal matching circuit into multiple blocks for each block and making them correspond to each other, and by configuring the matching circuit mainly with strip lines.

[Effect]

FIG. 1 is a diagram showing the concept of the present invention.

Here, 1 is a transistor divided into multiple parallel transistors, and a strip line 2 corresponds to each transistor.

on each strip line.

A capacitor 3 is connected to each transistor, and a matching circuit is configured for each of the multiple parallel divided transistors. As a result, the parallel operation of the transistors is performed without any non-uniformity, so that high output of the transistors can be easily achieved.

Hereinafter, the technical means provided by the present invention will be explained in detail with reference to FIG. Regarding the degree of division of transistor 1,
In addition to being electrically insulated, as shown in FIG. 1, they may be loosely coupled by a coupling device 14 made of resistance, inductance, capacitance, a strip line, or the like. i.e. at its operating frequency.

As long as the amplification effect is not significantly inhibited, it is sufficient if the electrical coupling is loosely coupled or insulated.If the electrical isolation is completely electrically isolated, abnormal vibrations may appear, and this abnormal phenomenon can be avoided. In order to eliminate this, the bond may be made coarser.

Reference numeral 2 denotes a strip line, which is constructed with high dimensional accuracy mainly by printing or the like using the insulating substrate of the transistor package as a dielectric. Strip lines have an impedance conversion effect, and quarter-wavelength lines are often used. However, a quarter wavelength line is often too long to be mounted in a small transistor package, and it is often advantageous for the length to be shorter than a quarter wavelength. The inferiority of the electrical characteristics to the quarter-wavelength line can be improved by providing a matching device such as a capacitor that forms a matching circuit together with the strip line 2. The capacitor 3 constitutes a matching device together with the strip line 2. Since the strip line 2 has high processing precision, it can be formed over a wide range, and can be set not only for impedance conversion but also as a matching circuit for sufficient matching with an input signal source.

The capacitor 3 and the strip line 2 constituting the above-mentioned matching device are connected in multiple parallel configurations, and are respectively connected to each transistor block of the transistors 1 that are also configured in multiple parallel configurations.

Although FIG. 1 shows a case in which both the input and output matching circuits are parallelized, this is not a limitation; only the input or only the output may be parallelized.6 In the present invention, the strip instead of line 2.

Bond wire inductance can be used. However, when matching circuits are multiplexed as in the present invention, non-uniformity in series inductance and mutual inductance components between each matching circuit prevent uniform operation of the divided unit transistor blocks, impeding high output. There were cases where this could be done. Therefore, in the present invention, the inductance of the bonding wire is used as little as possible, and the inductance component is mainly realized using a strip line, and in order to achieve sufficient matching, the inductance of the bonding wire is partially used. Inductance may be used.

In the present invention, as shown in FIG. 1, an MO5 type field effect transistor is used as an example, but the present invention is not limited to this. It also applies in cases.

〔Example〕

A first embodiment of the present invention will be described below with reference to FIG.

Figure 3 shows a mounting diagram on an insulating substrate in a transistor package. 9 is an insulating substrate, the back side of which is glued onto a metal block (not shown) with excellent electrical and thermal conductivity. In this embodiment, holes (punching holes) are made in the insulating substrate 9 as shown at 12, and a plurality of transistors 101 are formed through the punching holes. hole 1
2 and is bonded to the metal block. Here, the transistor 101 is made of a semiconductor chip. 2 is a strip line, and the input side is multiplexed. If the number of transistors connected in parallel is not extremely large, the matching circuit on the output side may have little effect of multiplexing, and in this embodiment, multiplexing is not performed. Each transistor 101 has two input/output bonding pads. Yes, bonding for 2 input and 2 output wires.
It is connected to the strip line 2 or the output strip line 501 with a wire. The reason why two bonding wires are used is to reduce the size of the unit transistor block to a necessary and sufficient size and to reduce the inductance of the bonding wires. Since there are two bonding wires here, it is easier to maintain electrical uniformity for each bonding wire than when there are three or more bonding wires, and therefore the unit transistor block can be further divided into two.

Furthermore, in this embodiment, abnormal vibrations may occur due to slight non-uniformity between the transistor 101 and its matching circuit, so in order to eliminate this, it is necessary to A resistor 141 is connected to the resistor 141 to roughly couple them. The resistor 141 on the strip line 2 is located near the transistor 101. Here, it is preferable that the value of the resistor be lower than the impedance when looking at the signal source side from the connection position.

In this embodiment, a semiconductor chip is used as the transistor 101, but a transistor incorporated in a package,
Alternatively, the same applies even if they are configured on the same semiconductor substrate. When constructed on the same semiconductor substrate, the resistor 141 for coarse coupling can also be constructed on the same semiconductor substrate.

Further, in this embodiment, a through hole 10 is formed in the insulating substrate 9, and the ground plane 11 and the back surface of the insulating substrate 9 are electrically connected. 3 is a matching capacitor, and in this embodiment, a ceramic capacitor is used. Capacitor 3 connects strip line 2 and ground plane 1
1 and 1 by, for example, solder, to form a matching circuit together with the strip line 2. One end of the input side of the plurality of strip lines 2 is connected in parallel and connected to a human-powered strip line 401. 4 is an input terminal, which is glued to the input strip line 401. Further, 5 is an output terminal, which is glued to the output strip line 501.

In this embodiment, the input matching circuits are multiplexed. Especially when the input impedance is small due to capacitance, such as with field effect transistors, multiple matching circuits can be operated in parallel, thereby reducing the input power. It is possible to divide the power evenly and reduce power loss due to mismatch.

FIG. 4 shows a second embodiment of the invention. Reference numeral 9 denotes an insulating substrate, which in this embodiment is divided into an input section and an output section. Reference numeral 901 is a part of a metal block to which these insulating substrates are bonded, and the transistor 101 is bonded to the surface of the metal block 901 using a method such as solder or alloy. The configuration of the strip line 2 and the method of connecting the transistors are the same as in the first embodiment. In this embodiment, the capacitor 301 is of a MOS type, and is bonded to the surface of the metal block through the punched hole 13. The capacitor 301 and the strip line 2 are connected using the shortest bonding wire.

In this embodiment, similar to the first embodiment, the transistors 101 are structurally separated from each other, but they may be structured on the same semiconductor substrate, and are electrically insulated at least at the operating frequency. or the bond should be loose.

The effects of this embodiment are similar to those of the first embodiment, but the difference is that punched holes 13 are used instead of the through holes 10 in the first embodiment in the method of processing the insulating substrate 9. . A through hole requires processing to electrically connect the front and back surfaces of the insulating substrate 9 to the hole, but this is not necessary in the case of a punched hole 13, so there is an advantage that the number of manufacturing steps can be reduced.

FIG. 5 shows a third embodiment of the invention. This example is the second
Another configuration of the embodiment is shown. In this embodiment, the punched hole 13 in the second embodiment is eliminated, and the mounting position of the capacitor 301 in the second embodiment is arranged near the position where the transistor 101 is mounted. Here, the plurality of transistors 101, the plurality of capacitors 301, and the means for loosely coupling the plurality of transistors may be formed on the same semiconductor substrate.

The strip line 2 and the capacitor 302 are connected by the second strip line 201 and the shortest bonding wire. Since the strip line 201 has an impedance conversion effect and the value of the capacitor 302 becomes apparently large, the capacitor 301 in the second embodiment
A capacitor with a value smaller than the value of can be used. If the design is such that the value of the matching capacitor seen from the strip line 2 is relatively small, the capacitor 30
Since 2 is no longer necessary, it can be removed.

Further, it is also possible to shorten the length of the strip line 201, open its terminal end, and use its equivalent capacitance.

The effects of this embodiment are similar to those of the first and second embodiments, but the difference is that in the method of processing the insulating substrate 9, processing of through holes, punched holes, etc. is not required. That is, it is only necessary to process the strip line on the insulating substrate 9 by printing or other methods.

Therefore, when using ceramic etc. as an insulating substrate,
This eliminates the need for drilling, which is a difficult process.

It has the advantage of being economically advantageous.

FIG. 6 shows a fourth embodiment of the present invention. In this embodiment, the transistors 1 are formed on the same semiconductor substrate, and are electrically insulated or loosely coupled within the same semiconductor substrate. The insulating substrate 9 is divided into a total of three parts, two input parts and one output part. Reference numeral 901 indicates an exposed portion of a metal block to which an insulating substrate is bonded.

A matching capacitor 303 and transistor 1 are electrically bonded to the exposed portion. The above matching capacitor 3
03 are constructed on the same substrate and are electrically insulated from each other. Two strip lines 2 and a capacitor 30
Reference numeral 3 constitutes an input matching circuit, which is multiplexed in parallel. The effects of this embodiment are as follows. This is similar to the second and third embodiments. This embodiment uses a transistor and a matching capacitor that are formed on the same semiconductor substrate, and has advantages such as being able to reduce the number of mounting steps and increasing dimensional accuracy during mounting.

FIG. 7 shows the fifth embodiment of the present invention. This embodiment is the fourth embodiment.
Another configuration example of the embodiment 0 This example shows a configuration example in which it is desired to widen the mutual spacing of the strip lines 2 because the transistor l is small. It spreads radially and reaches the matching capacitor 304, and further narrows in a reverse radial manner and reaches the input terminal 4. Therefore, since there is a difference in the length of the strip lines 2, electrical uniformity between them cannot be maintained.

In order to prevent the electrical non-uniformity described above, in this embodiment, the width of the strip line is adjusted to GL.

That is, by increasing the width of the strip line to compensate for the length of the strip line, approximately the same impedance conversion effect can be obtained.

If sufficient adjustment cannot be made due to the width of the strip line, use a
The effect of this embodiment, in which the stand capacitor 304 further makes am sufficient, is the same as that of the fourth embodiment.

In the above embodiments, there is an embodiment in which the matching circuit on the output side is also divided into multiple parallel circuits. This is mainly used when the number of transistors connected in parallel is significantly increased in order to achieve particularly high output.

In that case, the output impedance of the output side is significantly reduced as well as that of the input side, so by multiplexing and parallelizing the output matching circuits, the mismatch loss of the output matching circuits can be reduced.

〔Effect of the invention〕

As described above, according to the present invention, input or output, or input and output matching circuits are parallelized in multiples, and transistors are also parallelized in multiples, so the number of parallel unit transistor blocks is increased. According to the present invention, there is no significant change in the values of the strip IIs path and capacitors constituting the matching circuit.
Even if the number of unit transistor blocks connected in parallel is increased, power loss due to mismatching can be significantly reduced. Therefore, when the number of parallel connections is increased, an output proportional to the number of parallel connections can be obtained, for example, as shown in FIG. 8(a).

Further, according to the present invention, since a strip line is used as a component of the matching circuit, its processing accuracy is high.
It is possible to eliminate non-uniformity when multiple parallel lines are connected, and since strip lines can confine electromagnetic fields within their dielectric, electrical interference between multiple parallel strip lines can be reduced. There are also advantages such as being able to Therefore, according to the present invention, power loss due to non-uniformity that occurs when the number of parallel connection of unit transistors is increased can be reduced. Therefore, as shown in FIG. 8(b), for example, it is possible to reduce the decrease in power efficiency such as additional efficiency.

As described above, according to the present invention, it is possible to significantly increase the output of a high-frequency, high-output transistor, and furthermore, there is an effect that a decrease in power efficiency can be reduced.

[Brief explanation of the drawing]

Figure 1 is a conceptual diagram of the present invention, Figure 02 is a conceptual diagram of a conventional device,
FIGS. 3, 4, 5, 6 and 7 illustrate the first aspect of the present invention. Second. Third. FIG. 8 is a plan view showing the fourth and fifth embodiments and a graph showing the effects of the present invention. , 1,101...Transistor, 2,201...Strip line, 3,301,302,303,304...
... Capacitor, 4... Input terminal, 401... Input strip line, 5... Output terminal, 501... Output strip line, 6... Bipolar transistor,
7... Wire inductor, 8... Capacitor, 9
... Insulating substrate, 901 ... Metallic block, 10.
...Through hole, 11... Ground plane, 12.13...
・Punching holes. Atsushi 1 Figure 5 Construction 7 Figure 1 Transistor q
Sat 77 Young Xun Chi

Claims (1)

[Claims] 1. A plurality of electrically isolated or loosely coupled transistor blocks and strip lines for input or output to each of the transistor blocks, or for input and output. These are connected in a one-to-one manner, and one end of the plurality of input or output strip lines, or input and output strip lines, are connected in parallel to form the entire input or output end. Semiconductor equipment. 2. Claim 1, characterized in that the length of the strip line for input, output, or input and output is shorter than a quarter wavelength of its operating frequency.
The high frequency semiconductor device described in Section 1. 3. The high frequency semiconductor device according to claim 1, further comprising a matching circuit comprising the input or output strip line, or the input and output strip line, and at least one capacitor. 4. The high frequency semiconductor device according to claim 3, wherein a second strip line is used in place of the capacitor. 5. The high frequency semiconductor device according to claim 1, wherein the input or output strip line, or the input and output strip line, is constructed using an insulating substrate of a transistor package as a dielectric.