JPH04296103A - High frequency semiconductor hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:To attain an excellent high frequency characteristic and to reduce number of components by jowing an input output conductor film printed on both a 1st and a 2nd dielectric board by fusing so as to form a microstrip line thereby reducing a stray capacitance. CONSTITUTION:A high frequency power is inputted to a transistor(TR) chip 5 through a microstrip line formed by soldering input conductor films 6a, 6b and through a bonding wire 9a and a MOS capacitance 4. Then the high frequency power is amplified by the TR chip 5 and outputted through a microstrip line formed by soldering output conductor films 7a, 7b. Moreover, in the case of high frequency power amplification, a heat generated in the TR chip 5 is dissipated efficiently through dielectric boards 2, 3 formed with a dielectric body with a low thermal resistance and a heat sink 1. In this case, the boards 2,3 are fitted and a notch 2a has no corner.

Description

[Detailed description of the invention]

0001

[Field of Industrial Application] This invention relates to a high-frequency semiconductor hybrid integrated circuit device equipped with a transistor for amplifying high-frequency power and its matching circuit, and more particularly to a high-frequency semiconductor hybrid integrated circuit device with reduced stray capacitance and improved high-frequency characteristics. It is related to.

0002

2. Description of the Related Art FIG. 3 is a perspective view showing a conventional high frequency semiconductor hybrid integrated circuit device. In the figure, a dielectric substrate 2 on which a circuit (not shown) is partially mounted is fused onto a heat sink 1, and a low thermal resistance substrate 2 on which a MOS capacitor 4, a transistor chip 5, and a grounding conductor bridge 10 are mounted. A heat sink 11 made of an insulator is connected to the dielectric substrate 2.
It is arranged in the hollow part 2a of. And dielectric substrate 2
On the heat sink 11 are an input conductor film 6a, an input conductor film 6b, an output conductor film 7a, an output conductor film 7b which also serves as a bias line for the transistor chip 5, and a ground conductor film 8.
e is printed on each. Then, the input conductor film 6
a and the input conductor film 6b, and the output conductor film 7a and the output conductor film 7b are connected by soldering through the input lead 12 and the output lead 13, respectively. Further, the input conductor film 6b, the MOS type capacitor 4, and the transistor chip 5 are connected by a bonding wire 9a such as a gold wire, and similarly the MOS type capacitor 4, the transistor chip 5, and the grounding conductor bridge 10 are connected by a bonding wire 9a such as a gold wire. They are connected by wire 9a.

Next, the operation of the above-mentioned high frequency semiconductor hybrid integrated circuit device will be explained. High frequency power is input to the transistor chip 5 via the input conductor film 6a, the input lead 12, the input conductor film 6b, the bonding wire 9a, and the MOS capacitor 4. Then, the high frequency power input to the transistor chip 5 is amplified, and the amplified high frequency power is transferred to the output conductor film 7b, the output lead 13,
It is output through the output conductor film 7a. The heat generated during this amplification action is transferred to the heat sink 11 and the heat sink 1.
released through.

0004

[Problems to be Solved by the Invention] In the conventional high frequency semiconductor hybrid integrated circuit device described above, as shown in the figure, an input conductor film 6a and an input conductor film 6b printed on the dielectric substrate 2 and the heat sink 11, respectively. Each connection is made by soldering the input lead 12 and the output lead 13 to the output conductor film 7b and the output conductor film 7a, respectively.

However, the connection using the leads 12 and 13 increases stray capacitance, which adversely affects high frequency characteristics. In addition, in the manufacturing process, input/output leads 1
Since 2 and 13 installations are required, the number of manufacturing steps naturally increases, making it difficult to save labor. Furthermore, since the shape of the heat sink 11 is rectangular, the cavity 2a of the dielectric substrate 2 into which the heat sink 11 is fitted must also be square-shaped, which may cause stress to concentrate at the corners of the cavity 2a and cause the board to crack. Occasionally this occurred.

[0006] This invention was made to solve the above-mentioned problems, and it is possible to save labor during manufacturing by eliminating the need for input/output leads, and to create a high-frequency semiconductor hybrid with small stray capacitance and excellent high-frequency characteristics. The purpose is to obtain an integrated circuit device.

Another object of the present invention is to obtain a high frequency semiconductor hybrid integrated circuit device which is free from substrate cracks and has excellent durability.

[0008]

[Means for Solving the Problems] A high-frequency semiconductor hybrid integrated circuit device according to the present invention includes a first dielectric substrate on which a circuit is mounted on the surface of the substrate and a hollow portion formed in a portion thereof, which is fused onto a heat sink. A second dielectric substrate with low thermal resistance, on which a MOS capacitor and a transistor chip are mounted, is fitted into the cavity of the first dielectric substrate, and both the first and second dielectric substrates are It consists of a structure in which input/output conductor films printed on the front panel are fused and connected.

Further, in the high frequency semiconductor hybrid integrated circuit device according to the present invention, the fitting portion between the first dielectric substrate and the second dielectric substrate has a structure without corners.

0010

[Operation] According to the present invention, a dielectric substrate with low thermal resistance is used as a heat sink, and a microstrip line is formed to connect input/output conductor films without using leads.
High frequency characteristics can be improved by reducing stray capacitance between leads and ground.

Further, according to the present invention, the first dielectric substrate and the second dielectric substrate (heat sink) are fitted into each other.
Since the hollow part of the dielectric substrate has a structure without corners, it is possible to prevent the substrate from cracking.

0012

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view of a high frequency semiconductor hybrid integrated circuit device of the present invention. FIG. 2 is a perspective view showing a state in which the first dielectric substrate and the second dielectric substrate of the high frequency semiconductor hybrid integrated circuit device of FIG. 1 are separated. Note that in FIGS. 1 and 2, the same reference numerals as those in FIG. 3 indicate the same or corresponding parts.

In FIG. 2, a first dielectric substrate 2 on which a circuit such as a matching circuit is mounted in a not-shown portion and a semi-elliptical cavity 2a with no corners is formed is fused onto the heat sink 1. ,
Next, a second dielectric substrate (heat sink) 3 made of a dielectric material with low thermal resistance (for example, aluminum nitride) and having a protrusion 3a and mounting a MOS type capacitor 4, a transistor chip 5, and a grounding conductor bridge 10 on its upper surface is mounted. The hollow part 2a
The high frequency semiconductor hybrid integrated circuit device shown in FIG. 1 is constructed by fitting the second dielectric substrate 3 onto the first dielectric substrate 2 and fusing the second dielectric substrate 3 onto the first dielectric substrate 2. At this time, the input conductive film 6a printed on the first dielectric substrate 2, the input conductive film 6b printed on the second dielectric substrate 3, and the output printed on the first dielectric substrate 2 The overlapping portions of the output conductor film 7a and the output conductor film 7b printed on the second dielectric substrate 3 are fused by soldering to form a microstrip line. On the other hand, grounding conductor films 8a, 8b, 8c are printed on the first dielectric substrate, and input conductor films 6b, MO
The S type capacitor 4 and the transistor chip 5 are connected by a bonding wire 9a, and the MOS type capacitor 4,
The transistor chip 5 and the grounding conductor bridge 10 are connected by a bonding wire 9b. Furthermore, a grounding conductor film 8d is formed on the second dielectric substrate. Further, the transistor chip 5 is connected to a grounding conductor bridge 10 and grounded by a bonding wire 9b.

Next, the operation will be explained. The high frequency power is input to the transistor chip 5 through the bonding wire 9a and the MOS capacitor 4 through a microstrip line formed by soldering the input conductor film 6a and the input conductor film 6b. Next, the high frequency power is amplified by the transistor chip 5 and output through a microstrip line formed by soldering the output conductor film 7a and the output conductor film 7b. Furthermore, the heat generated in the transistor chip 5 during this high-frequency power amplification is absorbed by the dielectric substrates 2 and 3 formed of a dielectric material with low thermal resistance.
and is efficiently released through the heat sink 1.

As described above, in this embodiment, since the connections between the input conductor films and the output conductor films printed on the first and second dielectric substrates form microstrip lines, the high frequency characteristics are improved. Furthermore, since there are no corners in the fitting portion of the first and second dielectric substrates, cracking or damage to the substrates can be prevented.

Note that in the above embodiment, the second dielectric substrate (
Although the hole portion into which the heat sink 3 is fitted is provided at the end of the first dielectric substrate 2, it may be provided at the center of the first dielectric substrate 2.

Further, in the above embodiment, the second dielectric substrate (
Although the shape of the cavity 2a of the first dielectric substrate into which the heat sink 3 is fitted is semi-elliptical, the shape of the cavity may be any shape without corners.

[0018]

As described above, according to the present invention, a first dielectric substrate having a circuit mounted on the surface of the substrate and a hollow portion formed in a portion is fused onto a heat sink, and A second dielectric substrate with low thermal resistance on which a MOS capacitor and a transistor chip are mounted is fitted into the hollow part of the dielectric substrate, and an input printed on both the first and second dielectric substrates is fitted. Since the output conductor film is fused to form a microstrip line, it is possible to realize a high-frequency semiconductor hybrid integrated circuit device with less stray capacitance, excellent high-frequency characteristics, and a reduced number of parts.

Further, according to the present invention, since the hollow part of the dielectric substrate for mounting the heat sink has a hole structure without corners, it is possible to prevent the substrate from cracking and to provide a high-frequency semiconductor hybrid integrated circuit device with excellent durability. There are effects that can be achieved.

Furthermore, according to the present invention, it is not necessary to attach leads, so the number of parts can be reduced.
This has the expected effect of improving productivity and production costs.

[Brief explanation of drawings]

FIG. 1 is a perspective view showing a high frequency semiconductor hybrid integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a perspective view showing a state in which a first dielectric substrate and a second dielectric substrate of the high-frequency semiconductor hybrid integrated circuit device of FIG. 1 are separated;

FIG. 3 is a perspective view showing a conventional high frequency semiconductor hybrid integrated circuit device.

[Explanation of symbols]

1 Heat sink 2 First dielectric substrate 2a Hollow portion of first dielectric substrate 3 Second dielectric substrate (heat sink) 3a
Protrusion 4 of second dielectric substrate MOS capacitor 5 Transistor chip 6a Input conductor film 6b Input conductor film 7a Output conductor film 7b Output conductor film 8a Grounding conductor film 8b Grounding conductor film 8c Grounding conductor Film 8d Grounding conductor film 8e Grounding conductor film 9a Bonding wire 9b Bonding wire 10 Conductor bridge 11 Heat sink 12 Input lead 13 Output lead

Claims (2)

[Claims] 1. A heat sink, a first dielectric substrate disposed overlappingly on the heat sink, having a circuit mounted on its surface and having a hollow portion formed therein, and the first dielectric substrate. a second dielectric substrate with low thermal resistance that fits into the cavity and has a MOS capacitor and a transistor chip mounted on its surface; A high-frequency semiconductor hybrid integrated circuit device, characterized in that the overlapped portions of conductive films are fused by soldering. 2. The high frequency semiconductor hybrid integrated circuit device according to claim 1, wherein the fitting portion between the first dielectric substrate and the second dielectric substrate has a structure without corners. High frequency semiconductor hybrid integrated circuit device.