JPS59126654A - High frequency power amplifier - Google Patents
High frequency power amplifierInfo
- Publication number
- JPS59126654A JPS59126654A JP58001925A JP192583A JPS59126654A JP S59126654 A JPS59126654 A JP S59126654A JP 58001925 A JP58001925 A JP 58001925A JP 192583 A JP192583 A JP 192583A JP S59126654 A JPS59126654 A JP S59126654A
- Authority
- JP
- Japan
- Prior art keywords
- alumina substrate
- high frequency
- substrate
- transistor
- soldered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は無線機の送信段のアンプ等に使用される高周波
電力増幅器に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a high frequency power amplifier used for an amplifier in a transmitting stage of a radio device, etc.
従来もっとも一般的な高周波電力増幅器は、第１図に示
す等価回路で構成されている。即ち１は入力端子、２は
出力端子、３，４は駆動電源端子、５は接地端子である
１、６は前段トランジスタ、７は後段トランジスタであ
る。インダクタンス分８〜１３、容量１４〜２１は信号
伝達回路を構成し、インダクタンス２２，２３、抵抗２
４〜２６、容量２７．２Ｂ、ダイオード２９はトランジ
スタのバイアス回路を構成し、Ｌ分３０，３１は電源用
インダクタンス回路を構成する。The conventionally most common high frequency power amplifier is constructed from the equivalent circuit shown in FIG. That is, 1 is an input terminal, 2 is an output terminal, 3 and 4 are driving power supply terminals, and 5 is a ground terminal. 1 and 6 are front-stage transistors, and 7 is a rear-stage transistor. Inductances 8 to 13 and capacitances 14 to 21 constitute a signal transmission circuit, inductances 22 and 23, and resistance 2
4 to 26, a capacitance of 27.2 B, and a diode 29 constitute a transistor bias circuit, and L components 30 and 31 constitute a power supply inductance circuit.
第１図において、特に微弱な信号をソース源とする前段
トランジスタ６は、第２図に示す如く小形及び低コスト
の面から、従来のトランジスタパッケーノに内蔵されて
おらず、高周波電力増幅器の放熱板４１に半田付けされ
た回路基板４２上に、放熱板４３にマウントされたトラ
ンジスタチップ４４として半田付けされ、次いでゼンデ
ィングワイヤ４５でエミッタ電極４６とベース電極４７
が配線される。コレクタ電極４８は放熱板４３との半田
付けで結ばれる。またエミッタ電極４６はスルーホール
４９を通して放熱板４１に接地される。図中５０はエミ
。In FIG. 1, the front-stage transistor 6, which uses a particularly weak signal as a source, is not built into the conventional transistor packeno due to its small size and low cost, as shown in FIG. A transistor chip 44 is mounted on a heat dissipation plate 43 on a circuit board 42 soldered to a board 41, and then an emitter electrode 46 and a base electrode 47 are connected with a fusing wire 45.
is wired. The collector electrode 48 is connected to the heat sink 43 by soldering. Further, the emitter electrode 46 is grounded to the heat sink 41 through a through hole 49. 50 in the figure is Emi.
タブリッジである。This is Tabbridge.
上記のように従来は分離されたトランジスタ配線ｆ４４
を、放熱板４３にマウントし、その他部品（チッｆＣ，
Ｒ、コイル等）を搭載した高周波増幅器５１の所定の部
分におき、半田付けした後ワイヤ配線を設けていた。と
の方法によると、高周波増幅器を形成する回路基板４２
は大形であるから、半田付は位置を正確にコントロール
することは困難であシ、ワイヤ配線４５の長さもばらつ
き、量産歩留が極めて悪い。As mentioned above, conventionally separated transistor wiring f44
is mounted on the heat sink 43, and other parts (chifC,
After soldering, wire wiring was provided at a predetermined portion of the high frequency amplifier 51 equipped with a high frequency amplifier 51 (R, coil, etc.). According to the method of , a circuit board 42 forming a high frequency amplifier
Since it is large in size, it is difficult to accurately control the soldering position, and the length of the wire wiring 45 also varies, resulting in extremely poor mass production yield.
またワイヤ配線することによってその他回路も接続され
、トランジスタの特性チェックが容易でない。また不良
トランジスタの交換も時間を要し、その他の不良原因と
なる。また従来高周波電力増幅の歩留低下の原因は、前
段トランジスタテラ７’４４の取シ扱いの不便さから、
トランジスタチップが不良になる場合がほとんどで、不
良であることが分っても、チップを保護するためにエン
キャ、ゾ等をほどこしているため交換が困難で、高周波
電力増幅器として不良にしている場合が多く、その他の
高価な部品ごと捨てていた。Furthermore, other circuits are also connected by wire wiring, making it difficult to check the characteristics of the transistor. Furthermore, replacing a defective transistor also takes time and causes other defects. In addition, the reason for the decrease in yield of conventional high frequency power amplification is the inconvenience of handling the front stage transistor TERRA7'44.
In most cases, the transistor chip becomes defective, and even if it is determined that it is defective, it is difficult to replace it because it is encased, etc., to protect the chip, making it defective as a high-frequency power amplifier. There were a lot of them, and I had to throw away all the other expensive parts.
本発明は上記実情に鑑みてなされたもので、エミッタ接
地の場合ベース電極に入る寄生インダクタンスのばらつ
きを小さくでき、またチップのマウント、ボンディング
を容易に行なうことができ、また装着されたトランジス
タチップの特性チェックを可能にすることができ、また
トランジスタチ、ｆの着脱が容易化される高周波電力増
幅器を提供しようとするものである。The present invention has been made in view of the above-mentioned circumstances, and in the case of a common emitter, it is possible to reduce the variation in parasitic inductance entering the base electrode, it is possible to easily mount and bond the chip, and it is also possible to It is an object of the present invention to provide a high frequency power amplifier in which characteristics can be checked and transistors 1 and 2 can be easily attached and detached.
本発明は、前記トランジスタチップを搭載しかつ予め配
線を施こした小形の絶縁基板を予め形成しておき、これ
をもう一つの絶縁基板に半田付けすることによって、前
記目的を達成するようＫしたものである。The present invention achieves the above object by forming in advance a small insulating substrate on which the transistor chip is mounted and pre-wired, and by soldering this to another insulating substrate. It is something.
以下図面を参照して本発明の一実施例を説明する。第３
図に示す如く高周波増幅器の放熱板６１上に、部分メタ
ライズされたアルミナ基板６２を半田付けする。メタラ
イズ材料としてはＡｇＰｄ 、、 ＷＫＮｉめっきした
もの等があシ、半田付けは容易である。この形状は第４
図に示され、部分メタライズ領域（エミッタ電極）６３
はスルーホール６４を介して放熱板６１と電気的に接続
されている。次いで第３図に示す如く表裏共通の電極を
もつアルミナ基板６５に、予めトランジスタチップ（前
段トランジスタ）６６を、ＡｕＳ Ｉ共晶酸いは５ｎＳ
ｂ等でマウントし、ワイヤ６７のボンディング配線をす
る。第５図はアルミナ基板６５の裏面電極形状を示し、
中心の孔６８に放熱板６９が嵌合され、その表面にチッ
プ６６がマウントされている。An embodiment of the present invention will be described below with reference to the drawings. Third
As shown in the figure, a partially metallized alumina substrate 62 is soldered onto a heat sink 61 of a high frequency amplifier. The metallization material may be AgPd, WKNi plated material, etc., and soldering is easy. This shape is the fourth
As shown in the figure, a partial metallized region (emitter electrode) 63
is electrically connected to the heat sink 61 via a through hole 64. Next, as shown in FIG. 3, a transistor chip (front stage transistor) 66 is placed in advance on an alumina substrate 65 having common electrodes on the front and back sides, and is coated with AuS I eutectic acid or 5nS.
mount with b etc. and wire the wire 67 for bonding. FIG. 5 shows the shape of the back electrode of the alumina substrate 65,
A heat sink 69 is fitted into the center hole 68, and a chip 66 is mounted on its surface.
アルミナ基板６５はアルミナ基板６２と、相対向するメ
タライズ部分で半田付けされ、エミッタ電極６３、ペー
ス電極７１、コレクタ電極７２を、アルミナ基板６５の
表裏連結部７３を通して一体化される。アルミナ基板６
５は、スナッゾライン（分割するための溝）付きの多数
個数シにしておき、１枚のシート状で予め放熱板６９を
底面部のみ半田付けして固着したあと、ローラ等で分離
することができる。前記アルミナ基板の厚みは０．５
ｗ程度で、放熱板６９は０．４〜０．５ ｖａｎのＭｏ
にＮｉめっきをほどこしたものまたアルミナ基板６５の
メタライズは、アルミナ基板６２と同じで、ボンディン
グ・フッド部はＮｉめっき面或いはＡｕ厚膜等が用いら
れ、その他の部分は高周波の損失を小さくするため、半
田めっきしておくのがよい。The alumina substrate 65 is soldered to the alumina substrate 62 at opposing metallized portions, and the emitter electrode 63, the space electrode 71, and the collector electrode 72 are integrated through the front and back connecting portions 73 of the alumina substrate 65. Alumina substrate 6
5 is made into a large number of sheets with snuzz lines (grooves for dividing), and after the heat dissipation plate 69 is fixed in advance by soldering only the bottom part in one sheet form, it can be separated using a roller or the like. . The thickness of the alumina substrate is 0.5
The heat sink 69 has Mo of 0.4 to 0.5 van.
Also, the metallization of the alumina substrate 65 is the same as that of the alumina substrate 62, and the bonding hood part is made of a Ni-plated surface or a thick Au film, etc., and the other parts are used to reduce high-frequency loss. , it is better to use solder plating.
上述した実施例によれば、アルミナ基板６５が小形で該
基板面での位置決めが容易であるから、マウント、ゼン
ディング工程を容易に自動化でき、またワイヤ６７の長
さのばらつきによる寄生インダクタンスのばらつきをお
さえることができる。また基板６５のメタライズ部分に
トランジスタ配線ができるため、特性チェ、りが容易で
、また高周波電力増幅器に搭載した場合でも、容易に基
板６５ごと取シ外すことができる。またトランジスタチ
ップ搭載の基板のみ交換すればよく、ロスを極めて少な
くすることができた。According to the embodiment described above, since the alumina substrate 65 is small and can be easily positioned on the substrate surface, the mounting and gending processes can be easily automated, and variations in parasitic inductance due to variations in the length of the wires 67 can be avoided. can be suppressed. Further, since the transistor wiring can be formed on the metallized portion of the substrate 65, it is easy to check the characteristics, and even when mounted on a high frequency power amplifier, the entire substrate 65 can be easily removed. In addition, only the board on which the transistor chip is mounted needs to be replaced, making it possible to extremely reduce losses.
以上説明した如く本発明によれば、トランジスタチップ
のマウント、がンディング工程を容易に自動化でき、ま
たぎンディングヮイヤのばらつきを極小化できて寄生イ
ンダクタンスのばらつきをおさえることができる。また
トランジスタチップの特性チェックが容易で、またトラ
ンジスタチップ搭載の基板を取りはずして交換できるか
ら、部品のロスを極めて少なくできるものである。As described above, according to the present invention, it is possible to easily automate the mounting and bonding process of a transistor chip, and it is also possible to minimize the variation in the bonding wire, thereby suppressing the variation in parasitic inductance. In addition, it is easy to check the characteristics of the transistor chip, and the substrate on which the transistor chip is mounted can be removed and replaced, so that the loss of parts can be extremely reduced.
第１図は従来の高周波電力増幅器の等価回路図、第２・
図はその前段トランジスタ部分の構成を示す斜視図、第
３図は本発明の一実施例の要部斜視図、第４図、第５図
はその一部構成図である。
６１・・・放熱板、６２・・・アルミナ基板、６３・・
・エミッタ電極、６５・・・アルミナ基板、６６・・・
トランジスタチップ、６７・・・ワイヤ、６９・・・放
熱板、７１・・・ペース電極、７２・・・コレクタ電極
、７３・・・表裏連結部。
出願人代理人 弁理土鈴 江 武 彦
第１図
＠２図
第４図 第５１Figure 1 is an equivalent circuit diagram of a conventional high frequency power amplifier;
The figure is a perspective view showing the structure of the front-stage transistor part, FIG. 3 is a perspective view of a main part of an embodiment of the present invention, and FIGS. 4 and 5 are partial structural views thereof. 61... Heat sink, 62... Alumina substrate, 63...
・Emitter electrode, 65...Alumina substrate, 66...
Transistor chip, 67... Wire, 69... Heat sink, 71... Space electrode, 72... Collector electrode, 73... Front and back connection portion. Applicant's agent: Patent attorney Takehiko E Takehiko Figure 1 @ Figure 2 Figure 4 Figure 51
Claims (1)
ンジスタ及び該トランジスタの厚膜状電極を設は前記ト
ランジスタの電極と前記厚膜状電極を？ンディング接続
した第２の絶縁基板とを具備し、この第２の絶縁基板を
前記第１の絶線基板上に前記厚膜状の電極を介して半田
付けしてなり、前記第２の絶縁基板は第１の絶縁基板よ
シボ形であることを特徴とする高周波電力増幅器。A first insulating substrate on which a high frequency power amplification circuit is formed, a transistor and a thick film electrode of the transistor are provided, and the electrode of the transistor and the thick film electrode are connected to each other. a second insulating substrate which is connected to the first insulating substrate by soldering the second insulating substrate to the first insulating substrate through the thick film electrode; A high frequency power amplifier characterized in that the first insulating substrate has a textured shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58001925A JPS59126654A (en) | 1983-01-10 | 1983-01-10 | High frequency power amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58001925A JPS59126654A (en) | 1983-01-10 | 1983-01-10 | High frequency power amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59126654A true JPS59126654A (en) | 1984-07-21 |
Family
ID=11515171
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58001925A Pending JPS59126654A (en) | 1983-01-10 | 1983-01-10 | High frequency power amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59126654A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0200291A2 (en) * | 1985-04-26 | 1986-11-05 | Tektronix, Inc. | Surface mountable microwave IC package |
| JPS6376355A (en) * | 1986-09-18 | 1988-04-06 | Nec Corp | Container for semiconductor device |
| JP2010016396A (en) * | 2009-09-07 | 2010-01-21 | Renesas Technology Corp | Semiconductor device |
-
1983
- 1983-01-10 JP JP58001925A patent/JPS59126654A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0200291A2 (en) * | 1985-04-26 | 1986-11-05 | Tektronix, Inc. | Surface mountable microwave IC package |
| JPS6376355A (en) * | 1986-09-18 | 1988-04-06 | Nec Corp | Container for semiconductor device |
| JP2010016396A (en) * | 2009-09-07 | 2010-01-21 | Renesas Technology Corp | Semiconductor device |
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