JPH05234997A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To electrically screen out thinned part generated at metal wiring. CONSTITUTION:A bonding pad 2 is formed on a surface of a semiconductor substrate 1, and a main metal wiring 3 is extended from the pad 2. On the other hand, first and second submetal wirings 4A, 4B are formed in parallel from the pad 2 at both sides of the wiring 3, and test pads 5A, 5B are respectively formed at ends of the wirings 4A, 4B.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit,
In particular, it relates to the structure of metal wiring.

[0002]

2. Description of the Related Art On a surface of a semiconductor substrate which constitutes a semiconductor integrated circuit, a bonding pad for connecting an external terminal with a bonding wire and a metal wiring for connecting the bonding pad and an internal circuit are formed. ..

FIG. 3 is a top view for explaining the structure of a conventional general semiconductor integrated circuit device. In FIG.
On the surface of the semiconductor substrate 1, there are formed a bond pad 2 and a metal wiring 3A led from the bonding pad 2 and connected to an internal circuit (not shown).
Usually, the bonding pad 2 and the metal wiring 3A are made of aluminum.

[0004]

In order to form the bonding pad 2 and the metal wiring 3A on the semiconductor substrate 1, first, an aluminum film is applied to the entire surface of the semiconductor substrate 1, and the bonding pad 2 and the metal wiring 3A are formed by an exposure technique. Etch the other part while leaving the part. At this time, if dust adheres to the surface during the aluminum film forming step or exposure, the dust portion is also etched in the post-etching step, and if the dust is on the metal wiring 3A portion, the metal wiring 3A A chip occurs in the portion 6 where the dust was present. If a part of the metal wiring is chipped like this,
If the metal wiring is completely broken, it can be found as a defect at the test stage and removed, but if a part of the metal wiring is thin, it is difficult to find it by an electrical test.

Therefore, when the product is used for a long period of time, a failure occurs in the market as a progressive failure. In particular, for applications requiring high reliability, such as automotive electrical equipment,
Sometimes it leads to a life-threatening accident. Further, the progress of the thinning of the metal wiring described above is likely to occur particularly in a power supply or ground wiring in which a current flowing through the metal wiring is relatively large.

Conventionally, there has been a drawback that a large number of man-hours are required because the surface of the semiconductor substrate is visually inspected in an enlarged manner in order to screen the thinness of the metal wiring described above.

[0007]

A semiconductor integrated circuit according to the present invention comprises a bonding pad formed on a semiconductor substrate,
It includes a main metal wire connected to the bonding pad and a sub metal wire arranged in parallel on both sides of the main metal wire and having one end connected to the bonding pad and the other end connected to the test pad.

[0008]

The present invention will be described below with reference to the drawings. FIG. 1 is a top view of an embodiment of the present invention.

In FIG. 1, a bonding pad 2 is formed on the surface of a semiconductor substrate 1, and a main metal wiring 3 is led out from this bonding pad 2 and connected to an internal circuit (not shown). Further, first and second sub-metal wirings 4A and 4B are formed in parallel to both sides of the main metal wiring 3 from the bonding pad 2, and test pads 5A and 5B are formed at the terminal ends thereof.

In the embodiment constructed as described above, when the dust adheres to a part of the main metal wiring 3 and the dust-filled portion 6 becomes thin, as shown in FIG. Since it also affects the sub-metal wiring 4A (or 4B), a chip is similarly generated. For this reason, disconnection occurs in the sub metal wiring 4A (or 4B). Therefore, thinning of the main metal wiring 3 is electrically detected by conducting a continuity test between the bonding pad 2 and the test pad 5A (or 5B). It is possible to This continuity test can be performed at the same time as the test process normally performed.

In order to effectively carry out the present invention, it is necessary to form the sub-metal wirings 4A and 4B very thin so that they are easily broken due to dust, and to arrange them in the immediate vicinity of the main metal wiring 3. is there. Since the main metal wiring 3 generally requires a current capacity, it has a thickness of several tens of μm, while the sub-metal wirings 4A and 4B usually have a thickness of 1 to 2 μm because no current flows through it. Metal wiring 3 and sub-metal wiring 4A, 4B
Since they have the same potential, it is not necessary to consider the withstand voltage between the wirings, so that the distance between the two can be arranged close to 1-2 μm.
Further, the test pads 5A and 5B only need to be provided with probe needles, so that the bonding pad 2 (usually 100 μm) is used.
It may be smaller than about m).

[0012]

As described above, according to the present invention, it is possible to electrically detect the thinness of the main metal wiring. Therefore, the conventional visual screening can be omitted, and the semiconductor integrated circuit can be omitted. Manufacturing cost can be reduced. Further, since the defects can be removed more completely, the reliability of the semiconductor integrated circuit can be improved.

[Brief description of drawings]

FIG. 1 is a top view of an embodiment of the present invention.

FIG. 2 is a top view for explaining the effect of the embodiment.

FIG. 3 is a top view of an example of a conventional semiconductor integrated circuit.

[Explanation of symbols]

 1 semiconductor substrate 2 bonding pad 3, 3A, 3B, 4A, 4B metal wiring 5A, 5B test pad 6 dusty part

Claims (1)

[Claims] 1. A bonding pad formed on a semiconductor substrate, a main metal wire connected to this bonding pad, and one main wire connected to both sides of the main metal wire in parallel with one end connected to the bonding pad and the other end. And a sub-metal wiring connected to the test pad.