JPH05211215A - Probe card - Google Patents

Probe card

Info

Publication number
JPH05211215A
JPH05211215A JP4003513A JP351392A JPH05211215A JP H05211215 A JPH05211215 A JP H05211215A JP 4003513 A JP4003513 A JP 4003513A JP 351392 A JP351392 A JP 351392A JP H05211215 A JPH05211215 A JP H05211215A
Authority
JP
Japan
Prior art keywords
probe card
chip
probe
pads
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4003513A
Other languages
Japanese (ja)
Inventor
Tetsuo Kazami
哲夫 風見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4003513A priority Critical patent/JPH05211215A/en
Publication of JPH05211215A publication Critical patent/JPH05211215A/en
Withdrawn legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To arrange probes at fine pitches by machining pads and wirings for mounting the probes to a probe card substrate through the same technique as for a chip following the fining, improvement in the degree of integration and increase of pins of a semiconductor integrated circuit. CONSTITUTION:A semiconductor chip 6 for increasing pitches, in which pads 3 for inspection in the same arrangement as a chip 1 to be inspected and large pitch pads 4 in the arrangement of large pitches on the outside to the pads 3 are mounted and the pads 3 and 4 are connected by wirings 5 in the chip by using the same manufacturing technique as for the chip 1 to be inspected, is prepared. Probes 7 are set up vertically to the pads 3 for inspection of the chips 6 and the chip 6 is fixed onto a probe card substrate 8, and the large pitch pads 4 of an outer circumferential section and metallic electrodes 9 on the substrate 8 are connected by bonding wires 10.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はプローブカードに関し、
特に高密度、多ピンのプローブカードに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a probe card,
In particular, it relates to a high density, multi-pin probe card.

【0002】[0002]

【従来の技術】従来の半導体集積回路のウェハ検査を行
うプローブカードは、プローブカード基板から斜め方向
に取り付けたタングステン針、パラジウム針などのプロ
ーブによってチップのウェハ検査を行っていた。また、
プローブカード基板に微細ピン,スプリングピン等のプ
ローブを垂直に取り付けた構造のプローブカードも使用
されている。この構造のプローブカードの一例として
は、特開平1−189932の「プローブカード」等が
ある。
2. Description of the Related Art In a conventional probe card for inspecting a semiconductor integrated circuit wafer, a chip wafer is inspected by a probe such as a tungsten needle or a palladium needle obliquely attached from a probe card substrate. Also,
A probe card having a structure in which probes such as fine pins and spring pins are vertically mounted on a probe card substrate is also used. An example of a probe card having this structure is the "probe card" disclosed in Japanese Patent Application Laid-Open No. 1-189932.

【0003】このプローブカード基板にプローブを垂直
に取り付ける構造のプローブカードは、図4の断面図に
示すようにプローブカード基板8の表面に、金属電極9
を形成し、この金属電極9に微細ピンのプローブ7を垂
直にろう付け等により固定している。そして、この垂直
に取り付けたプローブ7を、ステージ13に載せた被検
査チップ1のパッド2に接触させ、ウェハ検査を行って
いる。
A probe card having a structure in which the probe is vertically attached to the probe card substrate has a metal electrode 9 on the surface of the probe card substrate 8 as shown in the sectional view of FIG.
The probe 7 having fine pins is vertically fixed to the metal electrode 9 by brazing or the like. Then, the vertically attached probe 7 is brought into contact with the pad 2 of the chip 1 to be inspected mounted on the stage 13 to perform the wafer inspection.

【0004】[0004]

【発明が解決しようとする課題】近年、半導体集積回路
の微細化、多ピン化に伴い、チップ内のパッドピッチが
狭まる傾向にあり、このチップのウェハ検査を行うため
のプローブカードも同様の傾向にある。プローブカード
基板に微細ピンをプローブとして基板に垂直に取り付け
るプローブカードにおいては、被検査チップのパッド配
置と同一のプローブ配置が必要となり、プローブを取り
付けるための基板上の電極も同様である。さらに、この
電極から検査装置までの信号の伝達、チップの消費電力
増大による電源ライン強化のためにはプローブカード基
板の微細加工及び多層化が必項である。
In recent years, as semiconductor integrated circuits have become finer and the number of pins has increased, the pad pitch in a chip has tended to become narrower, and the probe card for inspecting a wafer of this chip has the same tendency. It is in. In a probe card in which fine pins are vertically attached to a probe card substrate as a probe, the same probe arrangement as the pad arrangement of the chip to be inspected is required, and the electrodes on the substrate for attaching the probe are also the same. Further, in order to transmit a signal from the electrode to the inspection device and to strengthen the power supply line by increasing the power consumption of the chip, it is indispensable to microfabricate the probe card substrate and make it multilayer.

【0005】しかし、現在のガラス・エポキシ等を用い
た絶縁基板に対するリソグラフィ加工技術では、絶縁基
板配線を含めて半導体技術によるLSIと同等の微細ピ
ッチでの加工は非常に困難であり、また可能であっても
コストが高くなってしまうため、チップのテストコスト
の上昇につながるという問題点がある。
However, with the current lithography processing technology for insulating substrates using glass, epoxy, etc., it is very difficult and possible to process the insulating substrate wiring at a fine pitch equivalent to that of LSI by semiconductor technology. Even if there is, there is a problem in that the cost will increase, leading to an increase in chip test cost.

【0006】また、さらに多ピン化が進み、チップの中
央部にパッドが形成されたチップにおいては、パッドの
高密度化がさらに進み、この問題はより大きく顕在化し
ていくる。
Further, in a chip in which the number of pins is further increased and a pad is formed in the central portion of the chip, the density of the pad is further increased, and this problem becomes more serious.

【0007】[0007]

【課題を解決するための手段】本発明のプローブカード
は、プローブを垂直に取り付けたプローブカードにおい
て、被検査チップのパッドピッチから、プローブカード
を構成する絶縁基板をLSI加工技術で容易に加工でき
るピッチまでピッチを拡大するための半導体チップと、
その半導体チップとプローブカード基板とをワイヤボン
ディングで接続した構造を備えている。
According to the probe card of the present invention, in the probe card in which the probe is mounted vertically, the insulating substrate constituting the probe card can be easily processed by the LSI processing technique from the pad pitch of the chip to be inspected. A semiconductor chip for expanding the pitch to the pitch,
It has a structure in which the semiconductor chip and the probe card substrate are connected by wire bonding.

【0008】[0008]

【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の第1の実施例の断面図、図2はその
プローブカード基板の底面図である。ピッチ拡大用チッ
プ6は、半導体チップ上に、被検査チップ1のパッド2
の配置と同一の配置で設けた検査用パッド3と、この検
査用パッド3よりも大きいピッチで検査用パッド3の外
周部に設けたパッド4との間をチップ内の配線5で接続
して形成され、このチップ6の検査用パッド3に微細ピ
ン7をプローブとしてろう付け等により基板に垂直に取
り付ける。ピッチ拡大用チップ6内の検査用パッド3は
被検査チップ1のパッド2と同一ピッチであり、パッド
4はそれよりも広いピッチであるため、被検査チップ1
の加工技術を用いればチップ6は容易に製作可能であ
る。
The present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of the first embodiment of the present invention, and FIG. 2 is a bottom view of the probe card substrate thereof. The pitch enlarging chip 6 is composed of the pad 2 of the chip 1 to be inspected on the semiconductor chip.
The inspection pads 3 provided in the same arrangement as the above-mentioned arrangement and the pads 4 provided on the outer peripheral portion of the inspection pads 3 at a pitch larger than that of the inspection pads 3 are connected by the wiring 5 in the chip. The fine pins 7 are formed on the inspection pad 3 of the chip 6 as a probe and are vertically attached to the substrate by brazing or the like. The inspection pads 3 in the pitch enlarging chip 6 have the same pitch as the pads 2 of the inspected chip 1, and the pads 4 have a wider pitch than that.
The chip 6 can be easily manufactured by using the processing technique.

【0009】次に、微細ピン7をプローブとして基板に
垂直に取り付けたチップ6をプローブカード基板8に貼
り付けて固定し、このプローブカード基板8に設けた金
属電極9とチップ6上の外側のパッド4との間をワイヤ
10でボンディングする事によって接続する。また、プ
ローブカード基板8の内層に配線11を設け金属電極9
とプローブカード基板8の反対面の金属電極12とを接
続し、この金属電極12に検査装置等を接続させる構造
とする。
Next, the chip 6 in which the fine pins 7 are vertically attached to the substrate as a probe is attached and fixed to the probe card substrate 8, and the metal electrode 9 provided on the probe card substrate 8 and the outside of the chip 6 are provided. The pad 4 is connected by bonding with a wire 10. In addition, the wiring 11 is provided on the inner layer of the probe card substrate 8 and the metal electrode 9
And the metal electrode 12 on the opposite surface of the probe card substrate 8 are connected to each other, and an inspection device or the like is connected to the metal electrode 12.

【0010】図3は本発明の第2の実施例の断面図であ
る。被検査チップ1のパッド2の配列と同配列に、プロ
ーブの固定ブロック14に微細ピンのプローブ7を固定
し、このブロック14を、固定用の部材15を用いて第
1の実施例にて説明したプローブカード基板8に取り付
ける事により、プローブ7とピッチ拡大用検査装置等と
の電気的な導通を行う。本実施例によれば、プローブ7
の取り付け精度が向上し、またプローブ7とチップ6の
検査用パッド3との接続が極めて容易に行える。
FIG. 3 is a sectional view of the second embodiment of the present invention. The probe 7 of the fine pin is fixed to the fixed block 14 of the probe in the same arrangement as the arrangement of the pads 2 of the chip 1 to be inspected, and this block 14 is described in the first embodiment using the fixing member 15. By mounting the probe card substrate 8 on the probe 7, the probe 7 and the pitch enlargement inspection device are electrically connected. According to this embodiment, the probe 7
The mounting accuracy of the probe is improved, and the probe 7 and the inspection pad 3 of the chip 6 can be connected very easily.

【0011】[0011]

【発明の効果】以上説明したように本発明は、プローブ
カード基板に被検査チップのパッド配置と同一のパッド
配置を有し、被検査チップと同一の技術にて製造するピ
ッチ拡大用の半導体チップを取り付け、そのチップのパ
ッド上に垂直にプローブを取り付ける構造としたので、
微細ピッチでプローブを配置したプローブカードを容易
かつ安価に作成する事が出来るという効果を有する。
As described above, according to the present invention, a semiconductor chip for pitch expansion, which has the same pad arrangement as that of the chip to be inspected on the probe card substrate and is manufactured by the same technique as the chip to be inspected. , And the structure to mount the probe vertically on the pad of the chip,
This has an effect that a probe card in which probes are arranged at a fine pitch can be easily and inexpensively produced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例の断面図である。FIG. 1 is a sectional view of a first embodiment of the present invention.

【図2】第1の実施例の底面図である。FIG. 2 is a bottom view of the first embodiment.

【図3】本発明の第2の実施例の断面図である。FIG. 3 is a sectional view of a second embodiment of the present invention.

【図4】従来のプローブカードの断面図である。FIG. 4 is a cross-sectional view of a conventional probe card.

【符号の説明】[Explanation of symbols]

1 被検査チップ 2 被検査チップのパッド 3 ピッチ拡大用チップ内の被検査チップのパッドと
同一配置の検査用パッド 4 ピッチ拡大用チップ内の広ピッチパッド 5 ピッチ拡大用チップ内の配線 6 ピッチ拡大用半導体チップ 7 微細ピンのプローブ 8 プローブカード基板 9 プローブカード基板の金属電極 10 ボンディング用ワイヤ 11 プローブカード基板内配線 12 検査装置接続用金属電極 13 プローバステージ 14 プローバ固定ブロック 15 プローブブロック固定用部材
1 chip to be inspected 2 pad to be inspected 3 pad to be inspected in the same chip as the pad to be inspected in the chip for pitch expansion 4 wide pitch pad in the chip for pitch expansion 5 wiring in the chip for pitch expansion 6 pitch expansion Semiconductor chip 7 Probes with fine pins 8 Probe card substrate 9 Metal electrodes on probe card substrate 10 Bonding wires 11 Probe card substrate wiring 12 Metal electrodes for connecting inspection equipment 13 Prober stage 14 Prober fixing block 15 Probe block fixing member

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 ウェハ状態で電気検査を行うプローバ装
置に取り付けるプローブカードにおいて、前記プローブ
カードを構成するプローブカード基板に被検査チップの
パッド配列と同配列を成す検査用パッドを設けた半導体
チップを固定させ、この半導体チップと被検査チップと
をプローブを介して導通させることにより電気検査を行
うことを特徴とするプローブカード。
1. A probe card to be attached to a prober device for performing an electrical inspection in a wafer state, wherein a semiconductor chip is provided on a probe card substrate forming the probe card, with inspection pads having the same arrangement as the pad arrangement of the chips to be inspected. A probe card which is fixed and conducts electrical inspection by electrically connecting the semiconductor chip and the chip to be inspected via a probe.
【請求項2】 前記プローブカード基板側に取り付けら
れた半導体チップの検査用パッドが、この半導体チップ
内の配線を介して半導体チップ外周に設けたピッチの広
いパッドに接続され、このピッチの広いパッドとプロー
ブカード基板の電極とがワイヤボンディングによって接
続される事を特徴とする請求項1記載のプローブカー
ド。
2. The inspection pad of the semiconductor chip attached to the probe card substrate side is connected to a wide-pitch pad provided on the outer periphery of the semiconductor chip via a wiring in the semiconductor chip, and the wide-pitch pad The probe card according to claim 1, wherein the electrode and the electrode of the probe card substrate are connected by wire bonding.
【請求項3】 前記プローブカード基板側に取り付けら
れた半導体チップの検査用パッドにプローブを垂直に固
定し、被検査チップのパッドと電気的に導通させること
を特徴とする請求項1,2記載のプローブカード。
3. The probe according to claim 1, wherein the probe is vertically fixed to an inspection pad of a semiconductor chip attached to the probe card substrate side, and electrically connected to the pad of the chip to be inspected. Probe card.
【請求項4】 被検査チップのパッド配列と同配列を成
す様にプローブを配列し固定したブロックを設け、この
ブロックをブロックに配列したプローブと半導体チップ
上の検査用パッドとをそれぞれ接触させてプローブカー
ド基板に固定し、被検査チップのパッドとプローブとを
電気的に導通させることを特徴とする請求項1記載のプ
ローブカード。
4. A block in which probes are arranged and fixed so as to form the same arrangement as the pad arrangement of the chip to be inspected is provided, and the probes in which the blocks are arranged in blocks and the inspection pads on the semiconductor chip are brought into contact with each other. The probe card according to claim 1, wherein the probe card is fixed to the probe card substrate to electrically connect the pad of the chip to be inspected and the probe.
JP4003513A 1992-01-13 1992-01-13 Probe card Withdrawn JPH05211215A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4003513A JPH05211215A (en) 1992-01-13 1992-01-13 Probe card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4003513A JPH05211215A (en) 1992-01-13 1992-01-13 Probe card

Publications (1)

Publication Number Publication Date
JPH05211215A true JPH05211215A (en) 1993-08-20

Family

ID=11559444

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4003513A Withdrawn JPH05211215A (en) 1992-01-13 1992-01-13 Probe card

Country Status (1)

Country Link
JP (1) JPH05211215A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018221234A1 (en) * 2017-05-30 2018-12-06 株式会社日本マイクロニクス Electrical connection apparatus

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018221234A1 (en) * 2017-05-30 2018-12-06 株式会社日本マイクロニクス Electrical connection apparatus
JP2018200289A (en) * 2017-05-30 2018-12-20 株式会社日本マイクロニクス Electric connection device
CN110678759A (en) * 2017-05-30 2020-01-10 日本麦可罗尼克斯股份有限公司 Electrical connection device
TWI687693B (en) * 2017-05-30 2020-03-11 日商日本麥克隆尼股份有限公司 Electrical connection device
US11150268B2 (en) 2017-05-30 2021-10-19 Kabushiki Kaisha Nihon Micronics Electric connection device

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Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19990408