JPH10135283A - Inspection jig for semiconductor device - Google Patents
Inspection jig for semiconductor deviceInfo
- Publication number
- JPH10135283A JPH10135283A JP8289401A JP28940196A JPH10135283A JP H10135283 A JPH10135283 A JP H10135283A JP 8289401 A JP8289401 A JP 8289401A JP 28940196 A JP28940196 A JP 28940196A JP H10135283 A JPH10135283 A JP H10135283A
- Authority
- JP
- Japan
- Prior art keywords
- probe
- printed wiring
- multilayer printed
- wiring board
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Measuring Leads Or Probes (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体装置の検査
用治具に関する。The present invention relates to a jig for testing a semiconductor device.
【０００２】[0002]
【従来の技術】通常、大規模集積回路等、半導体の製造
工程中ウェーハの状態で、半導体の電極パットにプロー
ブを接触させて検査装置との接続を行い、各回路の動作
をチェックするプローブテストと呼ばれる中間検査を行
っており、このプローブテストには、半導体と検査装置
とのインターフェイスを、プローブカードと呼ばれる半
導体装置の検査用治具を用いている。2. Description of the Related Art Usually, a probe test is performed in which a probe is brought into contact with an electrode pad of a semiconductor in the state of a wafer during the manufacturing process of a semiconductor such as a large-scale integrated circuit to make a connection with an inspection device and check the operation of each circuit. In this probe test, an interface between the semiconductor and the inspection device is used, and a jig for inspection of the semiconductor device called a probe card is used for the probe test.
【０００３】この治具は、図３に示すように、多層プリ
ント配線板２の中央に半導体との接続を確認するための
スペースが取られ、そのスペースに突出するように多層
プリント配線板２の内周側にプローブ１を固定し、反対
面の外周部に検査装置と接続するための端子を形成し、
プローブ１と端子とを多層プリント配線板２に形成した
回路導体とスルーホール７によって接続している。In this jig, as shown in FIG. 3, a space for confirming connection with a semiconductor is provided at the center of the multilayer printed wiring board 2, and the jig of the multilayer printed wiring board 2 is protruded into the space. The probe 1 is fixed on the inner peripheral side, and a terminal for connecting to the inspection device is formed on the outer peripheral part on the opposite surface,
The probe 1 and the terminal are connected to a circuit conductor formed on the multilayer printed wiring board 2 by a through hole 7.
【０００４】プローブ１は、その末端部をプローブ支持
手段３により多層プリント配線板２の内周部に固定し、
半導体と接触する先端部を多層プリント配線板２の中央
部で空中に浮かせた、いわゆる片持ち梁（カンチレバ
ー）式になっている。検査のときには、プローブ１をウ
ェハに接触させた状態で治具を押し付け、プローブ１を
たわませることにより弾性力を生じさせ、半導体９の電
極パッドとプローブ１との接触強度を確保する。そし
て、その力は多層プリント配線板２のプローブ固定部４
に加わる。多層プリント配線板２は、固定部４より外周
側で検査装置に固定されているのでたわむ。The probe 1 has its distal end fixed to the inner peripheral portion of the multilayer printed wiring board 2 by the probe support means 3,
It is of a so-called cantilever type in which a tip portion in contact with the semiconductor is floated in the air at the center of the multilayer printed wiring board 2. At the time of inspection, the jig is pressed while the probe 1 is in contact with the wafer, and the probe 1 is bent to generate an elastic force, thereby ensuring the contact strength between the electrode pad of the semiconductor 9 and the probe 1. The force is applied to the probe fixing portion 4 of the multilayer printed wiring board 2.
Join. The multilayer printed wiring board 2 bends because it is fixed to the inspection device on the outer peripheral side from the fixing portion 4.
【０００５】ところで、半導体の回路集積数の増大化並
びに一括検査の増大化といった近年の傾向に伴い、プロ
ーブ数が従来の２〜４倍となる治具が求められ、単純に
プローブ数を増やした治具の他、種々の構造が考案され
ている。例えば、特公平７−１２３１３２号公報に開示
されている治具は、プローブを多層プリント配線板に対
して垂直に設け、プローブと半導体との接触強度は、前
記の構造と同様にプローブをたわませることで確保し
た。また、特開平５−２１５７７５号に開示されている
方法は、プローブの代替としてバンプ付きフレキシブル
フィルムを用いている。半導体との接触強度は、多層プ
リント配線板に取り付た弾性を持つ加圧具で、バンプを
押さえ付けることで確保している。[0005] With the recent trend of an increase in the number of integrated circuits in a semiconductor and an increase in the number of batch inspections, a jig in which the number of probes is two to four times larger than in the past is required, and the number of probes is simply increased. Various structures other than jigs have been devised. For example, in a jig disclosed in Japanese Patent Publication No. Hei 7-123132, a probe is provided perpendicularly to a multilayer printed wiring board, and the contact strength between the probe and the semiconductor is determined by bending the probe similarly to the above-described structure. We secured by doing. The method disclosed in Japanese Patent Application Laid-Open No. 5-215775 uses a flexible film with bumps instead of a probe. The contact strength with the semiconductor is ensured by pressing the bumps with an elastic pressing tool attached to the multilayer printed wiring board.
【０００６】[0006]
【発明が解決しようとする課題】しかし、いずれの構造
も、多層プリント配線板のたわみは避けられず、そのた
わみによって検査の精度が低下するという課題がある。However, any structure has a problem that the bending of the multilayer printed wiring board is unavoidable, and the bending lowers the inspection accuracy.
【０００７】本発明は、多層プリント配線板のたわみの
抑制に優れ、精度に優れた検査の方法を提供することを
目的とする。An object of the present invention is to provide an inspection method which is excellent in suppressing deflection of a multilayer printed wiring board and which is excellent in accuracy.
【０００８】[0008]
【課題を解決するための手段】本発明の半導体装置の検
査用治具は、半導体装置の電極パットと接触するプロー
ブと、そのプローブを支持するプローブ支持手段と、多
層プリント配線板とからなり、前記多層プリント配線板
に、前記プローブ支持手段を固定し、検査装置に接続す
る端子を設け、かつ前記プローブと検査装置に接続する
端子とを電気的に接続する配線導体を備えた、半導体装
置の検査用治具であって、その多層プリント配線板の、
前記プローブ支持手段の固定位置と前記検査装置の固定
位置との間の領域に存在するスルーホールの開口面積の
総和を、前記多層プリント配線板の前記領域の面積の０
〜２．００％とすることを特徴とする。SUMMARY OF THE INVENTION A jig for testing a semiconductor device according to the present invention comprises a probe which contacts an electrode pad of the semiconductor device, probe support means for supporting the probe, and a multilayer printed wiring board. The multilayer printed wiring board, wherein the probe support means is fixed, a terminal connected to an inspection device is provided, and a wiring conductor for electrically connecting the probe and a terminal connected to the inspection device is provided. An inspection jig for the multilayer printed wiring board,
The sum of the opening areas of the through holes existing in the area between the fixed position of the probe support means and the fixed position of the inspection device is calculated as 0 to the area of the area of the multilayer printed wiring board.
~ 2.00%.
【０００９】このプローブに代えて、バンプ付フレキシ
ブルフィルムを使用することもできる。In place of this probe, a flexible film with bumps can be used.
【００１０】本発明者らは、鋭意検討の結果、多層プリ
ント配線板のスルーホールの存在が基板の縦弾性係数に
与える影響の大きいことが判明した。例えば、板厚４．
８mm、布線層４層、電源・グランド層１０層のマルチワ
イヤ配線板（日立化成工業株式会社製、商品名）を用い
た治具用多層プリント配線板の縦弾性係数とスルーホー
ルの分布密度との関係は、図４に示すように、縦軸にｅ
（縦弾性係数実測の実測値／層構成から求めた縦弾性係
数の計算値）、横軸にβ（穴の全開口面積／試料の面
積）を取ると、ｅとβとの間には負の相関があるという
知見が得られた。また、βが２％より大きくなるとｅは
極端に小さくなり、理論値の８割以下となってしまうこ
とが分かり、この現象は、他の基板についても同様の傾
向が現れた。The present inventors have conducted intensive studies and found that the presence of through holes in a multilayer printed wiring board has a large effect on the longitudinal elastic modulus of the substrate. For example, plate thickness 4.
Longitudinal modulus of elasticity and through-hole distribution density of multi-layer printed wiring boards for jigs using multi-wire wiring boards (product name: Hitachi Chemical Co., Ltd.) with 8 mm, 4 wiring layers, and 10 power / ground layers As shown in FIG. 4, the vertical axis indicates e
(Measured value of longitudinal elastic modulus actual measurement / calculated value of longitudinal elastic modulus obtained from layer configuration) and β (total opening area of hole / area of sample) on the horizontal axis, a negative value exists between e and β. Was found to be correlated. When β is larger than 2%, the value of e becomes extremely small, and is less than 80% of the theoretical value. This phenomenon also appears in other substrates.
【００１１】ところで、スルーホールは、基板にとって
不可欠のものであって、プローブ数が増えると、基板に
形成する回路数が増え、即ち、穴数が増え、縦弾性係数
が小さくなり、たわみが大きくなるのである。そこで、
本発明においては、多層プリント配線板の、前記プロー
ブ支持手段の固定位置と前記検査装置の固定位置との間
の領域に存在するスルーホールの開口面積の総和を、前
記多層プリント配線板の面積の０〜２．００％とした。
即ち、多層プリント配線板の、必要なスルーホールは、
プローブ支持手段の固定位置と前記検査装置の固定位置
との間の領域以外の箇所に寄せるのである。By the way, through holes are indispensable to the substrate. As the number of probes increases, the number of circuits formed on the substrate increases, that is, the number of holes increases, the longitudinal elastic modulus decreases, and the deflection increases. It becomes. Therefore,
In the present invention, the sum of the opening areas of the through holes existing in the region between the fixed position of the probe support means and the fixed position of the inspection device of the multilayer printed wiring board is calculated as the area of the multilayer printed wiring board. 0 to 2.00%.
That is, the necessary through holes of the multilayer printed wiring board are
This is because the probe is brought to a location other than the area between the fixed position of the probe support means and the fixed position of the inspection device.
【００１２】[0012]
【発明の実施の形態】本発明の実施の形態を、以下に具
体的に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments of the present invention will be specifically described below.
【００１３】[0013]
実施例１ 本発明に係わる治具の実施例を図１に示す。プローブ１
には、タングステン銅製のピンを採用した。プローブ１
はフッ素樹脂製のプローブ支持手段３でお互いが平行に
なるよう格子上に約１０００ピン並べた。多層プリント
配線板２には、布線層４層、電源・グランド層１０層、
板厚４．８mm、外径２５０mmのマルチワイヤ配線板（日
立化成工業株式会社製、商品名）を用いた。多層プリン
ト配線板２上のプローブ１を固定するプローブ支持手段
３の固定箇所４は、基板中心を原点とした直径１５０mm
の円周上に設け、多層プリント配線板２上の検査装置の
治具ホルダ１１への固定箇所５には、直径２００mmの円
周上に穴を設けた。プローブ１の末端と多層プリント配
線板２はコネクタで電気的に接続した。プローブ１と多
層プリント配線板２の布線及び電源・グランド層の各内
層回路（図示せず）とを接続するためのスルーホール７
は、直径１５０mm未満の領域１２に設けた。検査装置が
具備する接続ピン１０と多層プリント配線板２の内層回
路とを接続するための端子１８は、直径２００ｍｍ以上
の領域１３にスルーホールとして形成した。その結果、
プローブ１の固定箇所４、検査装置への固定箇所５間の
領域６には、リレーやキャパシタといった部品用穴が僅
かに存在するのみとなり、領域６の面積π×｛（２００
／２）2−（１５０／２）2｝に対するスルーホールを含
む穴の全開口面積の割合は１．０％となった。Embodiment 1 FIG. 1 shows an embodiment of a jig according to the present invention. Probe 1
Used a pin made of tungsten copper. Probe 1
Approximately 1000 pins were arranged on a grid by probe support means 3 made of fluororesin so as to be parallel to each other. The multilayer printed wiring board 2 has four wiring layers, ten power supply / ground layers,
A multi-wire wiring board (trade name, manufactured by Hitachi Chemical Co., Ltd.) having a thickness of 4.8 mm and an outer diameter of 250 mm was used. The fixing portion 4 of the probe supporting means 3 for fixing the probe 1 on the multilayer printed wiring board 2 has a diameter of 150 mm with the origin at the center of the substrate.
A hole is provided on the circumference of a circle having a diameter of 200 mm at the fixing point 5 of the inspection device on the jig holder 11 on the multilayer printed wiring board 2. The end of the probe 1 and the multilayer printed wiring board 2 were electrically connected by a connector. Through holes 7 for connecting the probe 1 to the wiring of the multilayer printed wiring board 2 and the respective inner layer circuits (not shown) of the power supply and ground layers.
Was provided in the region 12 having a diameter of less than 150 mm. Terminals 18 for connecting the connection pins 10 included in the inspection device and the inner layer circuit of the multilayer printed wiring board 2 were formed as through holes in the region 13 having a diameter of 200 mm or more. as a result,
In the area 6 between the fixing point 4 of the probe 1 and the fixing point 5 to the inspection device, there are only a few holes for components such as relays and capacitors, and the area π × ｛(200
The ratio of the total opening area of the holes including the through holes to (/ 2) 2- (150/2) 2 ｝ was 1.0%.
【００１４】実施例２ 実施例１におけるプローブ１に代えて、バンプ付きフレ
キシブルフィルム１０１を採用した。ベースフィルムは
ポリイミド樹脂、検体と接触するバンプ、多層プリント
配線板２との接続パッド及び該バンプと該多層プリント
配線板２とを接続する導体回路は銅のめっき及びフォト
リソグラフィーにより形成した。バンプ数は約５００で
ある。バンプ付きフレキシブルフィルム１０１はその背
面から弾性を有する加圧支持手段１０３により支持固定
した。多層プリント配線板２には、マルチワイヤ配線板
（日立化成工業株式会社製、商品名）を用い、外径、層
構成、固定箇所４、固定箇所５、スルーホール７及び穴
８の配置領域は実施例１と同様とした。その結果、実施
例１と同様に、固定箇所４、５間の領域６には、リレー
やキャパシタといった部品用穴が僅かに存在するのみと
なった。領域６の面積に対するスルーホールを含む穴の
全開口面積の割合は０．７％となった。Example 2 A flexible film 101 with bumps was used instead of the probe 1 in Example 1. The base film was made of a polyimide resin, the bumps to be brought into contact with the sample, the connection pads for connecting to the multilayer printed wiring board 2, and the conductor circuits for connecting the bumps and the multilayer printed wiring board 2 were formed by copper plating and photolithography. The number of bumps is about 500. The flexible film with bumps 101 was supported and fixed from the back by pressure supporting means 103 having elasticity. The multi-layer printed wiring board 2 uses a multi-wire wiring board (trade name, manufactured by Hitachi Chemical Co., Ltd.), and the outer diameter, the layer configuration, the fixing locations 4, the fixing locations 5, the through holes 7 and the holes 8 are arranged in the following regions. Same as Example 1. As a result, similarly to the first embodiment, only a small number of holes for components such as relays and capacitors exist in the area 6 between the fixing points 4 and 5. The ratio of the total opening area of the hole including the through hole to the area of the region 6 was 0.7%.
【００１５】[0015]
【発明の効果】以上に説明したように、本発明により、
多層プリント配線板のたわみの抑制に優れ、精度に優れ
た検査の方法を提供することことができる。As described above, according to the present invention,
It is possible to provide an inspection method that is excellent in suppressing the deflection of the multilayer printed wiring board and is excellent in accuracy.
【図１】本発明の一実施例の一部を示す断面図である。FIG. 1 is a sectional view showing a part of an embodiment of the present invention.
【図２】本発明の他の実施例の一部を示す断面図であ
る。FIG. 2 is a sectional view showing a part of another embodiment of the present invention.
【図３】従来例の一部を示す断面図である。FIG. 3 is a sectional view showing a part of a conventional example.
【図４】本発明の原理を説明するための線図である。FIG. 4 is a diagram for explaining the principle of the present invention.
１．プローブ ２．多層プリント
板 ３．プローブ支持手段 ４．固定位置 ５．固定位置 ６．固定位置４と
５の間の領域 ７．スルーホール ８．端子 ９．半導体装置 １０．接続ピン １１．治具ホルダ1. Probe 2. 2. Multilayer printed board 3. Probe support means Fixed position Fixed position 6. 6. Area between fixed positions 4 and 5 7. Through hole Terminal 9. Semiconductor device 10. Connection pin 11. Jig holder
Claims (2)
ブ１と、そのプローブ１を支持するプローブ支持手段３
と、多層プリント配線板２とからなり、前記多層プリン
ト配線板２に、前記プローブ支持手段３を固定し、検査
装置に接続する端子と、前記プローブ１と検査装置に接
続する端子とを電気的に接続する配線導体を備えた、半
導体装置の検査用治具であって、その多層プリント配線
板２の、前記プローブ支持手段３の固定位置と前記検査
装置の固定位置との間の領域に存在するスルーホールの
開口面積の総和を、前記多層プリント配線板２の前記領
域の面積の０〜２．００％とすることを特徴とする半導
体装置の検査用治具。1. A probe 1 which comes into contact with an electrode pad of a semiconductor device, and a probe supporting means 3 which supports the probe 1.
And a multilayer printed wiring board 2. The probe supporting means 3 is fixed to the multilayer printed wiring board 2, and a terminal connected to an inspection device and a terminal connected to the probe 1 and the inspection device are electrically connected. A jig for inspecting a semiconductor device, comprising a wiring conductor connected to the semiconductor device, wherein the jig exists in a region between a fixed position of the probe support means 3 and a fixed position of the inspection device on the multilayer printed wiring board 2. A jig for testing a semiconductor device, wherein a total sum of opening areas of through holes to be formed is 0 to 2.00% of an area of the region of the multilayer printed wiring board 2.
付フレキシブルフィルム１０１と、そのバンプ付フレキ
シブルフィルム１０１を加圧支持する加圧支持手段１０
３と、多層プリント配線板２とからなり、前記多層プリ
ント配線板２に、前記加圧支持手段１０３を固定し、検
査装置に接続する端子と、前記バンプ付フレキシブルフ
ィルム１０１と検査装置に接続する端子とを電気的に接
続する配線導体を備えた、半導体装置の検査用治具であ
って、その多層プリント配線板２の、前記加圧支持手段
１０３の固定位置と前記検査装置の固定位置との間の領
域に存在するスルーホールの開口面積の総和を、前記多
層プリント配線板２の前記領域の面積の０〜２．００％
とすることを特徴とする半導体装置の検査用治具。2. A flexible film 101 with a bump which comes into contact with an electrode pad of a semiconductor device, and a pressure supporting means 10 for pressurizing and supporting the flexible film 101 with a bump.
3 and the multilayer printed wiring board 2. The pressure supporting means 103 is fixed to the multilayer printed wiring board 2, and a terminal to be connected to an inspection device, and a terminal to be connected to the flexible film with bumps 101 and the inspection device. What is claimed is: 1. A jig for inspecting a semiconductor device, comprising: a wiring conductor for electrically connecting a terminal, wherein a fixing position of said pressurizing support means 103 and a fixing position of said inspection device of said multilayer printed wiring board 2 Of the area of the through-holes existing in the area between 0 and 2.00% of the area of the area of the multilayer printed wiring board 2
An inspection jig for a semiconductor device, characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8289401A JPH10135283A (en) | 1996-10-31 | 1996-10-31 | Inspection jig for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8289401A JPH10135283A (en) | 1996-10-31 | 1996-10-31 | Inspection jig for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10135283A true JPH10135283A (en) | 1998-05-22 |
Family
ID=17742761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8289401A Pending JPH10135283A (en) | 1996-10-31 | 1996-10-31 | Inspection jig for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10135283A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002528904A (en) * | 1998-10-23 | 2002-09-03 | テラダイン・インコーポレーテッド | High density printed circuit board |
| CN102548249A (en) * | 2010-12-13 | 2012-07-04 | 富葵精密组件(深圳)有限公司 | Manufacturing method of circuit boards |
-
1996
- 1996-10-31 JP JP8289401A patent/JPH10135283A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002528904A (en) * | 1998-10-23 | 2002-09-03 | テラダイン・インコーポレーテッド | High density printed circuit board |
| CN102548249A (en) * | 2010-12-13 | 2012-07-04 | 富葵精密组件(深圳)有限公司 | Manufacturing method of circuit boards |
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