JP2001118994A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the fitting a accuracy of a probe and the hit of the probe to an electrode when a probe inspection device is generated and to perform a stable total inspection of chips on a wafer, when electrical inspection of the semiconductor chips with metal bump electrodes for liquid crystal driver and electrode pitches are made to be fine. SOLUTION: Aluminum pad electrodes for electric inspection 8, which are connected to metal bump electrodes 1a on a silicon chip 2, are installed. By not forming metal bumps in inspection electrodes but inspecting in aluminum pad state, inspection can be executed, without having to develop new facilities. Since the aluminum pad electrodes 8 are arranged on the silicon chip 2 at positions which are not related to junctions with a tape carrier, they can be arranged on the chip at rough pitches with respect to the metal bump electrodes 1a and accordingly stable inspection can be executed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip design such as an electrode pad of a semiconductor chip of a semiconductor device and a layout of the pads, and a probing check for inspecting electrical characteristics of the semiconductor chip is more stably performed by this technique. Technology. The semiconductor device of the present invention particularly relates to a multi-output semiconductor chip used for a liquid crystal driver, and includes a TCP (Tape C).
The present invention is applied to a semiconductor device packaged in an (arrier package) form.

[0002]

2. Description of the Related Art In recent years, the number of external output terminals of a package accommodating a semiconductor chip has rapidly increased with the advancement of functions and integration of a semiconductor device in the semiconductor chip. In a semiconductor package manufactured using a tape carrier, an electrode pitch formed on a semiconductor chip is 45
[Μm] or less, and the number of external terminals connected to these electrodes via leads or the like has been increased to more than 520 pins. Therefore, it is indispensable to suppress the electrode pitch on the semiconductor chip to be narrow in the future.

First, a semiconductor chip of a conventional semiconductor device will be described.

FIG. 7 is a plan view showing a semiconductor chip of a conventional semiconductor device. In FIG. 7, 1a, 1b, 1c
Is a gold bump electrode formed on an electrode of the semiconductor chip, 2 is a silicon chip which is a base material of the semiconductor chip, and 3 is an active element formed on the semiconductor chip.

The gold bump electrodes 1a, 1b and 1c are formed by subjecting an aluminum pad electrode on the semiconductor chip to gold plating after a semiconductor chip diffusion process step.

FIG. 8 shows an example of BB1 shown in FIG.
It is sectional drawing of the gold bump electrode part of a location. In FIG.
1a is a gold bump electrode, 4 is an aluminum pad electrode formed on silicon, 5 is a protective film of a semiconductor element, and Pl-
It is made of SiN, and the periphery of the aluminum pad electrode 4 is covered with this protective film. Reference numeral 6 denotes a barrier metal formed on the surface of the aluminum pad electrode 4 to form the gold bump electrode 1a. 7 is a probe needle.

At the time of the electrical characteristic inspection, the electrical inspection is performed by applying a probe needle 7 to the gold bump electrode 1a.

Hereinafter, a conventional TAB (Tape Auto) which is one technique for mounting a conventional semiconductor chip.
A description will be given of a mated bonding method.

First, an assembly flow of a general TAB method will be described. After the active elements of the semiconductor chip are formed by a diffusion process, bump electrodes are formed on necessary electrode pads by an electrolytic plating method. Thereafter, in order to check the electrical characteristics of the semiconductor chip, a probe needle is applied to the electrode pad to perform an electrical test. Here, the semiconductor chip determined to be non-defective is replaced with the next ILB (Inner Lead Bondin).
In step g), the inner leads of the tape carrier are bonded to the electrode bumps of the semiconductor chip. After that, after resin sealing, resin curing, marking, final electrical inspection and appearance inspection, T
Complete the CP (Tape Carrier Package).

Here, the electrical inspection of the semiconductor chip is performed after the bump process. This is for the purpose of judging the quality of defects and defects due to the formation of bumps, and for the purpose of inspecting electrode pads with a probe needle in the absence of bumps, the pad surface will be damaged, and the bump surface after bump electrode formation will be extremely poor. This is because there is a possibility that irregularities will occur during the next step, and a problem will occur in the joining by ILB in the next step.

Next, the formation of gold bump electrodes will be briefly described first along the assembly flow. First, after a barrier metal is deposited on the entire chip surface, a photosensitive resist is applied to the chip surface.
After exposing the electrode size on the aluminum pad electrode using a gold bump mask, unnecessary resist is removed. Here, gold plating is applied to form bump electrodes. Finally, the masked resist is removed and unnecessary portions of the barrier metal are removed to complete the gold bump electrode.

Next, after the formation of the bump electrode, the bump electrode and the tape carrier are joined. The tape carrier is formed by laminating a copper foil on a polyimide substrate and etching the copper foil to form a pattern. Next, the pattern-formed inner lead and the bump electrode are bonded by thermocompression bonding, and then resin-sealed to complete TCP.

In the prior art, the bump surface condition after the formation of the gold bump electrode is very uneven. As one of the causes, condition factors such as the type of the gold plating solution, the current density at the time of electrolytic plating, the temperature of the plating solution, and the time in forming the bump affect the quality of the bump surface.
Further, since the pad peripheral portion of the aluminum pad electrode is covered with the protective film, the step corresponding to the thickness of the aluminum pad and the step of the protective film are enlarged and transferred to the surface when the gold bump is formed. The bump surface has a concave shape due to this step.

Prior to bonding a tape carrier, a conventional semiconductor chip is subjected to an electrical test by applying a probe needle to a gold bump electrode. As described above, when the collective probe test is performed due to the concave shape of the gold bump electrode surface, the contact between a part of the gold bump electrode and the probe needle becomes unstable, and a failure is determined by an electrical test failure due to a contact failure. Further, at the time of probe inspection, foreign matter or gold dust on the gold bump electrode adheres to the tip of the probe needle, thereby deteriorating the inspection performance. Therefore, the probe tip is polished at a certain frequency to improve the inspection property.

Conventionally, in order to avoid contact failure,
You can set a large amount of pressure (pressure) of the probe needle,
Attach the probe into the center pad electrode and the end electrode of the semiconductor chip so that the angle of entry of the probe when hitting the gold bump is as uniform as possible. Such a probe needle unit has been created. Also consider the bump plating solution and bump formation conditions, design the process so that the surface of the gold bump electrode is flat, and strengthen the cleaning process after removing the resist to avoid the adhesion of foreign matter on the bump surface, etc. I was going.

[0016]

However, recently, due to the high-density mounting and the increase in the number of pins, the pitch of the bump electrodes for inspecting the electrical characteristics of the semiconductor chip has been reduced (40).
([Μm] level), it is difficult to simultaneously satisfy the requirements of reducing the pitch of the bump electrodes and increasing the width of the bump line due to the limitations of the resolution and processing accuracy of photolithography. That is, if an attempt is made to form a bump electrode having a wide line width at a small interval and to form an electrode capable of performing a stable inspection, it is very difficult to form a pattern of the bump electrode.

On the other hand, a probe unit for performing an electrical characteristic test must also be made in accordance with the electrode pitch, so that the mounting tolerance of the probe needle becomes extremely small, and a highly reliable probe is required unless extremely high mounting accuracy is secured. Unit cannot be formed. In order to realize such a high mounting accuracy, it is necessary to develop a new inspection device different from the existing processing device, which causes a problem of increasing equipment costs.

The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide a semiconductor device capable of performing a highly reliable inspection of electrical characteristics of an electrode bump having a reduced pitch. It is in.

[0019]

In order to solve the above-mentioned conventional problems, a semiconductor device according to the present invention has the following configuration. That is, the semiconductor device includes a semiconductor chip having a built-in semiconductor element, a plurality of pad electrodes provided on the upper surface of the semiconductor chip, and an inspection electrode pad electrically connected to each of the plurality of pad electrodes.

As described above, the inspection electrode pad is an electrode provided for performing a probe inspection, and the surface condition of the pad compared to the case where a probe needle is applied to a gold bump electrode to perform an electrical characteristic inspection of a semiconductor device. Is very flat and the contact property of the probe needle is remarkably improved.

Further, since the inspection electrode pads can be freely arranged as long as they can be wired to the gold bump electrodes, a plurality of aluminum pad electrodes are arranged in a staggered manner by arranging aluminum wiring on the semiconductor chip from a plurality of adjacent gold bump electrodes. For example, the pad pitch can be coarsened. As a result, by performing probe inspection on the electrode having a coarser pitch than the pad pitch of the gold bump electrode, more stable electrical inspection contact properties can be ensured, and since the pitch of the probe unit is coarse, mounting of the probe needle is made. Can be facilitated. Therefore, the reliability of the electrical inspection is improved, and the semiconductor device is easily formed.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.

First, a semiconductor device according to the first embodiment will be described. FIG. 1 is a plan view showing a layout of gold bump electrodes and aluminum pad electrodes on a semiconductor chip according to the first embodiment of the present invention. FIG. 2 is an enlarged plan view showing the wiring between the gold bump electrode and the aluminum pad electrode on the semiconductor chip. FIG. 3 is a cross-sectional view of the gold bump electrode and the aluminum pad electrode on the semiconductor chip taken along the line AA1 in FIG. 4 and 5 are sectional views of a process flow showing the formation of the gold bump electrode in the state of FIG. 3 of the cross section of the gold bump electrode and the aluminum pad electrode on the semiconductor chip.

First, as shown in FIG. 1, an aluminum pad electrode 8 is provided so as to be connected to a gold bump electrode portion 1a having a narrow pitch among gold bump electrodes. The aluminum pad electrode 8 was arranged on the active element region 3 on the silicon chip 2 to expose the aluminum pad without forming a gold bump and to keep the chip size small. The pad pitch of the gold bump electrodes 1a is arranged at 40 [μm]. On the silicon chip 2, there are additionally provided gold bump electrodes 1b uniformly arranged at a pitch of 200 [μm], and on the short side of the silicon chip 2. Gold bump electrodes 1 arranged on both sides at a pitch of 70 [μm]
c. These are similarly arranged on the active element region 3. All of these gold pad electrodes are about 600 pads in total, and the size of the silicon chip 2 is about 20.0 [mm] × 2.0 [mm].

Next, as shown in the enlarged view of FIG. 2, the aluminum pad electrodes 8 are alternately arranged from the gold bump electrodes 1a to the adjacent electrode pads in a staggered arrangement, and a pitch of two bumps can be secured. 80 [μm]. This is an example. If the pad pitch of the gold bump electrode 1a is further narrower, the aluminum pad electrodes 8 are arranged in three stages (three rows).
With a staggered arrangement, the pad pitch can be further increased. The size of the gold bump electrode 1a and the aluminum pad electrode 8 in FIG. 2 is 30 [μm] × 70 [μm], respectively.
The size is set to 60 [μm] × 70 [μm], so that a pad area approximately twice as large as that in the case of performing the probe test on the gold bump electrode 1a can be secured. In addition, since the pad pitch is sufficiently separated compared to the pitch of the gold bump electrodes, the probe unit can be easily manufactured.

Next, a cross section taken along the line AA1 in FIG. 1 will be described. As shown in FIG. 3, the gold bump electrode 1a is formed on the aluminum pad electrode 8a, and this and the aluminum pad electrode 8b are connected by wiring. The difference between the electrodes is that the flatness of the electrode surface is greatly different. This is because, as described in the background art, the concave shape on the surface is generated in the range of 2 [μm] to 3 [μm] in the gold bump forming step, whereas the aluminum pad electrodes 8 a and 8 b are formed on the underlying active element region 3. Although there is unevenness due to the step of the diffusion wiring, this is a level difference that does not cause a problem. Therefore, by inspecting the aluminum pad electrodes 8a and 8b with the probe needle 7, the inspection can be performed more stably. In FIG. 3, reference numeral 5 denotes a protective film, and reference numeral 6 denotes a barrier metal.

Next, a method of forming a gold bump electrode for realizing the above-described pad configuration will be described. 4 and 5 show a flow of an electrolytic plating process for forming a bump electrode.

FIG. 4A shows the state of the silicon chip 2 before the formation of the gold bump electrode. In FIG. 4A, 5
Is a protective film, and 8a and 8b are aluminum pad electrodes.

Next, as shown in FIG. 4B, a barrier metal 6 is formed by depositing TiW (titanium tungsten) and then Au (gold) on the entire surface of the silicon chip 2 before gold plating.

In FIG. 4C, after a photosensitive resist 9 is applied to the entire surface, a portion where a bump is to be formed is covered with a mask and exposed.

Then, in FIG. 4D, the unnecessary resist 9 is removed by the mask in the portion where the bump is to be formed.
Here, the resist 9 is left on the aluminum pad electrode 8b for inspection, and the preparation for bump formation is completed on the aluminum pad electrode 8a.

Next, as shown in FIG.
Gold (Au) is formed in a predetermined shape by electroplating on the aluminum pad electrode 8a, which is the portion from which is removed, to form the gold bump electrode 1a.

Then, the resist is removed in FIG. 5B, but since the barrier metal 6 remains on the entire surface of the silicon chip 2, the barrier metal 6 is removed with an iodine-based etching solution as shown in FIG. 5C. After removing Au, TiW is etched with H ₂ O ₂ (hydrogen peroxide solution). Here, H ₂ O ₂ can remove the barrier metal 6 without damaging the aluminum pad electrodes 8a and 8b by erosion or the like. As a result, the aluminum pad before the formation of the gold bump electrode appears on the aluminum pad electrode 8b, and the electrical inspection of the aluminum pad electrode 8b, which is generally performed, with a probe needle can be performed.

Next, a second embodiment of the semiconductor device of the present invention will be described.

FIG. 6 is a plan view showing the semiconductor device of this embodiment. In the embodiment shown in FIG. 1, by arranging the inspection electrode pad on the active element region 3,
Although the increase in chip size has been suppressed, there is a restriction for placing an inspection pad in the active element region 3, and when an electrode pad cannot be arranged, as shown in FIG. An aluminum pad electrode 10 for inspection is placed on the surface of the silicon chip 2 sandwiched between the outer peripheral portions of the silicon chip 2.

It should be noted here that the gold bump electrode 1a
3 is a position from the outer peripheral portion of the silicon chip 2. When ILB is applied to the gold bump electrode 1a on the silicon chip 2, the length of the inner lead is restricted. In the case of a flying lead, the inner lead having a width of 20 [μm] has a length of about 350 [μm]. It is necessary to arrange at a position where the bump electrode 1a can reach.

[0037]

As described above, according to the semiconductor device of the present invention, among the plurality of bump electrodes provided on the silicon chip of the semiconductor device, at least some of the bump electrodes in plan view are provided with the gold bump electrodes. By providing the aluminum pad electrode connected to the above, it is possible to provide a more flat and rougher pitch aluminum pad electrode for probe inspection while narrowing the pitch of the gold bump electrode. By performing a probe test using the aluminum pad electrode, it is possible to improve the reliability of the electrical test and easily form a super-multi-output semiconductor device.

[Brief description of the drawings]

FIG. 1 is a plan view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is an enlarged plan view showing a semiconductor device according to one embodiment of the present invention;

FIG. 3 is a partial cross-sectional view of a semiconductor device according to one embodiment of the present invention;

FIG. 4 is a sectional view showing a process of forming a gold bump electrode of the semiconductor device according to the embodiment of the present invention;

FIG. 5 is a process sectional view showing the formation of the gold bump electrode of the semiconductor device according to the embodiment of the present invention;

FIG. 6 is a plan view showing a semiconductor device according to an embodiment of the present invention.

FIG. 7 is a plan view showing a conventional semiconductor device.

FIG. 8 is a partial cross-sectional view of a conventional semiconductor device.

[Explanation of symbols]

 1a, 1b, 1c Gold bump electrode 2 Silicon chip 3 Active element 4 Aluminum pad electrode 5 Protective film 6 Barrier metal 7 Probe needle 8 Aluminum pad electrode 9 Resist 10 Aluminum pad electrode

Claims (2)

[Claims] A semiconductor chip having a built-in semiconductor element;
A semiconductor device, comprising: a plurality of pad electrodes provided on an upper surface of the semiconductor chip; and an inspection electrode pad electrically connected to each of the plurality of pad electrodes. 2. At least a part of the pad electrodes has a gold bump, and at least a part of the plurality of pad electrodes has another conductive pad electrode. The semiconductor device according to claim 1, wherein the semiconductor device has no gold bump.