JPH10294318A - Electronic part - Google Patents
Electronic partInfo
- Publication number
- JPH10294318A JPH10294318A JP10174097A JP10174097A JPH10294318A JP H10294318 A JPH10294318 A JP H10294318A JP 10174097 A JP10174097 A JP 10174097A JP 10174097 A JP10174097 A JP 10174097A JP H10294318 A JPH10294318 A JP H10294318A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- metal layer
- solder bump
- electrode
- diffusion preventing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、回路基板に、フェ
ースダウン方式で搭載される電子部品に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component mounted on a circuit board in a face-down manner.
【0002】[0002]
【従来の技術】従来より、半導体チップ等の電子部品を
回路配線基板上に高密度に実装可能であり、かつ多数の
入出力電極を有する電子部品を用いても、実装外形が大
型化することなく回路配線基板上に実装可能である方法
として、電子部品と回路配線基板の例えば半田突起電極
からなる接続電極とを向かい合わせて配置し、半田突起
電極を用いてこれらを接続するいわゆるフェースダウン
実装方式が効果的とされている。2. Description of the Related Art Conventionally, an electronic component such as a semiconductor chip can be mounted on a circuit wiring board at a high density, and even if an electronic component having a large number of input / output electrodes is used, the mounting size becomes large. As a method that can be mounted on a circuit wiring board without disposing, so-called face-down mounting, in which electronic components and connection electrodes made of, for example, solder bump electrodes of the circuit wiring board are arranged to face each other, and these are connected using solder bump electrodes The method is considered effective.
【0003】なかでも、半田突起電極を用いたフェース
ダウン実装方式は、例えば「Microelectro
nic Packaging Handbook (V
anNostrand Reinhold, 198
9)」に記載されているように、半田突起電極のリフロ
ー接続時のセルフアライメント効果により、搭載位置ず
れ許容範囲が広く、半田突起電極の塑性変形による応力
緩和効果により、高信頼性化が可能であるという長所が
あるため、フェースダウン実装方式の主流になってい
る。[0003] Among them, a face-down mounting method using a solder bump electrode is described in, for example, "Microelectro.
Nic Packaging Handbook (V
anNostrand Reinhold, 198
9) ”, the self-alignment effect at the time of reflow connection of the solder bump electrode allows a wide allowable range of mounting position shift, and the reliability can be improved by the stress relaxation effect due to the plastic deformation of the solder bump electrode. Therefore, the face-down mounting method has become mainstream.
【0004】半田突起電極を用いたフェースダウン実装
方式では、リフロー接続時の半田の表面張力により、リ
フロー接続後の半田突起電極の形状は中央部が膨らんだ
樽状の形状になる。この方式では、リフロー接続時に、
隣接する半田突起電極同士が接触して電気的に短絡する
ことを防ぐために、隣接する半田突起電極同士の間隔に
余裕が必要である。このため、半田突起電極同士の間隔
を十分に確保するには、電子部品上の半田突起電極底面
の径を、半田突起電極のピッチの40%以下にする必要
があった。さらに、電極パッド材料が半田突起電極中に
拡散して信頼性が低下することを防ぐ目的と、半田突起
電極と電極パッドの濡れ性を確保する目的とから、電極
パッドと半田突起電極の間に半田に濡れる材料からなる
拡散防止金属層を形成する必要があった。In the face-down mounting method using the solder bump electrodes, the shape of the solder bump electrodes after the reflow connection has a barrel-like shape with a bulged central portion due to the surface tension of the solder during the reflow connection. In this method, at the time of reflow connection,
In order to prevent the adjacent solder projecting electrodes from contacting each other to cause an electrical short circuit, there is a need for a space between the adjacent solder projecting electrodes. For this reason, in order to secure a sufficient space between the solder bump electrodes, the diameter of the bottom surface of the solder bump electrode on the electronic component needs to be 40% or less of the pitch of the solder bump electrodes. Furthermore, the purpose of preventing the electrode pad material from being diffused into the solder bump electrode and reducing the reliability, and the purpose of ensuring the wettability between the solder bump electrode and the electrode pad, is to reduce the distance between the electrode pad and the solder bump electrode. It was necessary to form a diffusion preventing metal layer made of a material that wets the solder.
【0005】一方、通常、電子部品は良品検査・特性評
価のため電極パッド上に電極プローブを接触させて電気
検査を行う必要がある。電気検査に必要な電極パッド寸
法は電極プローブ先端径に電極プローブと電極パッドの
位置合わせ誤差を加算したものである。従って、電極プ
ローブによる電気検査を行うために、ピッチが微細な電
極パッドについては、隣接する電極パッドの間隔を小さ
くし、電極パッド寸法を可能な限り大きくする方法が用
いられている。例えば微細ピッチのワイヤボンディング
用電極パッドでは、電極パッドピッチ100μmに対し
て、電極パッド寸法が90μm程度である。On the other hand, in general, it is necessary to conduct an electrical inspection of an electronic component by bringing an electrode probe into contact with an electrode pad in order to inspect non-defective products and evaluate characteristics. The electrode pad size required for the electrical inspection is obtained by adding a positioning error between the electrode probe and the electrode pad to the tip diameter of the electrode probe. Therefore, in order to perform an electrical test using an electrode probe, for electrode pads having a fine pitch, a method of reducing the distance between adjacent electrode pads and increasing the dimensions of the electrode pads as much as possible is used. For example, in an electrode pad for wire bonding having a fine pitch, the electrode pad dimension is about 90 μm for an electrode pad pitch of 100 μm.
【0006】ところが、半田突起電極を用いたフェース
ダウン実装方式では、電極パッドの開口部の全面が半田
に濡れる材料からなる拡散防止金属層で覆われているこ
とから、電極パッドの開口部寸法は、半田突起電極の底
面の寸法より小さくなる。このため、接続ピッチに対し
て電極パッド寸法が小さく設定される。電極パッド寸法
が小さく設定されると、接続ピッチを微細化した場合
に、電極プローブによる電気検査が困難となる。このよ
うに、電極パッドの開口部寸法が半田突起電極の底面の
寸法より小さいことは、接続ピッチの微細化の障害とな
るという問題を生じていた。However, in the face-down mounting method using the solder bump electrodes, since the entire surface of the opening of the electrode pad is covered with a diffusion preventing metal layer made of a material that wets the solder, the size of the opening of the electrode pad is limited. , Smaller than the dimensions of the bottom surface of the solder bump electrode. For this reason, the electrode pad dimensions are set smaller than the connection pitch. If the electrode pad dimensions are set small, it becomes difficult to perform an electrical inspection using an electrode probe when the connection pitch is reduced. As described above, when the size of the opening of the electrode pad is smaller than the size of the bottom surface of the solder bump electrode, there has been a problem that the connection pitch becomes smaller.
【0007】[0007]
【発明が解決しようとする課題】以上に述べたように、
半田突起電極を用いたフェースダウン実装方式では、隣
接する半田突起電極同士の電気的短絡を防ぐために半田
突起電極底面の径を半田突起電極のピッチの40%以下
にする必要がある。しかしながら、接続ピッチの微細化
に伴い、開口部が微細になると、電極プローブによる電
気検査が不可能となるため、接続ピッチの微細化を妨げ
ているという問題があった。As described above, as described above,
In the face-down mounting method using the solder bump electrodes, the diameter of the bottom face of the solder bump electrodes needs to be 40% or less of the pitch of the solder bump electrodes in order to prevent an electrical short circuit between adjacent solder bump electrodes. However, when the opening is made finer with the miniaturization of the connection pitch, an electrical inspection using an electrode probe becomes impossible, and thus there is a problem that the miniaturization of the connection pitch is hindered.
【0008】本発明は、上記事情に鑑みてなされたもの
で、接続ピッチの微細化を行なっても電気的短絡を起こ
すことなく、かつ半田突起電極接合構造の電気検査が容
易であるフェースダウン実装のための電子部品を提供す
ることを目的とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and does not cause an electrical short circuit even when the connection pitch is miniaturized, and facilitates an electrical inspection of a solder bump electrode bonding structure. The purpose is to provide electronic components for.
【0009】[0009]
【課題を解決するための手段】本発明は、第1に、基
板、該基板上に設けられた電極パッド、該電極パッド上
に設けられ、開口部を有する絶縁保護膜、該絶縁保護膜
と該開口部の電極パッド上に設けられた半田拡散防止金
属層、及び該半田拡散防止金属層上に設けられた半田突
起電極を具備する電子部品において、前記半田拡散防止
金属層は、前記半田突起電極と濡れる領域と前記半田突
起電極と濡れない領域とからなり、かつ少なくとも前記
開口部領域の中央部は前記半田突起電極と濡れる領域か
らなることを特徴とする電子部品を提供する。SUMMARY OF THE INVENTION The present invention firstly provides a substrate, an electrode pad provided on the substrate, an insulating protective film provided on the electrode pad and having an opening, In an electronic component comprising a solder diffusion preventing metal layer provided on the electrode pad in the opening and a solder bump electrode provided on the solder diffusion preventing metal layer, the solder diffusion preventing metal layer is An electronic component is provided, comprising: a region that is wet with an electrode; and a region that is not wet with the solder bump electrode, and at least a central portion of the opening region is a region that is wet with the solder bump electrode.
【0010】本発明は、第2に、基板、該基板上に設け
られた電極パッド、及び該電極パッド上に設けられ、開
口部を有する絶縁保護膜、該絶縁保護膜と該開口部の電
極パッド上に設けられた半田拡散防止金属層、及び該半
田拡散防止金属層上に設けられた半田突起電極を具備す
る電子部品において、前記半田拡散防止金属層は、前記
半田突起電極と濡れる領域と、前記半田突起電極と濡れ
ない領域とからなり、かつ前記半田突起電極の底面積
は、前記開口部の面積よりも小さいことを特徴とする電
子部品を提供する。The present invention also provides a substrate, an electrode pad provided on the substrate, an insulating protective film provided on the electrode pad and having an opening, the insulating protective film and an electrode in the opening. In a solder diffusion preventing metal layer provided on a pad, and an electronic component including a solder bump electrode provided on the solder diffusion preventing metal layer, the solder diffusion preventing metal layer has a region wet with the solder bump electrode. An electronic component comprising the solder bump electrode and a non-wetting region, wherein a bottom area of the solder bump electrode is smaller than an area of the opening.
【0011】[0011]
【発明の実施の形態】本発明は、電子回路を有する電子
部品に関するもので、特に電子部品基板上に設けられる
電極パッド、半田拡散防止金属層及び接続用の半田突起
電極に特徴を有する。本発明の電子部品は、以下の2つ
の観点にわけられる。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention relates to an electronic component having an electronic circuit, and is particularly characterized by an electrode pad provided on an electronic component substrate, a solder diffusion preventing metal layer, and a solder bump electrode for connection. The electronic component of the present invention is divided into the following two aspects.
【0012】本発明の第1の観点によれば、基板上の電
極パッドに設けられ、開口部を有する絶縁保護膜、絶縁
保護膜と開口部の電極パッド上に設けられた半田拡散防
止金属層、及び該半田拡散防止金属層上に設けられた半
田突起電極を具備する電子部品において、半田拡散防止
金属層は、半田突起電極と濡れる領域と半田突起電極と
濡れない領域とからなり、かつ少なくとも開口部領域の
中央部は半田突起電極と濡れる領域からなる電子部品が
得られる。According to a first aspect of the present invention, an insulating protective film provided on an electrode pad on a substrate and having an opening, a solder diffusion preventing metal layer provided on the insulating protective film and the electrode pad on the opening. And, in an electronic component having a solder bump electrode provided on the solder diffusion barrier metal layer, the solder diffusion barrier metal layer comprises a solder bump electrode wet area and a solder bump electrode non-wet area, and at least An electronic component including a solder bump electrode and a wetted area at the center of the opening area can be obtained.
【0013】また、第2の観点によれば、基板上の電極
パッドに設けられ、開口部を有する絶縁保護膜、絶縁保
護膜と開口部の電極パッド上に設けられた半田拡散防止
金属層、及び該半田拡散防止金属層上に設けられた半田
突起電極を具備する電子部品において、半田拡散防止金
属層は、半田突起電極と濡れる領域と、半田突起電極と
濡れない領域とからなり、かつ半田突起電極の底面積
は、開口部の面積よりも小さいことを特徴とする電子部
品が得られる。According to a second aspect, an insulating protective film provided on an electrode pad on a substrate and having an opening, a solder diffusion preventing metal layer provided on the insulating protective film and the electrode pad on the opening, And an electronic component having a solder projection electrode provided on the solder diffusion prevention metal layer, wherein the solder diffusion prevention metal layer includes a region wet with the solder projection electrode, a region not wet with the solder projection electrode, and An electronic component is obtained in which the bottom area of the protruding electrode is smaller than the area of the opening.
【0014】本発明の第1の観点にかかる電子部品で
は、半田拡散防止金属層表面領域が、少なくともその中
央部領域に設けられた半田と濡れる領域と、それ以外の
領域に設けられた半田と濡れないとから構成されてい
る。このことにより、リフロー後の半田突起電極の径が
半田拡散防止金属層の半田と濡れる領域と同等となる。
このようにして、半田突起電極の径を絶縁保護膜開口部
より小さくすることが可能となる。In the electronic component according to the first aspect of the present invention, the surface region of the solder diffusion preventing metal layer has at least a region that is wet with the solder provided in the central region and a region that is wet with the solder provided in the other region. It consists of not getting wet. Thereby, the diameter of the solder bump electrode after reflow becomes equal to the solder wetted area of the solder diffusion preventing metal layer.
In this manner, the diameter of the solder bump electrode can be made smaller than the opening of the insulating protective film.
【0015】また、本発明の第2の観点にかかる電子部
品では、半田突起電極の底面の寸法が絶縁保護膜開口部
より寸法が小さく形成されている。第1及び第2の観点
にかかる電子部品によれば、形成される半田突起電極同
士の間隔が十分に確保されて、リフロー接続時に隣接す
る半田突起電極同士が接触して電気的に短絡することを
防ぐことが出来る。また、電気的に短絡しにくいことか
ら、この電子部品では、半田突起電極ピッチが微細な場
合でも、電極パッドの寸法を十分に大きく設定すること
ができる。このため、半田突起電極形成前の工程、およ
び半田突起電極リフロー直前の工程に於いて電極プロー
ブによる電気検査を容易に行うことが出来る。このよう
に本発明によれば、従来困難であった半田突起電極の微
細化と電極パッド寸法の最大化とを両立させることがで
きる。Further, in the electronic component according to the second aspect of the present invention, the size of the bottom surface of the solder bump electrode is formed smaller than that of the opening of the insulating protective film. According to the electronic components according to the first and second aspects, the interval between the formed solder bump electrodes is sufficiently ensured, and the adjacent solder bump electrodes come into contact with each other at the time of reflow connection, resulting in an electrical short circuit. Can be prevented. Further, since it is difficult to electrically short-circuit, in this electronic component, even when the pitch of the solder bump electrodes is fine, the dimensions of the electrode pads can be set sufficiently large. For this reason, the electrical inspection by the electrode probe can be easily performed in the process before the formation of the solder bump electrode and in the process immediately before the reflow of the solder bump electrode. As described above, according to the present invention, it is possible to achieve both miniaturization of the solder bump electrodes and maximization of the electrode pad size, which have been difficult in the past.
【0016】また、本発明の第1の好ましい態様によれ
ば、基板上に所定のピッチで配列された複数の電極パッ
ドを有し、各電極パッド上に開口部を有する絶縁保護
膜、絶縁保護膜と開口部の電極パッド上に半田拡散防止
金属層、及び半田拡散防止金属層上に半田突起電極がそ
れぞれ設けられ、半田拡散防止金属層は、絶縁保護膜と
開口部の電極パッド上に設けられた半田突起電極と濡れ
ない第1の半田拡散防止金属層と、第1の半田拡散防止
金属層のうち、その中央部を含み、かつ少なくとも半田
突起電極と隣接する領域を除く領域上に形成された半田
突起電極と濡れる第2の半田拡散防止金属層とからなる
電子部品が提供される。According to a first preferred embodiment of the present invention, an insulating protective film having a plurality of electrode pads arranged on a substrate at a predetermined pitch and having openings on each electrode pad, A solder diffusion preventing metal layer is provided on the film and the electrode pad in the opening, and a solder bump electrode is provided on the solder diffusion preventing metal layer. The solder diffusion preventing metal layer is provided on the insulating protective film and the electrode pad in the opening. A first solder diffusion preventing metal layer that does not wet the solder bump electrode, and a first solder diffusion preventing metal layer that is formed on a region including a central portion thereof and excluding at least a region adjacent to the solder bump electrode. There is provided an electronic component including the solder bump electrode thus formed and the wetted second solder diffusion preventing metal layer.
【0017】また、本発明の第2の好ましい態様によれ
ば、基板上に所定のピッチで配列された複数の電極パッ
ドを有し、各電極パッド上に開口部を有する絶縁保護
膜、絶縁保護膜と開口部の電極パッド上に半田拡散防止
金属層、及び半田拡散防止金属層上に半田突起電極がそ
れぞれ設けられ、半田拡散防止金属層は、半田突起電極
と濡れる領域と半田突起電極と濡れない領域とからな
り、かつ絶縁保護膜と開口部の電極パッド上に設けら
れ、半田突起電極と濡れる第2の半田拡散防止金属層
と、第2の半田拡散防止金属層のうち、その中央部を除
き、かつ少なくとも半田突起電極と隣接する領域上に形
成された半田突起電極と濡れない第1の半田拡散防止金
属層とからなる電子部品が提供される。According to a second preferred embodiment of the present invention, an insulating protective film having a plurality of electrode pads arranged at a predetermined pitch on a substrate and having openings on each electrode pad, A solder diffusion preventing metal layer is provided on the film and the electrode pad of the opening, and a solder bump electrode is provided on the solder diffusion preventing metal layer. A second solder diffusion preventing metal layer, which is provided on the insulating protection film and the electrode pad in the opening and wets the solder bump electrode, and a central portion of the second solder diffusion preventing metal layer. And an electronic component comprising a solder bump electrode formed at least on a region adjacent to the solder bump electrode and a non-wetting first solder diffusion preventing metal layer.
【0018】以下、図面を参照し、本発明を具体的に説
明する。本発明の電子部品の半田突起電極構造の一例を
表す概略断面図を図1に示す。図示するように、この電
子部品はシリコン半導体からなる電子部品11を有す
る。電子部品11上には、例えば厚さ600nm、80
μm径の正八角形状のアルミニウムからなる電極パッド
13が設けられており、電極パッド13上に、例えば7
2μm径の正八角形状の開口部18を有する例えば厚さ
1200nmの窒化シリコンからなる絶縁保護膜12が
形成されている。さらに、開口部18の電極パッド13
及び絶縁保護膜12の表面に沿ってこれらを完全に覆う
ように、例えば厚み80nm、35μm径の正八角形状
のチタンからなる第1の半田拡散防止金属層14が形成
されており、その上に厚み800nm、35μm径の正
八角形状のニッケルからなる第2の半田拡散防止金属層
15が形成されている。第2の半田拡散防止金属層15
上には錫と鉛の重量比が63対37であり、高さが40
μmで最大直径が50μmである半田突起電極17が形
成されている。第1の半田拡散防止金属層であるチタン
は溶融状態の半田と濡れず、第2の半田拡散防止金属層
であるニッケルは半田に濡れる性質があることから、半
田突起電極は、第2の半田拡散防止金属層上にのみ形成
される。半田突起電極のピッチは90μmである。Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic cross-sectional view illustrating an example of the solder bump electrode structure of the electronic component of the present invention. As shown, the electronic component has an electronic component 11 made of a silicon semiconductor. On the electronic component 11, for example, a thickness of 600 nm, 80
An electrode pad 13 made of a regular octagonal aluminum having a diameter of μm is provided.
An insulating protective film 12 made of, for example, silicon nitride having a thickness of 1200 nm and having a regular octagonal opening 18 having a diameter of 2 μm is formed. Further, the electrode pad 13 in the opening 18
A first solder diffusion preventing metal layer 14 made of regular octagonal titanium having a thickness of, for example, 80 nm and a diameter of 35 μm is formed on the insulating protective film 12 so as to completely cover them along the surface thereof. A second solder diffusion prevention metal layer 15 made of regular octagonal nickel having a thickness of 800 nm and a diameter of 35 μm is formed. Second solder diffusion preventing metal layer 15
On top, the weight ratio of tin to lead is 63:37 and the height is 40
The solder bump electrode 17 having a maximum diameter of 50 μm is formed. Since the first solder diffusion preventing metal layer, titanium, does not wet with the molten solder, and the second solder diffusion preventing metal layer, nickel, has the property of getting wet with the solder. It is formed only on the diffusion preventing metal layer. The pitch of the solder bump electrodes is 90 μm.
【0019】図2には、本発明の電子部品の半田突起電
極形成前の様子を上から見た図を示す。図示するよう
に、本発明の電子部品では、半田拡散防止金属層が形成
された領域は、第1の半田拡散防止金属層14と第2の
半田拡散防止金属層15とにより、半田に濡れない領域
と、半田に濡れる領域とにわかれている。FIG. 2 is a top view of the electronic component of the present invention before solder bump electrodes are formed. As shown in the drawing, in the electronic component of the present invention, the region where the solder diffusion preventing metal layer is formed is not wet by the solder by the first solder diffusion preventing metal layer 14 and the second solder diffusion preventing metal layer 15. It is divided into a region and a region that is wet with solder.
【0020】図1に示すような構造を有する電子部品1
1は、1GHzから6GHzで動作する高周波部品であ
り、電気特性のばらつきが機能上無視できないことか
ら、製作工程中や完成時の電気特性の検査が不可欠であ
る。Electronic component 1 having a structure as shown in FIG.
Reference numeral 1 denotes a high-frequency component that operates at 1 GHz to 6 GHz. Since the variation in electrical characteristics cannot be ignored in terms of function, inspection of electrical characteristics during the manufacturing process or at the time of completion is indispensable.
【0021】図3は、本発明の電子部品の半田拡散防止
金属層形成前の状態を表す概略断面図を示す。また、図
示するように、この電子部品では、開口部の径が72μ
mと大きいことから容易にプロービング検査を行うこと
が出来る。また、半田突起電極リフロー後は、図1に示
すように隣接する半田突起電極の間隔が半田突起電極ピ
ッチの約半分と大きいことから、基板との接続工程にお
いても隣接する半田突起電極同士が短絡することがな
い。FIG. 3 is a schematic sectional view showing a state before the formation of the solder diffusion preventing metal layer of the electronic component of the present invention. As shown in the figure, in this electronic component, the diameter of the opening is 72 μm.
Since it is large, the probing inspection can be easily performed. Also, after the reflow of the solder bump electrodes, as shown in FIG. 1, the distance between the adjacent solder bump electrodes is about half of the pitch of the solder bump electrodes. Never do.
【0022】比較として、図4に、半田拡散防止金属層
全体が半田に濡れやすくなっている電子部品の一例を表
す概略断面図を示す。この比較例では、開口部39の電
極パッド33及び絶縁保護膜32の表面に沿って、これ
らを完全に覆うように、半田に濡れやすい半田拡散防止
金属層30を形成した後、図1と同ピッチで半田突起電
極37を形成した電子部品の例を示す。この場合、半田
拡散防止金属層20全体が半田に濡れやすくなっている
ので、半田突起電極37の底面の径が、開口部39の径
より大きくなる。このため、図1と同ピッチで半田突起
電極37を形成するには、開口部19の径を25μmま
で小さくしなければならない。図5に、図4の半田拡散
防止金属層形成前の状態を表す概略断面図を示す。図5
に示すように、開口部39が小さいと、プロービング電
気検査は非常に困難である。For comparison, FIG. 4 is a schematic sectional view showing an example of an electronic component in which the entire solder diffusion preventing metal layer is easily wetted by solder. In this comparative example, a solder diffusion preventing metal layer 30 that is easily wetted by solder is formed along the surfaces of the electrode pad 33 and the insulating protective film 32 in the opening 39 so as to completely cover them. An example of an electronic component in which solder bump electrodes 37 are formed at a pitch is shown. In this case, since the entire solder diffusion preventing metal layer 20 is easily wetted by the solder, the diameter of the bottom surface of the solder bump electrode 37 is larger than the diameter of the opening 39. Therefore, in order to form the solder bumps 37 at the same pitch as in FIG. 1, the diameter of the opening 19 must be reduced to 25 μm. FIG. 5 is a schematic sectional view showing a state before the formation of the solder diffusion preventing metal layer in FIG. FIG.
As shown in the figure, if the opening 39 is small, the probing electrical inspection is very difficult.
【0023】次に、本発明の電子部品の半田突起電極構
造の一例を形成する工程について、図6ないし図13を
用いて説明する。図6は電極パッド13及び開口18を
有する絶縁膜保護膜12を有するシリコン半導体からな
る電子部品11を示す。この状態で電極パッド13に電
極プローブを接触させて電気検査を行なう。Next, a process for forming an example of the solder bump electrode structure of the electronic component of the present invention will be described with reference to FIGS. FIG. 6 shows an electronic component 11 made of a silicon semiconductor having an electrode pad 13 and an insulating film protective film 12 having an opening 18. In this state, an electrode probe is brought into contact with the electrode pad 13 to perform an electrical test.
【0024】その後、図7に示すように、厚み80nm
のチタンからなる第1の半田拡散防止金属層14と厚み
800nmのニッケルからなる第2の半田拡散防止金属
層15をマグネトロンスパッタリング法により連続成膜
する。Thereafter, as shown in FIG.
A first solder diffusion preventing metal layer 14 made of titanium and a second solder diffusion preventing metal layer 15 made of nickel having a thickness of 800 nm are continuously formed by magnetron sputtering.
【0025】次いで、めっき用レジスト21を塗布して
半田突起電極を形成する部分にレジスト開口部22を形
成する。レジスト開口部形成後の構造を図8に示す。め
っきレジストはポジ型の感光性レジストを用い、レジス
ト厚さは40μm、レジスト開口部22は35μm径の
正八角形である。Next, a plating resist 21 is applied to form a resist opening 22 in a portion where a solder bump electrode is to be formed. FIG. 8 shows the structure after the formation of the resist opening. As the plating resist, a positive photosensitive resist is used, the resist thickness is 40 μm, and the resist opening 22 is a regular octagon having a diameter of 35 μm.
【0026】次に、図9に示すように、錫と鉛の重量比
が63対37である半田層23を電気めっきによりレジ
スト開口部22に形成する。通電用電極としては第1お
よび第2の半田拡散防止金属層14,15を用いる。メ
ッキ厚みは35μmである。Next, as shown in FIG. 9, a solder layer 23 having a weight ratio of tin to lead of 63:37 is formed in the resist opening 22 by electroplating. The first and second solder diffusion preventing metal layers 14 and 15 are used as the current-carrying electrodes. The plating thickness is 35 μm.
【0027】次いで、レジスト剥離液を用いてメッキ用
レジストを除去し、図10に示すように、半田層23を
マスクとして第2の半田拡散防止金属層15の露出部を
専用のエッチング液を用いてエッチング除去する。Next, the plating resist is removed using a resist stripper, and as shown in FIG. 10, the exposed portion of the second solder diffusion preventing metal layer 15 is formed using a dedicated etching solution using the solder layer 23 as a mask. To remove by etching.
【0028】これにより、図11に示すように、に第2
の半田拡散防止金属層15は、半田層23下部にのみ残
る。その後、図12に示すように、半田層23を覆うよ
うにエッチング用レジスト25を形成し、これをマスク
にして第1の半田拡散防止金属層の露出部をエッチング
によりパターニングする。エッチング用レジスト25は
ポジ型の感光性レジストを用い、レジスト厚さは40μ
mである。パターニング後の第1の半田拡散防止金属層
14は開口部18を完全に覆うような構造とする。As a result, as shown in FIG.
The solder diffusion preventing metal layer 15 remains only under the solder layer 23. Thereafter, as shown in FIG. 12, an etching resist 25 is formed so as to cover the solder layer 23, and using this as a mask, the exposed portion of the first solder diffusion preventing metal layer is patterned by etching. As the etching resist 25, a positive photosensitive resist is used, and the resist thickness is 40 μm.
m. The first solder diffusion preventing metal layer 14 after patterning has a structure that completely covers the opening 18.
【0029】次に、エッチング用レジストを除去し、図
13に示すように、半田層23を窒素雰囲気中で240
℃に加熱してリフローすることにより、半田突起電極1
7を形成する。Next, the etching resist is removed, and as shown in FIG.
The temperature of the solder protruding electrode 1
7 is formed.
【0030】以上の工程により図1に示す電子部品の半
田突起電極構造の第1の実施例を実現することができ
る。次に、本発明の電子部品の半田突起電極構造の他の
例を表す概略断面図を図14に示す。図示するように、
この電子部品は、シリコン半導体からなる電子部品11
を有する。電子部品11上には、例えば厚さ600n
m、80μm径の正八角形状のアルミニウムからなる電
極パッド13と、例えば72μm径の正八角形状の開口
部18を有する厚さ1200nmの窒化シリコンからな
る絶縁保護膜12が形成されている。さらに、開口部1
8を有する例えば電極パッド13及び絶縁保護膜12の
表面に沿ってこれらを完全に覆うように、厚さ60nm
のチタンからなる接着金属層46及び厚さ800nm、
80μm径の正八角形状のニッケルからなる第2の半田
拡散防止金属層45が、順に形成されている。第2の半
田拡散防止金属層45上には錫と鉛の重量比が63対3
7であり、高さが40μmで最大直径が50μmの半田
突起電極47が形成されている。半田突起電極47の底
面部の径は35μmの正八角形状であり、開口部18よ
り小さい。第2の半田拡散防止金属層45上の半田突起
電極の底面部以外の部分には、厚み60nmの半田と濡
れないチタンからなる第1の半田拡散防止金属層44が
形成されている。第1の半田拡散防止金属層44は半田
と濡れず、第2の半田拡散防止金属層45は半田に濡れ
ることから、半田突起電極47は第2の半田拡散防止金
属層45上の第1の半田拡散防止金属層44が形成され
ていない部分にのみ形成される。半田突起電極のピッチ
は90μmである。Through the above steps, the first embodiment of the solder bump electrode structure of the electronic component shown in FIG. 1 can be realized. Next, FIG. 14 is a schematic sectional view showing another example of the solder bump electrode structure of the electronic component of the present invention. As shown
This electronic component is an electronic component 11 made of a silicon semiconductor.
Having. On the electronic component 11, for example, a thickness of 600 n
An electrode pad 13 made of regular octagonal aluminum having a diameter of 80 μm and 80 μm, and an insulating protection film 12 made of silicon nitride having a thickness of 1200 nm and having a regular octagonal opening 18 having a diameter of 72 μm are formed. Further, the opening 1
8 having a thickness of 60 nm so as to completely cover them along the surface of the electrode pad 13 and the insulating protective film 12, for example.
An adhesion metal layer 46 made of titanium and a thickness of 800 nm,
A second solder diffusion preventing metal layer 45 made of regular octagonal nickel having a diameter of 80 μm is sequentially formed. On the second solder diffusion preventing metal layer 45, the weight ratio of tin to lead is 63: 3.
7, a solder bump electrode 47 having a height of 40 μm and a maximum diameter of 50 μm is formed. The diameter of the bottom surface of the solder projection electrode 47 is a regular octagon with a diameter of 35 μm, which is smaller than the opening 18. A first solder diffusion preventing metal layer 44 made of 60 nm thick solder and non-wetting titanium is formed on a portion of the second solder diffusion preventing metal layer 45 other than the bottom surface of the solder bump electrode. Since the first solder diffusion preventing metal layer 44 does not wet with the solder and the second solder diffusion preventing metal layer 45 wets with the solder, the solder bump electrode 47 is formed on the first solder diffusion preventing metal layer 45 on the first solder diffusion preventing metal layer 45. It is formed only on the portion where the solder diffusion preventing metal layer 44 is not formed. The pitch of the solder bump electrodes is 90 μm.
【0031】この半田突起電極構造も、図1に示す例と
同様に、開口部18の径が72μmと大きいことから、
半田突起電極形成前の工程において、容易にプロービン
グ検査を行うことが出来る。また、半田突起電極リフロ
ー後は隣接する半田突起電極の間隔が半田突起電極ピッ
チの約半分であり、十分に大きいことから、基板との接
続工程においても隣接する半田突起電極同士が短絡する
こともない。This solder bump electrode structure also has a large diameter of the opening 18 of 72 μm as in the example shown in FIG.
In the process before the formation of the solder bump electrodes, the probing inspection can be easily performed. Also, after reflow of the solder bump electrodes, the spacing between the adjacent solder bump electrodes is about half of the pitch of the solder bump electrodes, and is sufficiently large. Absent.
【0032】次に、本発明の電子部品の半田突起電極構
造の他の例を形成する工程について、図15ないし図1
9を用いて説明する。図15に示すように、シリコン半
導体からなる電子部品11上に、チタンからなる接着金
属層46とニッケルからなる第2の半田拡散防止金属層
45とチタンからなる第1の半田拡散防止金属層44を
マグネトロンスパッタリング法により連続成膜する。Next, a process for forming another example of the solder bump electrode structure of the electronic component of the present invention will be described with reference to FIGS.
9 will be described. As shown in FIG. 15, an adhesive metal layer 46 made of titanium, a second solder diffusion preventing metal layer 45 made of nickel, and a first solder diffusion preventing metal layer 44 made of titanium are formed on an electronic component 11 made of a silicon semiconductor. Is continuously formed by magnetron sputtering.
【0033】次いで、図16に示すように、感光性レジ
ストを用いたフォトエッチングプロセスにより第1の半
田拡散防止金属層44をエッチング液を用いてパターニ
ングする。Next, as shown in FIG. 16, the first solder diffusion preventing metal layer 44 is patterned by an etching solution by a photo etching process using a photosensitive resist.
【0034】その後、図17に示すように、厚さが30
μmのめっき用レジスト層41を用いて半田突起電極形
成部分にレジスト開口部を形成する。さらに、錫と鉛の
重量比が63対37である半田層53を電気めっきによ
りレジスト開口部に形成する。このとき、通電用電極と
して第1の半田拡散防止金属層44および接着金属層4
6を用いる。メッキ厚みは25μmである。Thereafter, as shown in FIG.
Using a μm plating resist layer 41, a resist opening is formed in the portion where the solder bump electrode is to be formed. Further, a solder layer 53 having a weight ratio of tin to lead of 63:37 is formed in the resist opening by electroplating. At this time, the first solder diffusion preventing metal layer 44 and the adhesive metal layer 4
6 is used. The plating thickness is 25 μm.
【0035】次に、図18に示すように、レジスト剥離
液を用いてメッキ用レジストを除去し、半田層と第1の
半田拡散防止金属層44とをマスクとして第2の半田拡
散防止金属層45および接着金属層46の露出部をそれ
ぞれの専用のエッチング液を用いてエッチング除去して
パターニングする。Next, as shown in FIG. 18, the plating resist is removed by using a resist stripper, and the second solder diffusion preventing metal layer is formed by using the solder layer and the first solder diffusion preventing metal layer 44 as a mask. The exposed portions of the adhesive metal layer 45 and the adhesive metal layer 46 are removed by etching using respective dedicated etching solutions, and are patterned.
【0036】最後に、図19に示すように、半田層53
を窒素雰囲気中で240℃に加熱してリフローすること
により半田突起電極47を形成する。以上の工程により
図14に示す電子部品の半田突起電極構造を実現するこ
とができる。Finally, as shown in FIG.
Is heated to 240 ° C. in a nitrogen atmosphere and reflowed to form solder bump electrodes 47. Through the above steps, the solder bump electrode structure of the electronic component shown in FIG. 14 can be realized.
【0037】なお上述の例では、半田拡散防止金属層領
域のうち、半田に濡れる領域がその中央部付近にあり、
半田に濡れない領域がその周辺部にある。しかしなが
ら、本発明では、このような構成に限定することなく、
所定のピッチで配列される半田突起電極構造において、
半田に濡れない領域は、少なくとも互いに隣接する領域
に設けられていることが好ましい。このことは、半田拡
散防止金属層領域のうち、他の半田突起電極に隣接しな
い領域には、半田に濡れる領域が設けられていても良い
ことを示す。In the above-mentioned example, the solder wetted area of the solder diffusion preventing metal layer area is near the center of the area.
There is an area that is not wet by solder at the periphery. However, in the present invention, without being limited to such a configuration,
In the solder bump electrode structure arranged at a predetermined pitch,
The regions that are not wet by the solder are preferably provided at least in regions adjacent to each other. This indicates that, in the solder diffusion preventing metal layer region, a region that is not adjacent to another solder bump electrode may be provided with a region that is wet with solder.
【0038】[0038]
【発明の効果】以上説明したように、本発明の電子部品
の半田突起電極構造によれば、半田突起電極を微細化し
ても、隣接する半田突起電極同士の電気的短絡を起こす
ことがなく、微細ピッチの電極パッドに対しても、電極
プローブによる電気検査を容易に行うことが可能であ
り、半田突起電極を備えた電気部品を実現することがで
きる。As described above, according to the solder bump electrode structure of the electronic component of the present invention, even if the solder bump electrodes are miniaturized, an electric short circuit between adjacent solder bump electrodes does not occur. Electrical inspection using an electrode probe can be easily performed even on an electrode pad having a fine pitch, and an electrical component having a solder bump electrode can be realized.
【図1】 本発明の電子部品の半田突起電極構造の一例
を表す概略断面図FIG. 1 is a schematic cross-sectional view illustrating an example of a solder bump electrode structure of an electronic component of the present invention.
【図2】 本発明の電子部品の半田突起電極形成前の様
子を上から見た図FIG. 2 is a top view of the electronic component of the present invention before solder bump electrodes are formed.
【図3】 図1の電子部品の半田拡散防止金属層形成前
の状態を表す概略断面図FIG. 3 is a schematic cross-sectional view showing a state before a solder diffusion preventing metal layer is formed on the electronic component of FIG. 1;
【図4】 半田拡散防止金属層全体が半田に濡れやすく
なっている電子部品の一例を表す概略断面図FIG. 4 is a schematic cross-sectional view illustrating an example of an electronic component in which the entire solder diffusion preventing metal layer is easily wetted by solder.
【図5】 図4の電子部品の半田拡散防止金属層形成前
の状態を表す概略断面図5 is a schematic cross-sectional view showing a state before the formation of a solder diffusion preventing metal layer of the electronic component of FIG. 4;
【図6】 本発明の電子部品の半田突起電極構造の一例
を形成する工程を説明するための図FIG. 6 is a view for explaining a step of forming an example of a solder bump electrode structure of the electronic component of the present invention.
【図7】 本発明の電子部品の半田突起電極構造の一例
を形成する工程を説明するための図FIG. 7 is a view for explaining a step of forming an example of a solder bump electrode structure of an electronic component according to the present invention.
【図8】 本発明の電子部品の半田突起電極構造の一例
を形成する工程を説明するための図FIG. 8 is a view for explaining a step of forming an example of a solder bump electrode structure of an electronic component according to the present invention.
【図9】 本発明の電子部品の半田突起電極構造の一例
を形成する工程を説明するための図FIG. 9 is a view for explaining a step of forming an example of a solder bump electrode structure of the electronic component of the present invention.
【図10】 本発明の電子部品の半田突起電極構造の一
例を形成する工程を説明するための図FIG. 10 is a view for explaining a step of forming an example of a solder bump electrode structure of the electronic component of the present invention.
【図11】 本発明の電子部品の半田突起電極構造の一
例を形成する工程を説明するための図FIG. 11 is a view for explaining a step of forming an example of a solder bump electrode structure of the electronic component of the present invention.
【図12】 本発明の電子部品の半田突起電極構造の一
例を形成する工程を説明するための図FIG. 12 is a view for explaining a step of forming an example of a solder bump electrode structure of an electronic component according to the present invention.
【図13】 本発明の電子部品の半田突起電極構造の一
例を形成する工程を説明するための図FIG. 13 is a view for explaining a step of forming an example of the solder bump electrode structure of the electronic component of the present invention.
【図14】 本発明の電子部品の半田突起電極構造の他
の例を表す概略断面図FIG. 14 is a schematic cross-sectional view illustrating another example of the solder bump electrode structure of the electronic component of the present invention.
【図15】 本発明の電子部品の半田突起電極構造の他
の例を形成する工程を説明するための図FIG. 15 is a view for explaining a step of forming another example of the solder bump electrode structure of the electronic component of the present invention.
【図16】 本発明の電子部品の半田突起電極構造の他
の例を形成する工程を説明するための図FIG. 16 is a view for explaining a step of forming another example of the solder bump electrode structure of the electronic component of the present invention.
【図17】 本発明の電子部品の半田突起電極構造の他
の例を形成する工程を説明するための図FIG. 17 is a view for explaining a step of forming another example of the solder bump electrode structure of the electronic component of the present invention.
【図18】 本発明の電子部品の半田突起電極構造の他
の例を形成する工程を説明するための図FIG. 18 is a view for explaining a step of forming another example of the solder bump electrode structure of the electronic component of the present invention.
【図19】 本発明の電子部品の半田突起電極構造の他
の例を形成する工程を説明するための図FIG. 19 is a view for explaining a step of forming another example of the solder bump electrode structure of the electronic component of the present invention.
11…電子部品 12…絶縁保護膜 13,39…電極パッド 14,44…第1の半田拡散防止金属層 15,45…第2の半田拡散防止金属層 17,37,47…半田突起電極 18…開口部 21,41…めっき用レジスト 22…レジスト開口部 23,53…半田層 25…エッチング用レジスト 30…半田拡散防止金属層 46…接着金属層 DESCRIPTION OF SYMBOLS 11 ... Electronic component 12 ... Insulation protective film 13, 39 ... Electrode pad 14, 44 ... 1st solder diffusion prevention metal layer 15, 45 ... 2nd solder diffusion prevention metal layer 17, 37, 47 ... Solder projection electrode 18 ... Openings 21, 41: Plating resist 22: Resist opening 23, 53 ... Solder layer 25: Etching resist 30: Solder diffusion preventing metal layer 46: Adhesive metal layer
───────────────────────────────────────────────────── フロントページの続き (72)発明者 高木 亜矢子 神奈川県横浜市磯子区新磯子町33番地 株 式会社東芝生産技術研究所内 (72)発明者 山田 浩 神奈川県横浜市磯子区新磯子町33番地 株 式会社東芝生産技術研究所内 (72)発明者 宮城 武史 神奈川県横浜市磯子区新磯子町33番地 株 式会社東芝生産技術研究所内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Ayako Takagi 33, Shinisogocho, Isogo-ku, Yokohama-shi, Kanagawa Prefecture Inside Toshiba Production Technology Research Institute Co., Ltd. (72) Inventor Hiroshi Yamada 33, Shinisogocho, Isogo-ku, Yokohama-shi, Kanagawa Prefecture Address: Toshiba Production Technology Laboratory Co., Ltd. (72) Inventor: Takeshi Miyagi 33, Shinisogo-cho, Isogo-ku, Yokohama-shi, Kanagawa Pref.
Claims (4)
ド、該電極パッド上に設けられ、開口部を有する絶縁保
護膜、該絶縁保護膜と該開口部の電極パッド上に設けら
れた半田拡散防止金属層、及び該半田拡散防止金属層上
に設けられた半田突起電極を具備する電子部品におい
て、前記半田拡散防止金属層は、前記半田突起電極と濡
れる領域と前記半田突起電極と濡れない領域とからな
り、かつ少なくとも前記開口部領域の中央部は前記半田
突起電極と濡れる領域からなることを特徴とする電子部
品。1. A substrate, an electrode pad provided on the substrate, an insulating protective film provided on the electrode pad and having an opening, and a solder provided on the insulating protective film and the electrode pad in the opening. In an electronic component having a diffusion prevention metal layer and a solder bump electrode provided on the solder diffusion prevention metal layer, the solder diffusion prevention metal layer does not wet the solder bump electrode and a region wet with the solder bump electrode. An electronic component, wherein at least a central portion of the opening region is a region wetted with the solder bump electrode.
ド、及び該電極パッド上に設けられ、開口部を有する絶
縁保護膜、該絶縁保護膜と該開口部の電極パッド上に設
けられた半田拡散防止金属層、及び該半田拡散防止金属
層上に設けられた半田突起電極を具備する電子部品にお
いて、前記半田拡散防止金属層は、前記半田突起電極と
濡れる領域と、前記半田突起電極と濡れない領域とから
なり、かつ前記半田突起電極の底面積は、前記開口部の
面積よりも小さいことを特徴とする電子部品。2. A substrate, an electrode pad provided on the substrate, an insulating protective film provided on the electrode pad and having an opening, and provided on the insulating protective film and the electrode pad in the opening. In a solder diffusion preventing metal layer, and an electronic component including a solder bump electrode provided on the solder diffusion preventing metal layer, the solder diffusion preventing metal layer has a region wetted with the solder bump electrode, and the solder bump electrode. An electronic component comprising a non-wetting area and a bottom area of the solder bump electrode being smaller than an area of the opening.
列され、前記半田拡散防止金属層は、前記絶縁保護膜と
前記開口部の電極パッド上に設けられた半田突起電極と
濡れない第1の半田拡散防止金属層と、該第1の半田拡
散防止金属層のうち、前記開口領域の中央部に形成され
た前記半田突起電極と濡れる第2の半田拡散防止金属層
とからなることを特徴とする請求項1に記載の電子部
品。3. The solder bump electrodes are arranged at a predetermined pitch, and the solder diffusion preventing metal layer is a first bump that does not wet the solder bump electrodes provided on the insulating protective film and the electrode pads in the openings. And a second solder diffusion preventing metal layer wetted with the solder bump electrode formed at the center of the opening area of the first solder diffusion preventing metal layer. The electronic component according to claim 1.
列され、前記半田拡散防止金属層は、前記絶縁保護膜と
前記開口部の電極パッド上に設けられた半田突起電極と
濡れる第2の半田拡散防止金属層と、該第2の半田拡散
防止金属層のうち、前記開口部領域の中央部を除いて形
成された前記半田突起電極と濡れない第1の半田拡散防
止金属層とからなることを特徴とする請求項1に記載の
電子部品。4. The solder bump electrode is arranged at a predetermined pitch, and the solder diffusion preventing metal layer is wetted by a solder bump electrode provided on the insulating protective film and the electrode pad in the opening. A solder diffusion preventing metal layer and a first solder diffusion preventing metal layer which is not wetted with the solder bump electrodes formed in the second solder diffusion preventing metal layer except for a central portion of the opening region. The electronic component according to claim 1, wherein:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10174097A JPH10294318A (en) | 1997-04-18 | 1997-04-18 | Electronic part |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10174097A JPH10294318A (en) | 1997-04-18 | 1997-04-18 | Electronic part |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10294318A true JPH10294318A (en) | 1998-11-04 |
Family
ID=14308656
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10174097A Pending JPH10294318A (en) | 1997-04-18 | 1997-04-18 | Electronic part |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10294318A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2775387A1 (en) * | 1998-02-26 | 1999-08-27 | Mitsubishi Electric Corp | SEMICONDUCTOR DEVICE HAVING SELF STRUCTURE AND MANUFACTURING METHOD |
WO2009027888A2 (en) * | 2007-08-24 | 2009-03-05 | Nxp B.V. | Solderable structure |
JP2009522573A (en) * | 2006-04-17 | 2009-06-11 | パイコム コーポレイション | Probe bonding method and probe card manufacturing method using the same |
JP2010177429A (en) * | 2009-01-29 | 2010-08-12 | Kyocera Corp | Wiring board, and probe card using the same |
KR20120109309A (en) * | 2011-03-23 | 2012-10-08 | 소니 주식회사 | Semiconductor device, method of manufacturing the same, and method of manufacturing wiring board |
-
1997
- 1997-04-18 JP JP10174097A patent/JPH10294318A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2775387A1 (en) * | 1998-02-26 | 1999-08-27 | Mitsubishi Electric Corp | SEMICONDUCTOR DEVICE HAVING SELF STRUCTURE AND MANUFACTURING METHOD |
JP2009522573A (en) * | 2006-04-17 | 2009-06-11 | パイコム コーポレイション | Probe bonding method and probe card manufacturing method using the same |
WO2009027888A2 (en) * | 2007-08-24 | 2009-03-05 | Nxp B.V. | Solderable structure |
WO2009027888A3 (en) * | 2007-08-24 | 2009-04-30 | Nxp Bv | Solderable structure |
JP2010177429A (en) * | 2009-01-29 | 2010-08-12 | Kyocera Corp | Wiring board, and probe card using the same |
KR20120109309A (en) * | 2011-03-23 | 2012-10-08 | 소니 주식회사 | Semiconductor device, method of manufacturing the same, and method of manufacturing wiring board |
JP2012204391A (en) * | 2011-03-23 | 2012-10-22 | Sony Corp | Semiconductor device, semiconductor device manufacturing method, and circuit board manufacturing method |
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