JPH0519984B2 - - Google Patents

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Publication number
JPH0519984B2
JPH0519984B2 JP62024919A JP2491987A JPH0519984B2 JP H0519984 B2 JPH0519984 B2 JP H0519984B2 JP 62024919 A JP62024919 A JP 62024919A JP 2491987 A JP2491987 A JP 2491987A JP H0519984 B2 JPH0519984 B2 JP H0519984B2
Authority
JP
Japan
Prior art keywords
power element
cover
power
metal layer
power component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62024919A
Other languages
Japanese (ja)
Other versions
JPS62193157A (en
Inventor
Zaipuraa Deiitaa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of JPS62193157A publication Critical patent/JPS62193157A/en
Publication of JPH0519984B2 publication Critical patent/JPH0519984B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

A power component such as a semiconductor or an IC is proposed which is provided with a heat-dissipating backing material and a cover. In contrast to the hitherto standard metal backing material, the latter is now composed of aluminium nitride having a thickness of 2 to 6 mm. The power component is preferably soldered onto a metal layer previously deposited on the backing material. The cover used is a thermosetting casting resin in which the power component, connecting wires and terminal pins are encapsulated. <IMAGE>

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体またはICのようなパワー素
子パツケージに関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to power device packages such as semiconductors or ICs.

従来の技術 公知のようにたとえば半導体またはICのよう
なパワー素子には多量の熱損失が発生し、連続動
作の際素子を損傷しないようにこの熱を素子から
導出しなければならない。この理由からパワー素
子を金属板に実装し、場合によりセラミツクまた
は同様の材料で絶縁し、それによつて損失熱を使
用した材料の高い熱伝導度によつてできるだけ早
く導出することができる。このようなパワー素子
の実装または後からの絶縁はもちろん非常に高価
である。BACKGROUND OF THE INVENTION As is known, large amounts of heat are lost in power components, such as semiconductors or ICs, which must be extracted from the component in order not to damage the component during continuous operation. For this reason, it is possible to mount the power element in a metal plate and optionally insulate it with ceramic or similar material, so that the heat losses can be drawn off as quickly as possible due to the high thermal conductivity of the material. The mounting or subsequent isolation of such power components is of course very expensive.

発明が解決しようとする問題点 本発明の目的は公知技術の上記欠点を除去する
ことである。Problems to be Solved by the Invention The aim of the invention is to obviate the above-mentioned drawbacks of the known technology.

問題点を解決するための手段 この問題点は、特許請求の範囲第１項に記載の
特徴により、即ちパワー素子パツケージがチツ化
アルミニウムからなる基体と熱硬化性注型樹脂か
らなるカバーから構成され、該パワー素子が基板
上に設けられた銅またはニツケルからなる金属層
に固定されかつ基体は一方の側に凹所を備え、そ
れに接続ピンが圧入またははんだ付けされている
ことによつて解決される。Means for Solving the Problem This problem can be solved by the feature set forth in claim 1, that is, the power element package is composed of a base made of aluminum nitride and a cover made of thermosetting casting resin. , the power element is fixed to a metal layer made of copper or nickel provided on a substrate, and the substrate is provided with a recess on one side, into which the connecting pin is press-fitted or soldered. Ru.

作 用 本発明によるパワー素子は基体が電気的絶縁体
なので、パワー素子の下面を電気的に絶縁し、そ
れにも拘わらず良好な熱結合を達成する可能性が
生ずる。Operation Since the power element according to the invention has a base body that is an electrical insulator, it is possible to electrically insulate the lower surface of the power element and still achieve good thermal coupling.

従属請求項に記載の手段によつて特許請求の範
囲第１項記載のパワー素子の有利な形成および改
善が可能である。基体を形成するチツ化アルミニ
ウムは高い熱伝導度を特徴とするので、チツ化ア
ルミニウムの厚さを２〜６mmの範囲に選択するの
が有利であり、この範囲内で選択する厚さは導出
すべき損失熱量に依存する。パワー素子は、チツ
化アルミニウムの基板上に設けられた金属層には
んだ付することができる。さらにこのような金属
層は適当なプリントおよびエツチング法で直接パ
ワー素子接続のための導体路および配置場所を形
成するため使用することができる。最後に、基体
は有利には、接続ピンの突出している側と反対側
で、その一部がカバーを備えておらず、この個所
に孔を有し、この孔によりパワー素子パツケージ
を台板等にねじで取付けることができる。 Advantageous embodiments and improvements of the power element according to claim 1 are possible by the measures described in the dependent claims. Since the aluminum titanide forming the substrate is characterized by high thermal conductivity, it is advantageous to choose the thickness of the aluminum titanium in the range from 2 to 6 mm, and the thickness selected within this range is derived. Depends on the amount of heat lost. The power element can be soldered to a metal layer provided on the aluminum nitride substrate. Furthermore, such metal layers can be used to form conductor tracks and locations for direct power component connections by suitable printing and etching methods. Finally, the basic body, on the side opposite to the protruding side of the connecting pin, a part of which is not provided with a cover, preferably has a hole at this location, by means of which the power component package can be connected to the base plate or the like. Can be installed with screws.

実施例 次に本発明の実施例を図面により説明する。図
示の実装したパワー素子はチツ化アルミニウムか
らなる厚さ約４mmのセラミツク板の形の基体１を
有する。基体１上にたとえば銅の金属層２があ
り、この層は厚膜としてまたは後続の電気メツキ
により強化する無電解メツキで設けられる。パワ
ー素子３は金属層２へははんだ付され、その際素
子３は金属層２が同時に配置場所として役立つよ
うに設定される。基体１に凹所が備えられ、ここ
へたとえば銅ブロンズからなる接続ピン４が圧入
され、またはあらかじめ凹所を金属化した後はん
だ付される。接続ピン４とパワー素子３の配置場
所の間はワイヤ５によつて結合され、このワイヤ
はパワー素子の配置場所にも接続ピン４にも超音
波によつて溶接される。最後に全体に熱硬化性注
型樹脂からなるカバー６を設け、その際接続ピン
４は１つの辺から突出し、基体１の反対側では基
体の一部がカバー６を備えず、孔７を有し、この
孔により実装したパワー素子をソケツト等へねじ
で取付けることができる。Embodiments Next, embodiments of the present invention will be described with reference to the drawings. The illustrated mounted power element has a base body 1 in the form of a ceramic plate made of aluminum nitride and approximately 4 mm thick. On the substrate 1 there is a metal layer 2, for example of copper, which is applied as a thick film or by electroless plating with subsequent reinforcement by electroplating. The power element 3 is soldered to the metal layer 2, the element 3 being set in such a way that the metal layer 2 simultaneously serves as a placement location. The basic body 1 is provided with a recess into which a connecting pin 4 made of, for example, copper bronze is pressed into or soldered after the recess has been previously metallized. The connection pin 4 and the power element 3 are connected by a wire 5, which is ultrasonically welded to both the power element and the connection pin 4. Finally, a cover 6 made of thermosetting resin is provided over the entire body, with the connecting pins 4 protruding from one side, and on the opposite side of the base body 1 a part of the base body is not provided with a cover 6 but has holes 7. This hole allows the mounted power device to be attached to a socket or the like with a screw.

前記のように基体１を形成するチツ化アルミニ
ウムは高い熱伝導度を特徴とし、さらにパワー素
子３は被覆した金属層２を介して基体１と結合し
ているので、損失熱は迅速に導出され、カバー６
を熱硬化性注型樹脂から製造することは容易に可
能である。さらにチツ化アルミニウムの熱膨張は
ケイ素のそれと良く適合するので、ケイ素チツプ
の熱負荷は機械的応力したがつて欠陥の原因にな
らない。 As mentioned above, the aluminum titanium oxide forming the base body 1 is characterized by high thermal conductivity, and furthermore, since the power element 3 is connected to the base body 1 via the coated metal layer 2, the lost heat can be quickly led out. , cover 6
can easily be manufactured from thermosetting casting resin. Furthermore, since the thermal expansion of aluminum nitride is well matched to that of silicon, thermal loads on silicon chips do not cause mechanical stress and therefore defects.

【図面の簡単な説明】[Brief explanation of the drawing]

図面は実装したパワー素子の一部切開いた斜視
図である。 １……基体、２……金属層、３……パワー素
子、４……接続ピン、５……ワイヤ、６……注型
樹脂、７……孔。 The drawing is a partially cutaway perspective view of the mounted power device. DESCRIPTION OF SYMBOLS 1... Base body, 2... Metal layer, 3... Power element, 4... Connection pin, 5... Wire, 6... Casting resin, 7... Hole.

Claims (1)

【特許請求の範囲】 １ チツ化アルミニウムからなる基体１と熱硬化
性注型樹脂からなるカバー６から構成され、パワ
ー素子３が基板１上に設けられた銅またはニツケ
ルからなる金属層２に固定されかつ基体は一方の
側に凹所を備え、それに接続ピン４が圧入または
はんだ付けされていることを特徴とするパワー素
子パツケージ。 ２ チツ化アルミニウムの基体１の厚さが２〜６
mmである特許請求の範囲第１項記載のパワー素子
パツケージ。 ３ 基体１がカバー６の外部に、実装したパワー
半導体の固定に使用される孔１０を有する特許請
求の範囲第１項または第２項記載のパワー素子パ
ツケージ。[Claims] 1 Consisting of a base 1 made of aluminum nitride and a cover 6 made of thermosetting resin, a power element 3 is fixed to a metal layer 2 made of copper or nickel provided on the substrate 1. A power element package characterized in that the base body has a recess on one side, into which a connecting pin 4 is press-fitted or soldered. 2 The thickness of the aluminum titanide substrate 1 is 2 to 6
The power element package according to claim 1, which is mm. 3. The power device package according to claim 1 or 2, wherein the base body 1 has a hole 10 outside the cover 6, which is used for fixing a mounted power semiconductor.
JP62024919A 1986-02-08 1987-02-06 Power device Granted JPS62193157A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3604075.4 1986-02-08
DE19863604075 DE3604075A1 (en) 1986-02-08 1986-02-08 Packaging of power components

Publications (2)

Publication Number Publication Date
JPS62193157A JPS62193157A (en) 1987-08-25
JPH0519984B2 true JPH0519984B2 (en) 1993-03-18

Family

ID=6293754

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62024919A Granted JPS62193157A (en) 1986-02-08 1987-02-06 Power device

Country Status (3)

Country Link
JP (1) JPS62193157A (en)
DE (1) DE3604075A1 (en)
IT (1) IT1202453B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05218233A (en) * 1992-02-06 1993-08-27 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
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Also Published As

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IT8719214A0 (en) 1987-01-30
JPS62193157A (en) 1987-08-25
DE3604075A1 (en) 1987-08-13
IT1202453B (en) 1989-02-09

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