JPH05144763A - Ion implantation method - Google Patents

Abstract

PURPOSE:To control depth of impurity introducing region and control spread of layer including impurity in order to facilitate microminiaturization of semiconductor element by applying a magnetic field to a part or the entire part of the space including a semiconductor layer while the ion is rotated. CONSTITUTION:A magnetic field H is applied perpendicular to the main surface of a silicon substrate surface 10 to allow the ion (i) to be incident thereon with an angle 0 to the direction of magnetic field H. The ion (i) having propagated in the magnetic field H rotates in a certain radius (r) perpendicular to the direction of magnetic field H and is then implanted into a silicon substrate 10, while drawing a spiral trace T. The implanted ion (i) into the silicon substrate 10 stops after it has advanced a certain distance, while losing the incident energy. Thereby, invasion of ion in the depth direction is controlled for the direction perpendicular to the surface of the semiconductor layer, the diffusion layer of the ion may be formed shallower and finally microminiaturization of semiconductor element can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ion implantation method used for manufacturing a semiconductor element, and more particularly, an ion implantation method used for manufacturing MOSFET (metal oxide semiconductor field effect transistor).

[0002]

As is well known, a semiconductor device usually has a structure including an impurity-containing layer. In manufacturing this semiconductor element, after introducing impurities into the semiconductor layer,
The impurities are activated by heat treatment to form the impurity-containing layer. The introduction of impurities into the semiconductor layer is the most important step. For high integration of LSI, for example, it is required that the introduction of impurities be controlled well and be shallow.

Further, as a method of introducing the impurities, there are a vapor phase or solid phase diffusion method and an ion implantation method. The ion implantation method can control the dose amount more accurately and the purity than the diffusion method. It is widely used because it can introduce high-impurity atoms.

The ion implantation technique for introducing impurities into the semiconductor layer is disclosed, for example, in "Ultra High Speed MOS Device" (Baifukan) P84-85 by Shin Kayama. Prior to this explanation, a P-channel MO will be described below.
Taking an SFET as an example, a conventional impurity introduction process will be briefly described with reference to FIGS. 2, 3 and 4.

First, as shown in FIG. 2A, an oxide film 12 is formed as a semiconductor layer on an N-type silicon substrate 10 by ordinary thermal oxidation. Next, in order to control the threshold voltage according to the design value, BF ₂ ions 14 are ion-implanted to form a channel region P as an impurity-containing layer.
^- (P minus) layer 16 is formed.

Next, a polysilicon film is deposited on the entire surface, and any suitable ion, such as phosphorus (P), which acts as an N-type impurity is contained in the polysilicon film.
Ions 18 are implanted to form an N ⁺ (N plus) polysilicon film 20 (FIG. 2B).

Further, the polysilicon film 20 and the oxide film 12 are patterned to form a gate electrode 22 and a gate oxide film 24. Further, BF ₂ ions 26 are implanted using the gate electrode 22 as a mask to form P ⁺ (P plus) diffusion layers (source / drain regions) 28a and 28b as impurity-containing layers in the substrate 10 (FIG. 3).
(A)).

Finally, after forming the insulating film 30, a contact hole is opened and the metal wiring 32 is formed by a usual vapor deposition method.
MOSFETs are completed by forming a, 32b, and 32c ((B) of FIG. 3).

Here, the broken line circle P in FIG. 3B is shown in FIG.
The enlarged view of the component part enclosed with is shown. In order to miniaturize the MOSFET, it is important to keep the depth of the diffusion layer (source / drain region) 28b (indicated by D in the figure) shown in FIG. 4 shallow. This means that the source / drain regions 28
The same can be said for a. The depth (D) of this diffusion layer largely depends on the incident energy of ions.

[0010]

However, in order to miniaturize the semiconductor element, the impurity-containing layer must be shallow, and therefore, for example, in the case of MOSFET, the depth D in FIG. 4 must be shallow. For that purpose, the acceleration voltage of the incident ions must be lowered.

However, as specified in the above-mentioned document, there is a limit to lowering the accelerating voltage, so that the MO
There was a limit to the miniaturization of SFETs.

An object of the present invention is to miniaturize a semiconductor element by suppressing the depth of an impurity introduction region as much as possible when forming an impurity-containing layer and suppressing undesired expansion of the impurity-containing layer. To provide the ion implantation method.

[0013]

In order to achieve this object, the present invention aims at forming an impurity-containing layer in a semiconductor layer, and in implanting ions into the semiconductor layer, one of the spaces containing the semiconductor layer is provided. It is characterized in that the ions are rotated while being applied by applying a magnetic field to all or all of them.

In practicing the present invention, it is preferable that the semiconductor layer is made of silicon, and it is preferable to implant ions while rotating them by applying a magnetic field. Further, in carrying out the present invention, it is preferable that this ion implantation is carried out in an ion implantation step for forming the source / drain regions of the MISFET.

[0015]

According to the above-described structure of the present invention, when the ions are introduced into the semiconductor layer, the magnetic field is applied to a part or the whole of the space including the semiconductor layer. At this time, if the ion implantation direction and the magnetic field direction are not parallel, the ions enter the substrate while rotating according to Fleming's law. Because of this rotation, the ions spend their incident energy (kinetic energy) on the travel distance of the rotation. Therefore, the penetration depth of the ions that have penetrated into the semiconductor layer is suppressed, and as a result, the source / drain regions can be thinned.

[0016]

Embodiments of the present invention will be described below with reference to the drawings. It should be noted that the drawings are only schematic representations of the shapes, sizes, and arrangement relationships of the respective constituent components to the extent that the present invention can be understood. In addition, the embodiment described here is
The specific operations described here are only examples,
The order and the specific numerical value are not limited to this, and a similar effect can be achieved even if a partial operation is added or deleted, or another operation and numerical value are replaced. You can

First, the semiconductor layer is, for example, a silicon substrate. FIG. 1A shows a silicon substrate, the direction of the magnetic field and the direction of implantation of implanted ions for the silicon substrate. In this embodiment, a magnetic field H is applied perpendicularly to the main plane of the silicon substrate surface 10 and ions i are made incident at an angle θ (theta) with the direction of the magnetic field H.

FIG. 1B is a diagram for explaining the behavior of ions when the ions i enter the substrate 10 under the action of the magnetic field H. As shown in FIG. 1B,
The ions i that have proceeded into the magnetic field H rotate in a direction with a radius r perpendicular to the direction of the magnetic field H, and have a spiral (spiral) shape.
It is injected into the silicon substrate 10 while drawing a locus T of. L schematically shows the trajectory of ions that have penetrated into the substrate. The ions i that have entered the silicon substrate 10 lose their incident energy (kinetic energy) and stop when they have advanced a certain distance.

Here, the angle θ formed by the direction of the magnetic field H and the incident direction of the implanted ions i may be any angle, but at 0 (zero), the ions do not rotate and become the same as normal ion implantation. There is no meaning because it ends up.

The angle α (alpha) formed by the magnetic field with the main plane of the silicon substrate 10 (shown in (A) of FIG. 1; α =
90 ° −θ) may be an arbitrary angle of 0 ° to 90 °, but in consideration of the fact that the implanted ions i move in the direction of the magnetic field while rotating, they are actually in the range of 45 ° to 90 °. Is desirable.

Further, since the radius of gyration r of the implanted ions i depends on the acceleration voltage of the implanted ions, the incident angle θ (theta), the strength of the magnetic field, the mass of the ions, etc., it is appropriately controlled according to the diffusion layer depth D. I have to do it.

Now, one ion is a silicon substrate 1
Assuming that the length of the spiral trajectory required to stop after being implanted at 0 is L, as shown in FIG. 1B, L is earned by rotating these ions, and the main plane of the substrate is obtained. Implantation of ions in the direction orthogonal to, that is, in the depth direction is suppressed.

FIG. 5 is a diagram showing a comparison of the penetration depth Z1 of ions into the substrate by the method of the present invention and the penetration depth Z2 of the conventional method. When ions are implanted into the substrate 10 at the same ion acceleration voltage, the penetration depth of the ions i is Z2>Z1> 0. As a result, according to the method of the present invention, for example, the source / drain regions as the impurity-containing layer can be formed shallower than before.

It is obvious that the invention is not limited to the embodiments described above, but many variants or modifications can be made. For example, although the semiconductor substrate has been described as an example of the semiconductor layer, it may be a semiconductor layer or a region for forming an impurity metal layer other than the silicon substrate. Further, the example of B (boron) has been described as the ion, but any ion such as arsenic (As) ion may be used as long as it is an implantation ion usually used for forming a semiconductor element. Furthermore, the direction of the magnetic field need not be orthogonal to the plane of incidence of the ions. Further, the strength of the magnetic field H and the acceleration voltage of the ions may be set appropriately according to the design. Further, the present invention can be applied not only to the ion implantation process for manufacturing the MOSFET, but also to the ion implantation process for other semiconductor elements such as MISFET that require an impurity-containing layer.

[0025]

As is apparent from the above description, when the ions are implanted into the semiconductor layer while the ions are implanted while applying a magnetic field, the ions are implanted while rotating.
Therefore, the penetration of ions in the depth direction in the direction orthogonal to the surface of the semiconductor layer is suppressed, and as a result, the ion diffusion layer can be made shallow, and finally the semiconductor element can be miniaturized.

[Brief description of drawings]

FIG. 1A is an explanatory diagram showing an example of a relationship between a magnetic field direction and an ion implantation direction, and FIG. 1B is an explanatory diagram showing a behavior of implanted ions in the present invention.

2A and 2B are manufacturing process diagrams of a conventional MOSFET.

3A and 3B are conventional MOSs following FIG.
It is a manufacturing process figure of FET.

FIG. 4 is an explanatory diagram showing an enlarged part P of FIG.

FIG. 5 is an explanatory diagram of a penetration depth of implanted ions.

[Explanation of symbols]

10: Silicon substrate 12: Oxide film 14: BF ₂ ion 15: Ion 16: P ⁻ (P minus) layer 18: P (phosphorus) ion 20: N ⁺ (N plus) polysilicon film 22: Gate electrode 24: Gate Oxide film 26: BF ₂ ions 28a: P ⁺ (P plus) diffusion layer (source / drain region) 28b: P ⁺ (P plus) diffusion layer (source / drain region) 30: Insulating film 32a: Metal wiring 32b: Metal Wiring 32c: Metal wiring D: Depth of diffusion layer H: Magnetic field T: Trajectory of advancing ions in a spiral shape i: Implanted ions L: Length of trajectory of ions penetrating into substrate Z1: Depth of penetration according to the present invention Z2 : Depth of penetration by the conventional method θ: Direction of magnetic field and angle formed by implanted ions α: Angle formed by substrate and implanted ions (α = 90 ° -θ)

Claims (3)

[Claims] 1. To form an impurity-containing layer in a semiconductor layer, when implanting ions into the semiconductor layer, a magnetic field is applied to a part or all of a space including the semiconductor layer to remove the ions. An ion implantation method characterized by implanting while rotating. 2. An ion implantation method, wherein the semiconductor layer according to claim 1 is made of silicon. 3. The ion implantation according to claim 1 is MISF.
An ion implantation method, which is performed in an ion implantation step for forming a source / drain region of ET.