JPH05121455A - Compound semiconductor device - Google Patents

Compound semiconductor device

Info

Publication number
JPH05121455A
JPH05121455A JP31182891A JP31182891A JPH05121455A JP H05121455 A JPH05121455 A JP H05121455A JP 31182891 A JP31182891 A JP 31182891A JP 31182891 A JP31182891 A JP 31182891A JP H05121455 A JPH05121455 A JP H05121455A
Authority
JP
Japan
Prior art keywords
layer
semiconductor layer
doped
undoped
doped semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31182891A
Other languages
Japanese (ja)
Inventor
Yoshikazu Nakagawa
義和 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP31182891A priority Critical patent/JPH05121455A/en
Priority to US07/929,883 priority patent/US5313093A/en
Priority to DE69223017T priority patent/DE69223017T2/en
Priority to EP92114856A priority patent/EP0539693B1/en
Priority to CA 2078940 priority patent/CA2078940C/en
Publication of JPH05121455A publication Critical patent/JPH05121455A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide a compound semiconductor device, having a HEMT structure, wherein its source resistance is reduced and its noise characteristic has been improved by the reduced source resistance. CONSTITUTION:A compound semiconductor device is provided with the following: an undoped semiconductor layer 2; a doped semiconductor layer 3 which has been formed on the undoped semiconductor layer 2, whose electron affinity is smaller than that of the undoped semiconductor layer 2 and which has been doped with impurities; a gate electrode 4 formed on the doped semiconductor layer 3; and a source electrode 6 and a drain electrode 7 which have been formed respectively on the doped semiconductor layer 3. An undoped substance layer 9 whose electron affinity is larger than that of the doped semiconductor layer 3 and a cap layer 5 is formed between the doped semiconductor layer 3 and the cap layer 5.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はHEMT(High Electr
onMobility Transistor)等の化合物半導体装置に関す
るものである。
The present invention relates to HEMT (High Electr)
onMobility Transistor) and the like.

【0002】[0002]

【従来の技術】ヘテロ接合界面に蓄積された2次元電子
ガスを利用した電界効果トランジスタとしてHEMT構
造が注目されている。このHEMT構造は図4に示すよ
うに基板1上にアンド−プの半導体層2と、それより電
子親和力が小さく、且つ不純物がド−プされたド−プ半
導体層3と、その上に形成されたゲ−ト電極4及びその
両側のキャップ層5上に形成されたソ−ス電極6及びド
レイン電極7から構成されており、このHEMT構造で
は電子親和力の小さいド−プ半導体層3に添加されたド
ナ−不純物は全てイオン化され、このイオン化により生
じた電子が電子親和力の大きなアンド−プ半導体層2と
のヘテロ界面に蓄積され2次元電子ガス8を形成してい
る。
2. Description of the Related Art A HEMT structure has been attracting attention as a field effect transistor utilizing a two-dimensional electron gas accumulated at a heterojunction interface. As shown in FIG. 4, this HEMT structure is formed on the substrate 1 by an undoped semiconductor layer 2, a doped semiconductor layer 3 having a smaller electron affinity and doped with impurities, and an impurity doped region 3 formed thereon. The gate electrode 4 and the source electrode 6 and the drain electrode 7 formed on the cap layer 5 on both sides of the gate electrode 4 are added to the doped semiconductor layer 3 having a small electron affinity in this HEMT structure. The formed donor impurities are all ionized, and the electrons generated by this ionization are accumulated at the hetero interface with the AND semiconductor layer 2 having a large electron affinity to form a two-dimensional electron gas 8.

【0003】この2次元電子ガス8はゲ−ト電極4に電
圧を印加することにより制御することができ、これによ
りソ−ス・ドレイン間に流れる電流を制御することがで
きる。このとき、ソ−スから流れる電流はI1、I2で
示す如く複数経路を通って2次元電子ガス8へ流れる。
The two-dimensional electron gas 8 can be controlled by applying a voltage to the gate electrode 4, and thus the current flowing between the source and drain can be controlled. At this time, the current flowing from the source flows into the two-dimensional electron gas 8 through a plurality of paths as indicated by I1 and I2.

【0004】図5は図4のHEMTのエネルギ−バンド
を示しており、そのうち(イ)はX−X’断面、(ロ)
はY−Y’断面の各エネルギ−バンド図である。尚、こ
れらの図においてEFはフェルミレベルを示す。
FIG. 5 shows energy bands of the HEMT shown in FIG. 4, of which (a) is a cross section taken along line XX 'and (b).
Are energy band diagrams of the YY 'cross section. In these figures, EF indicates Fermi level.

【0005】[0005]

【発明が解決しようとする課題】ところで、ド−プ半導
体層3は完全にイオン化された状態にあるため電子はキ
ャップ層5と2次元電子ガス8との間、即ち完全にイオ
ン化されたド−プ半導体層3をトンネル効果でもって通
り抜けなければならない。そのため、ソ−ス抵抗が非常
に大きくなり、特に高周波帯域での雑音特性が低下して
しまうという欠点があった。
By the way, since the doped semiconductor layer 3 is in a completely ionized state, electrons are between the cap layer 5 and the two-dimensional electron gas 8, that is, a completely ionized doped region. It has to pass through the semiconductor layer 3 by the tunnel effect. Therefore, the source resistance becomes very large, and the noise characteristic is deteriorated particularly in the high frequency band.

【0006】本発明はこのような点に鑑みなされたもの
であって、ソ−ス抵抗を低減し、それによって雑音特性
を改善したHEMT構造の化合物半導体装置を提供する
ことを目的とする。
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a compound semiconductor device having a HEMT structure in which the source resistance is reduced and thereby the noise characteristics are improved.

【0007】[0007]

【課題を解決するための手段】上記の目的を達成するた
め本発明では、アンド−プ半導体層と、前記アンド−プ
半導体層上に形成され該アンド−プ半導体層よりも電子
親和力が小さく且つ不純物がド−プされたド−プ半導体
層と、前記ド−プ半導体層上に形成されたゲ−ト電極
と、前記ド−プ半導体層上にそれぞれ形成されたソ−ス
及びドレイン電極と、を有する化合物半導体装置におい
て、前記ド−プ半導体層と前記キャップ層との間に前記
ド−プ半導体層や前記キャップ層よりも電子親和力の大
きなアンド−プの物質層を形成している。
In order to achieve the above object, the present invention provides an AND semiconductor layer and an electron affinity smaller than that of the AND semiconductor layer formed on the AND semiconductor layer. A doped semiconductor layer doped with impurities, a gate electrode formed on the doped semiconductor layer, and source and drain electrodes formed on the doped semiconductor layer, respectively. In the compound semiconductor device having the above-mentioned, a material layer having an electron affinity higher than that of the doping semiconductor layer or the cap layer is formed between the doping semiconductor layer and the cap layer.

【0008】[0008]

【作用】このような構成によると、ソ−ス側でキャップ
層を含む断面のエネルギ−バンドは全体的にポテンシャ
ルの下がったものとなる。そのためド−プ半導体層が完
全にイオン化されなくなり、そのド−プ半導体層の中央
部分に電子が残る。その分、ド−プ半導体層間を電子が
通り易くなり、ソ−ス抵抗は低くなる。
According to this structure, the energy band of the cross section including the cap layer on the source side has a lower potential as a whole. Therefore, the doped semiconductor layer is not completely ionized, and electrons remain in the central portion of the doped semiconductor layer. As a result, electrons easily pass through the doped semiconductor layers, and the source resistance becomes low.

【0009】[0009]

【実施例】本発明を実施した図1において、図4の従来
例と顕著に相違する点はキャップ層5とド−プ半導体層
3との間に新たな層9を設けている点である。この層9
はド−プ半導体層3やキャップ層5よりも電子親和力の
大きな物質で非常に薄く形成され、アンド−プの層とす
る。尚、この層9は例えば数10オングストロングの厚
さのアンド−プInGaAs層で形成される。
FIG. 1 in which the present invention is embodied is significantly different from the conventional example of FIG. 4 in that a new layer 9 is provided between the cap layer 5 and the doped semiconductor layer 3. . This layer 9
Is a material having a higher electron affinity than the doped semiconductor layer 3 and the cap layer 5, and is formed to be very thin, and is an anddope layer. The layer 9 is formed of, for example, an undoped InGaAs layer having a thickness of several tens of angstroms.

【0010】ここで、層9を薄く形成するのは、厚いと
結晶格子定数が大きくなって形成するのが難しいからで
ある。従って、比較的厚くても作成が容易であれば、敢
えて薄くしなくてもよい。図1において、その他の層の
物質を具体的に挙げておくと、アンド−プ半導体層2は
GaAs又はInGaAs、ド−プ半導体層3はn+の
AlGaAs、キャップ層5はGaAsである。
Here, the layer 9 is formed thin because it is difficult to form because the crystal lattice constant becomes large if the layer 9 is thick. Therefore, if it is relatively thick and easy to make, it need not be thinned. In FIG. 1, the materials of the other layers will be specifically described. The undoped semiconductor layer 2 is GaAs or InGaAs, the doped semiconductor layer 3 is n + AlGaAs, and the cap layer 5 is GaAs.

【0011】上述の層9を設けると、図1のX−X’断
面におけるエネルギ−バンドは図2に示すように全体の
ポテンシャルが下がり、ド−プ半導体層3は完全にはイ
オン化されず、その中央付近には電子が存在することに
なる。そのため、このド−プ半導体層3を電子が通り易
くなり、その分、ソ−ス側の抵抗が低減される。ノイズ
指数は、 NF=1+K(f/fT)√{gm(Rs+Rg)} で表わされる。尚、この式において、Kはフィッティン
グ定数、fは周波数、fTはカットオフ周波数、gmは
相互インダクタンス、Rsはソ−ス抵抗、Rgはゲ−ト
抵抗である。これから分かるように上記第1実施例のよ
うにソ−ス抵抗Rsが小さいHEMTではノイズが低減
されることになる。
When the above-mentioned layer 9 is provided, the entire potential of the energy band in the XX 'section of FIG. 1 is lowered as shown in FIG. 2, and the doped semiconductor layer 3 is not completely ionized. There are electrons near its center. Therefore, electrons easily pass through the doped semiconductor layer 3, and the resistance on the source side is reduced accordingly. The noise index is represented by NF = 1 + K (f / fT) √ {gm (Rs + Rg)}. In this equation, K is a fitting constant, f is a frequency, fT is a cutoff frequency, gm is a mutual inductance, Rs is a source resistance, and Rg is a gate resistance. As can be seen from the above, noise is reduced in the HEMT having a small source resistance Rs as in the first embodiment.

【0012】次に、図3はアンド−プ半導体層が2重に
なっているHEMTに上述した層9を設けたものであ
り、この場合にも同様な効果を生じる。図3においてア
ンド−プ半導体層2aは例えばInGaAsで形成さ
れ、2bはAlGaAsで形成される。更に、基板1と
アンド−プ半導体層2aとの間にGaAsから成るバッ
ファ層を介在させてもよい。
Next, FIG. 3 shows a HEMT having two undoped semiconductor layers provided with the above-mentioned layer 9, and in this case, a similar effect is produced. In FIG. 3, the undoped semiconductor layer 2a is made of, for example, InGaAs, and 2b is made of AlGaAs. Further, a buffer layer made of GaAs may be interposed between the substrate 1 and the undoped semiconductor layer 2a.

【0013】[0013]

【発明の効果】以上説明した通り本発明の化合物半導体
装置によれば、ソ−ス抵抗が小さくなり、ノイズ指数が
改善されるという効果がある。
As described above, the compound semiconductor device of the present invention has the effects of reducing the source resistance and improving the noise index.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明を実施したHEMT構造の化合物半導
体装置の構造図。
FIG. 1 is a structural diagram of a HEMT structure compound semiconductor device embodying the present invention.

【図2】 そのX−X’断面におけるエネルギ−バンド
図。
FIG. 2 is an energy band diagram in the XX ′ cross section.

【図3】 本発明の他の実施例の構造図。FIG. 3 is a structural diagram of another embodiment of the present invention.

【図4】 従来例の構造図。FIG. 4 is a structural diagram of a conventional example.

【図5】 そのX−X’断面及びY−Y’断面における
エネルギ−バンド図。
FIG. 5 is an energy band diagram in the XX ′ cross section and the YY ′ cross section.

【符号の説明】[Explanation of symbols]

1 基板 2、2a、2b アンド−プ半導体層 3 ド−プ半導体層 4 ゲ−ト電極 5 キャップ層 6 ソ−ス電極 7 ドレイン電極 8 2次元電子ガス 9 アンド−プの物質層。 DESCRIPTION OF SYMBOLS 1 Substrate 2, 2a, 2b AND semiconductor layer 3 Dope semiconductor layer 4 Gate electrode 5 Cap layer 6 Source electrode 7 Drain electrode 8 Two-dimensional electron gas 9 AND material layer.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】アンド−プ半導体層と、前記アンド−プ半
導体層上に形成され該アンド−プ半導体層よりも電子親
和力が小さく且つ不純物がド−プされたド−プ半導体層
と、前記ド−プ半導体層上に形成されたゲ−ト電極と、
前記ド−プ半導体層上に形成されたキャップ層と、前記
キャップ層上にそれぞれ形成されたソ−ス及びドレイン
電極と、を有する化合物半導体装置において、 前記ド−プ半導体層と前記キャップ層との間に前記ド−
プ半導体層や前記キャップ層よりも電子親和力の大きな
アンド−プの物質層を形成したことを特徴とする化合物
半導体装置。
1. An undoped semiconductor layer, a doped semiconductor layer formed on the undoped semiconductor layer, having an electron affinity smaller than that of the undoped semiconductor layer, and doped with impurities. A gate electrode formed on the doped semiconductor layer,
A compound semiconductor device having a cap layer formed on the doped semiconductor layer, and a source and drain electrode respectively formed on the cap layer, wherein the doped semiconductor layer and the cap layer are provided. Between the
A compound semiconductor device, wherein an undoped material layer having a higher electron affinity than the semiconductor layer and the cap layer is formed.
【請求項2】前記アンド−プの物質層の層厚は数10オ
ングストロ−ムであることを特徴とする請求項1に記載
の化合物半導体装置。
2. The compound semiconductor device according to claim 1, wherein the layer thickness of the undoped material layer is several tens of angstroms.
【請求項3】前記アンド−プ半導体層はInGaAs層
とGaAs層のいずれかの層から成り、前記ド−プ半導
体層はn+のAlGaAs層、前記キャップ層はGaA
s層、前記アンド−プの物質層はInGaAs層から成
ることを特徴とする請求項1又は請求項2に記載の化合
物半導体装置。
3. The undoped semiconductor layer is composed of either an InGaAs layer or a GaAs layer, the doped semiconductor layer is an n + AlGaAs layer, and the cap layer is GaA.
3. The compound semiconductor device according to claim 1, wherein the s layer and the material layer of the undope are InGaAs layers.
JP31182891A 1991-10-29 1991-10-29 Compound semiconductor device Pending JPH05121455A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP31182891A JPH05121455A (en) 1991-10-29 1991-10-29 Compound semiconductor device
US07/929,883 US5313093A (en) 1991-10-29 1992-08-11 Compound semiconductor device
DE69223017T DE69223017T2 (en) 1991-10-29 1992-08-31 Compound semiconductor device
EP92114856A EP0539693B1 (en) 1991-10-29 1992-08-31 Compound semiconductor device
CA 2078940 CA2078940C (en) 1991-10-29 1992-09-23 Compound semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31182891A JPH05121455A (en) 1991-10-29 1991-10-29 Compound semiconductor device

Publications (1)

Publication Number Publication Date
JPH05121455A true JPH05121455A (en) 1993-05-18

Family

ID=18021893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31182891A Pending JPH05121455A (en) 1991-10-29 1991-10-29 Compound semiconductor device

Country Status (2)

Country Link
JP (1) JPH05121455A (en)
CA (1) CA2078940C (en)

Also Published As

Publication number Publication date
CA2078940C (en) 1996-11-12
CA2078940A1 (en) 1993-04-30

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