JP3054216B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a semiconductor device that operates using a two-dimensional electron gas as a channel.

[0002]

2. Description of the Related Art AlGaAs / GaAs, AlGaAs
/ GaAs side of heterojunction interface such as InGaAs, In
A semiconductor device that operates using a two-dimensional electron gas generated on the GaAs side as a channel is a HEMT (High Elect).
ron Mobility Transistor). This HEMT can be classified into a normal HEMT and an inverted HEMT in structure. Both are
It can be classified according to the positional relationship between the gate electrode, the channel layer, and the carrier supply layer. Usually, in a HEMT, these layers are arranged in the order of a carrier supply layer and a channel layer from the gate electrode side. In the inverted-structure HEMT, these layers are arranged in the order of a channel layer and a carrier supply layer from the gate electrode side.

[0003] Inverse structure HEMTs are usually two times more expensive than HEMTs.
The two-dimensional electron gas is confined by the hetero barrier by the carrier supply layer, and the effect of confining the two-dimensional electron gas is large. Therefore, even if the gate length is reduced to 0.25 μm or less, the pinch-off characteristics are not impaired, and a decrease in transconductance and an increase in drain conductance due to the short channel effect hardly occur. For this reason,
It is more suitable as a high-speed logic element.

[0004] Such an inverted-structure HEMT is disclosed, for example, in Japanese Patent Application Laid-Open Publication No. 2001-209,973 (Japanese Journal of Applied Physics).
JOURNAL OF APPLIED PHYSI
CS) Vol. 27, no. 9 (19888.9), L1
742) and Reference 2 (IEE Transactions on Electron Devices (IE)
EE TRANSACTIONS ON ELECTR
ON DEVICES), VOL. 36, no. 10,
(10.1989), p. 2191). FIG. 3 is a cross-sectional view cited from Document 2.

This inverted structure HEMT is made of semi-insulating GaAs.
A buffer layer 17 comprising an undoped GaAs layer 13 and an undoped AlGaAs 15 is provided on a substrate 11, and an n-type AlGaAs carrier supply layer 19, an undoped AlGaAs spacer layer 21, an undoped GaAs channel layer 23, and an n-type GaAs cap are formed on the buffer layer 17. A layer 25 and an n ⁺ -type GaAs ohmic layer 27 in this order.
The gate electrode 31 is formed in the recess 29 formed up to 5.
The source / drain electrodes 33 are provided on both sides of the gate electrode 31 of the ohmic layer 27.

An important factor that determines the structure of the inverted HEMT is the thickness of each layer. The thicknesses and doping amounts of the n-type AlGaAs carrier supply layer 19, the undoped AlGaAs layer 21, the undoped GaAs channel layer 23, and the n-type GaAs cap layer 25 necessary for inducing the two-dimensional electrons constituting the channel are of course important. However, in order to operate this inverted structure HEMT reliably,
Undoped GaAs layer 1 constituting buffer layer 17
The thickness of each of the third and undoped AlGaAs layers 15 also becomes important.

In References 1 and 2, these undoped GaAs
Each film thickness of the s layer 13 and the undoped AlGaAs layer 15 is set to 100 nm. Also, an AlGaAs carrier supply layer 19, an undoped AlGaAs layer 21, an undoped GaAs channel layer 23, an n-type GaAs cap layer 2
5 and n ⁺ -type GaAs ohmic layers 27 are 8 nm, 4 nm, 20 nm, 5 nm from the carrier supply layer 19 side.
0 nm and 50 nm. FIG. 4A shows an energy band diagram of a portion under the gate electrode of the inverted structure HEMT having such a film thickness on the conduction band side. 4 in (A), E _F denotes a Fermi level.
The numbers 11 to 25 correspond to the numbers of the respective semiconductor layers in FIG. In the inverted structure HEMT of this configuration,
The two-dimensional electron gas is supplied to the interface between the n-type carrier supply layer 19 and the undoped GaAs channel layer 23, in fact, since the spacer layer 21 exists, the interface between the spacer layer 21 and the undoped GaAs channel layer 23 is closer to the undoped GaAs layer 23 (FIG. 4). (Part shown by middle P).

The reason that the thickness of each of the undoped GaAs layer 13 and the undoped AlGaAs layer 15 is set to 100 nm is that the HEMT having the reverse structure has an undoped GaAs layer.
If the thicknesses of the As layer 13 and the undoped AlGaAs layer 15 are further increased, electrons are induced at the interface between these layers, so that this is prevented. These layers 1
The problem in the case where the film thicknesses 3 and 15 are increased will be described below.

In this inverted HEMT, the GaAs substrate 1
It is considered that the lower end of the conduction band energy at the interface between 1 and the undoped GaAs layer 13 is fixed by the impurity level in the forbidden band generated when the growth of the undoped GaAs layer 13 starts. Further, it is considered that the Fermi level is fixed to a level lower than the lower end of the conduction band energy at the interface between the GaAs substrate 11 and the undoped GaAs layer 13 by about 0.7 eV.

In such a state, the undoped GaAs layer 13 and the undoped Al
FIG. 4B shows an energy band diagram of the inverted HEMT when only the thickness of the undoped GaAs layer 13 of the GaAs layer 15 is increased. Therefore, the undoped GaAs layer 13 and the undoped AlGaAs layer 1
At the interface with 5, the lower end of the conduction band energy is lower than the Fermi level, and electrons are induced here (FIG. 4).
(B) Indicated by Q in the middle. ).

In addition, the inverted structure HE in which the thicknesses of the undoped GaAs layer 13 and the undoped AlGaAs layer 15 are increased while maintaining the same thickness ratio as in FIG.
The energy band diagram of MT is ideally as shown in FIG. In this case, the undoped GaAs layer 13
Then, the lower end of the conduction band energy at the interface with the undoped AlGaAs layer 15 is higher than the Fermi level, so that electrons are not induced here. However, AlGa
It is known that film quality control is difficult when growing an As layer by a crystal growth method. This is probably because Al easily takes in impurities. In particular, when the thickness of the AlGaAs layer 15 is increased as in this example, the influence of impurities becomes significant.
In other words, the undoped AlGaAs layer 15 acts as a p-type or n-type layer, and the reverse structure HE
The actual energy band diagram of the MT is not as shown in FIG. The energy band diagram of FIG.
Is calculated assuming that it is an undoped AlGaAs layer, the portion corresponding to the layer 15 is a straight line, but this is not the case in practice.

For example, when the AlGaAs layer 15 has an n-type 1 *
When about 10 ¹⁶ / cm ^{3 is} doped, this Al
When the thickness of the GaAs layer is 300 nm or more, GaAs
The lower end of the conduction band energy at the interface between the layer 13 and the AlGaAs layer 15 becomes lower than the Fermi level, and electrons are also induced in this portion (not shown).

For the above reasons, the undoped GaAs layer 13 and the undoped AlGa
The thickness of each of the As layers 15 was about 100 nm at the maximum.

[0014]

However, the inverted structure HEMT having the structure described with reference to FIG. 3 cannot reduce the thickness of the buffer layer so much because of the above-described reasons. The structure is disadvantageous in that the resulting side gate breakdown voltage is improved. The reason is as follows.

The side gate effect means that when a negative voltage is applied to an electrode provided adjacent to an inverted structure HEMT, a current of a channel suddenly increases at a certain voltage (this voltage is referred to as “side gate breakdown voltage”). A phenomenon that decreases. In order to achieve high integration of a semiconductor integrated circuit, the higher the side gate breakdown voltage, the better. The cause of the side gate effect is, as described in the above-mentioned document 2, a GaAs substrate 11 and a semiconductor layer grown on this substrate (in the case of the configuration of FIG.
At the interface with the s-buffer layer 13), the hole charge moves via the impurity level due to the negative voltage of the adjacent electrode, and this movement affects the two-dimensional electrons forming the channel. . Therefore, in order to improve the side gate breakdown voltage, it is considered that the buffer layer should be thickened to increase the distance between the two-dimensional electron and the substrate. However, the buffer layer cannot be thickened for the above-described reason.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and an object of the present invention is to provide an inverted HEMT semiconductor device having an AlGaAs layer as one of the constituent layers of the buffer layer. An object of the present invention is to provide a semiconductor device capable of improving the side gate breakdown voltage while keeping the film thickness at about 100 nm at the maximum.

[0017]

According to the present invention, a buffer layer having a GaAs layer and an AlGaAs layer in this order from the substrate side is provided on a GaAs substrate. an n-type AlGaAs carrier supply layer, a channel layer comprising a semiconductor layer lattice-matched to the carrier supply layer and having a channel formed by electrons induced from the carrier supply layer, above the carrier supply layer; In a semiconductor device having a gate electrode and source / drain electrodes on both sides of the gate electrode, the G layer is formed in a GaAs layer of a buffer layer.
The semiconductor device is characterized by having at least one p-type semiconductor layer lattice-matched to the aAs layer and having a thickness and a concentration that do not cause conduction in the semiconductor layer.

In practicing the present invention, it is preferable that the thickness of the GaAs layer having the p-type semiconductor layer be at least 0.3 μm.

[0019]

According to the structure of the present invention, a p-type semiconductor layer which is a p-type semiconductor layer and has such a thickness and concentration that does not cause conduction in the semiconductor layer is provided in the GaAs buffer layer. Even if the thickness of the buffer layer portion below the p-type semiconductor layer is changed, the change in the energy band diagram of the semiconductor device portion above the p-type semiconductor layer becomes smaller than when the p-type semiconductor layer is not provided. Further, the potential of the GaAs buffer layer below the p-type semiconductor layer becomes closer to the potential of the substrate. This means that the thickness of the GaAs buffer layer below the p-type semiconductor layer can be increased without inducing electrons other than in the channel layer. Therefore, G
The thickness of the aAs layer should be at least 0.3 μm thick enough to reduce the effect of the transfer of hole charges at the interface between the GaAs substrate and the GaAs buffer layer on the two-dimensional electron gas.
Film thickness.

[0020]

Embodiments of the present invention will be described below with reference to the accompanying drawings. However, the drawings used in the description are merely schematic views so that the present invention can be understood.

FIG. 1 is a sectional view schematically showing the structure of the semiconductor device of the embodiment.

This semiconductor device has a semi-insulating GaAs substrate 41 (hereinafter referred to as "GaAs substrate 41" or "substrate 41").
May be abbreviated. ), A buffer layer 43 is provided thereon. This buffer layer 43 is formed of the substrate 4 in this embodiment.
A first undoped GaAs layer 45a having a thickness of 200 nm and a p-type semiconductor layer lattice-matched to the GaAs layer 45a and having a thickness and concentration such that conduction does not occur in the semiconductor layer; Type semiconductor layer 45b and film thickness 1
A GaAs buffer layer 45 composed of a second undoped GaAs layer 45c having a thickness of 00 nm;
100 nm thick undoped AlGaAs laminated on
An s-layer buffer layer 47 is provided. In this embodiment, the p-type semiconductor layer 45b has a thickness of 5 nm and a p-type impurity doping amount of 4 * 10 ¹⁷ / cm ^3.
It is composed of an s layer.

Further, the semiconductor device is an undoped AlG
On the aAs buffer layer 47, an n-type AlGaAs carrier supply layer 49, an undoped AlGaAs spacer layer 51,
An undoped GaAs channel layer 53, an n-type GaAs cap layer 55, and an n ⁺ -type GaAs ohmic layer 57 are provided in this order, and a gate electrode 6 is formed in a recess 59 formed from the surface of the ohmic layer 57 to the cap layer 55.
1 includes a source / drain electrode 63 on both sides of the gate electrode 61 of the ohmic layer 57.

N-type AlGaAs carrier supply layer 49, undoped AlGaAs spacer layer 51, undoped Ga
The thickness and the impurity concentration of each of the As channel layer 53, the n-type GaAs cap layer 55, and the n ⁺ -type GaAs ohmic layer 57 are the same as those in References 1 and 2.

The G of the semiconductor device of the embodiment having such a configuration is
In the p-type GaAs layer 45b in the aAs buffer layer 45,
No holes occur. Therefore, the p-type GaAs layer 4
Only negative charges of p-type impurities exist in 5b. The position of the lower end of the conduction band energy of the p-type GaAs layer 45b is determined by the negative charge. In particular, p-type GaAs
When the thickness of the layer 45b, the impurity concentration, and the position in the GaAs buffer layer 45 are set as described above, the p-type G
The position of the lower end of the conduction band energy of the aAs layer 45b is Ga
It is the same as that of the As substrate 41. p-type GaAs layer 45
The position of the lower end of the conduction band energy of the GaAs substrate 41
Is the same as that of the GaAs buffer layer 45, even if the thickness of the first undoped GaAs layer 45a is changed,
The energy band structure of the semiconductor device portion above the aAs layer 45b does not change. Therefore, the thickness of the first undoped GaAs 45a can be made larger than before without changing the energy band structure above the buffer layer. FIG. 2 shows this state only on the conduction band side. In FIG. 2, E _F is the Fermi level,
The numbers 41 to 55 correspond to the numbers of the respective semiconductor layers in FIG.

The p-type GaAs layer 45b is not limited to the above-described thickness and concentration. However, assuming that the layer 45b is thick enough to cause conduction in this layer or has an impurity concentration, the upper end E _V of the valence band energy of this layer is increased.
There cause deterioration of the characteristics of the hole occurs in this layer is higher than the Fermi level E _F This semiconductor device due.
On the other hand, if the layer is too thin, the effect of this layer cannot be obtained and the same effect will be obtained if this layer does not exist. The energy band diagram of the semiconductor device is as shown in FIG. 4B, and the energy band diagram of the GaAs buffer layer 45 and the AlGaAs buffer layer 47 is different. Electrons are induced at the interface, which also causes the characteristic degradation of the semiconductor device. Therefore, G
p-type GaAs layer 45b provided in aAs buffer layer 45
Is determined in consideration of these points.

In the semiconductor device of this embodiment, the thickness of the GaAs buffer layer 45 is increased by the provision of the first undoped GaAs layer 45a as compared with the conventional semiconductor device (shown in FIG. 3). Is wider than before. This is because the GaAs substrate 41 and the GaAs buffer layer 45 are affected by the voltage applied to the adjacent element.
This means that even if the hole charges move at the interface with the substrate, the degree of the influence of the movement affecting the two-dimensional electrons of the channel layer 23 can be reduced as compared with the related art. For this reason, the side gate breakdown voltage is improved as compared with the related art.

One of the causes of the frequency-dependent fluctuation of the gain in the low-frequency band (low-frequency gain fluctuation) in the inverted structure HEMT is the influence on the deep level channel of the substrate. Therefore, when the distance between the channel and the substrate is increased as in the present invention, the influence of the deep level of the substrate on the channel is reduced, and the low-frequency gain fluctuation can be reduced as compared with the conventional case.

Although the embodiment of the semiconductor device according to the present invention has been described above, the present invention is not limited to the above-described embodiment, and various modifications as described below can be added.

In the above embodiment, the GaAs buffer layer 45
Although the p-type semiconductor layer included therein is a p-type GaAs layer, this layer may be made of another material as long as it is lattice-matched to GaAs.

In the above embodiment, the GaAs buffer layer 45 includes only one p-type semiconductor layer.
Depending on the design, two or more layers may be used. Further, Ga
The conductivity type of the whole As buffer layer 45 is changed to p with a low impurity concentration.
It may be a type.

In the above-described embodiment, the buffer layer is formed as the first layer.
Undoped GaAs layer 45a, p-type GaAs layer 45
b, the second undoped GaAs layer 45c and the undoped AlGaAs layer 47, but layers other than these layers may be included in the buffer layer depending on the design. In the above embodiment, the spacer layer 21 is provided.
Of course, this need not be provided.

The constituent materials of the channel layer, the cap layer, and the ohmic layer are not limited to these, but may be other materials.
For example, it may be made of InGaAs.

Further, the film thickness and impurity concentration of each layer described in the above embodiment are merely examples within the scope of the present invention. Therefore, it is clear that these can be changed according to the design.

[0035]

As is clear from the above description, according to the semiconductor device of the present invention, the thickness and the thickness of the p-type semiconductor layer in the GaAs buffer layer are such that the semiconductor layer does not conduct. Since the p-type semiconductor layer having a high concentration is provided, even when the thickness of the buffer layer portion below the p-type semiconductor layer is changed, the energy band diagram of the semiconductor device portion above the p-type semiconductor layer greatly changes. do not do. Therefore,
The distance between the GaAs substrate and the two-dimensional electron gas can be increased by increasing the thickness of the buffer layer below the p-type semiconductor layer while keeping the thickness of the AlGaAs buffer layer at about 100 nm at the maximum. Therefore, the GaAs substrate and G
Since the extent to which the movement of the hole charges at the interface with the aAs buffer layer affects the two-dimensional electron gas can be reduced as compared with the related art,
The side gate breakdown voltage can be improved.

Further, when the distance between the channel and the substrate is increased as in the present invention, the influence of the deep level of the substrate on the channel is smaller than in the conventional case. Fluctuations can be made smaller than before.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining a semiconductor device according to an embodiment.

FIG. 2 is an energy band diagram of the semiconductor device of the embodiment.

FIG. 3 is a cross-sectional view for explaining a conventional semiconductor device.

FIGS. 4A to 4C are diagrams for explaining a conventional technique and its problems.

[Explanation of symbols]

41: GaAs substrate 43: buffer layer 45: GaAs buffer layer 45a: first undoped GaAs layer 45b: p-type semiconductor layer lattice-matched to GaAs, and a thickness and impurity concentration that do not cause conduction in the semiconductor layer P-type semiconductor layer 45c: second undoped GaAs layer 47: AlGaAs buffer layer 49: AlGaAs carrier supply layer 51: spacer layer 53: channel layer 55: cap layer 57: ohmic layer 59: recess 61: gate electrode 63: Source / drain electrode

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 29/778 H01L 21/338 H01L 29/812

Claims (2)

(57) [Claims] 1. A GaAs substrate is formed on a GaAs substrate from the substrate side.
a buffer layer having an s layer and an AlGaAs layer in this order; an n-type AlGaAs carrier supply layer provided on the buffer layer; and a semiconductor layer lattice-matched with the carrier supply layer above the carrier supply layer. A semiconductor device comprising a channel layer having a channel formed by electrons induced by the channel, a gate electrode above the channel layer, and source / drain electrodes on both sides of the gate electrode, wherein the GaAs is formed in the GaAs layer of the buffer layer. A semiconductor device having at least one p-type semiconductor layer lattice-matched with a layer and having a thickness and an impurity concentration that do not cause conduction in the semiconductor layer. 2. The semiconductor device according to claim 1, wherein said GaAs has at least one p-type semiconductor layer.
A semiconductor device, characterized in that the thickness of the layer is at least 0.3 μm.