JPH05121456A - Compound semiconductor device - Google Patents

Abstract

PURPOSE:To provide a compound semiconductor device, having a HEMT structure, wherein its source resistance is reduced and its noise characteristics are improved by the reduced source resistance. CONSTITUTION:A compound semiconductor device is provided with the following: an undoped semiconductor layer 2, a doped semiconductor layer 3 which has been formed on the undoped semiconductor layer 2, whose electron affinity is smaller than that of the undoped semiconductor layer 2 and which has been doped with impurities; a gate electrode 4 formed on the doped semiconductor layer 3; a cap layer 5 formed on the doped semiconductor layer 3; and a source electrode 6 and a drain electrode 7 which have been formed respectively on the cap layer 5. The semiconductor device is constituted so as to form a layer 9 whose composition and impurities are the same as those of the doped semiconductor layer 3 and whose impurity concentration is sufficiently higher than the impurity concentration of the doped semiconductor layer 3.

Description

Detailed Description of the Invention

[0001]

The present invention relates to HEMT (High Electr)
onMobility Transistor) and the like.

[0002]

2. Description of the Related Art A HEMT structure has been attracting attention as a field effect transistor utilizing a two-dimensional electron gas accumulated at a heterojunction interface. As shown in FIG. 5, this HEMT structure is formed on a substrate 1 by an undoped semiconductor layer 2, a doped semiconductor layer 3 having a smaller electron affinity than that, and an impurity being doped. The gate electrode 4 and the source electrode 6 and the drain electrode 7 formed on the cap layer 5 on both sides of the gate electrode 4 are added to the doped semiconductor layer 3 having a small electron affinity in this HEMT structure. The formed donor impurities are all ionized, and the electrons generated by this ionization are accumulated at the hetero interface with the AND semiconductor layer 2 having a large electron affinity to form a two-dimensional electron gas 8.

The two-dimensional electron gas 8 can be controlled by applying a voltage to the gate electrode 4, and thus the current flowing between the source and drain can be controlled. At this time, the current flowing from the source flows into the two-dimensional electron gas 8 through a plurality of paths as indicated by I1 and I2.

FIG. 6 shows energy bands, of which (a) is an energy band diagram of the XX 'section and (b) is an YY' section. In these figures, EF indicates Fermi level.

[0005]

By the way, since the doped semiconductor layer 3 is in a completely ionized state, electrons are between the cap layer 5 and the two-dimensional electron gas 8, that is, a completely ionized doped region. It has to pass through the semiconductor layer 3 by the tunnel effect. Therefore, the source resistance becomes very large, and the noise characteristic is deteriorated particularly in the high frequency band.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a compound semiconductor device having a HEMT structure in which the source resistance is reduced and thereby the noise characteristics are improved.

[0007]

To achieve the above object, the present invention provides an AND semiconductor layer and an electron affinity smaller than that of the AND semiconductor layer formed on the AND semiconductor layer. A doped semiconductor layer doped with impurities, a gate electrode formed on the doped semiconductor layer, and a cap layer formed on the doped semiconductor layer,
In a compound semiconductor device having a source and a drain electrode respectively formed on the cap layer, the same composition and the same impurities as the dopant semiconductor layer are provided between the dopant semiconductor layer and the cap layer. A layer having the impurity concentration sufficiently higher than the impurity concentration of the doped semiconductor layer is provided.

Further, according to the present invention, a layer having the same composition, the same impurities and the substantially same impurity concentration as those of the doped semiconductor layer is formed between the doped semiconductor layer and the cap layer, and the layer is formed. A high concentration planer doping may be provided in the vicinity of the center.

[0009]

Since the newly provided layer contains a high concentration of impurities, the potential of this layer is lowered, and the potential of the doped semiconductor layer is also lowered accordingly. And,
Near the center of the semiconductor layer, electrons are not completely depleted and electrons remain. Therefore, the electrons easily pass through the doped semiconductor layer, and the resistance value on the source side in the HEMT is reduced accordingly, and the noise characteristic is improved.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In FIG. 1 in which the present invention is implemented, a significant difference from the conventional example of FIG. 5 is that a new layer 9 is provided between the cap layer 5 and the doped semiconductor layer 3. . This layer 9
Has the same composition as the doped semiconductor layer 3 and the same impurities, but the impurity concentration is sufficiently higher than the impurity concentration of the doped semiconductor layer 3.

In FIG. 1, the undoped semiconductor layer 2 is G
The aAs and doped semiconductor layers 3 are made of n + AlGaAs, and the newly provided layer 9 is made of AlGaAs having a high impurity concentration. Incidentally, in the above, the AND semiconductor layer 2 may have a two-layer structure of an InGaAs layer and an AlGaAs layer. Further, a GaAs buffer layer may be added between the substrate 1 and the undoped semiconductor layer 2.

By the provision of the layer 9, X-
As shown in FIG. 2, the energy band of the X ′ cross section has a lower potential in the layer 9, so that the vicinity of the center of the doped semiconductor layer 3 is also lowered so that the electrons in the doped semiconductor layer 3 are dragged. Will remain. Therefore, the electrons traveling from the side of the cap layer 5 to the side of the doping layer 2 easily pass through the doping semiconductor layer 3. This means that the resistance on the source side has decreased.

The noise index is represented by NF = 1 + K (f / fT) √ {gm (Rs + Rg)}. In this equation, K is a fitting constant, f is a frequency, fT is a cutoff frequency, gm is a mutual inductance, Rs is a source resistance, and Rg is a gate resistance. As can be seen from the above, noise is reduced in the HEMT having a small source resistance Rs as in the first embodiment.

Next, in the second embodiment shown in FIG. 3, the layer 9 is composed of the same composition and the same impurities as the doped semiconductor layer 3.
The impurity concentration is substantially the same as that of the doped semiconductor layer, and instead, a high-concentration planar doped layer 10 of the same impurity is provided near the center of the layer 9. The configuration of the other parts is the same as in FIG.

According to this, the energy band in the XX 'section is as shown in FIG. 4, and there is a portion in the layer 9 where the potential sharply drops due to the planar dopant 10. As a result, the potential of the doped semiconductor layer 3 is also lowered, and electrons are present near the center of the doped semiconductor layer 3.
As in the case of the first embodiment shown in FIG. 1, the source resistance is lowered and the noise index is lowered.

[0016]

As described above, the compound semiconductor device of the present invention has the effects of reducing the source resistance and improving the noise index.

[Brief description of drawings]

FIG. 1 is a structural diagram of a HEMT structure compound semiconductor device embodying the present invention.

FIG. 2 is an energy band diagram in the XX ′ cross section.

FIG. 3 is a structural diagram of another embodiment of the present invention.

FIG. 4 is an energy band diagram in the XX ′ cross section.

FIG. 5 is a structural diagram of a conventional example.

FIG. 6 is an energy band diagram in the XX ′ section and the YY ′ section.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 substrate 2 AND semiconductor layer 3 dope semiconductor layer 4 gate electrode 5 cap layer 6 source electrode 7 drain electrode 8 two-dimensional electron gas 9 layer provided between the cap layer and the dope semiconductor layer 10 pre -Narp

Claims (2)

[Claims] 1. An undoped semiconductor layer, a doped semiconductor layer formed on the undoped semiconductor layer, having an electron affinity smaller than that of the undoped semiconductor layer, and doped with impurities. A gate electrode formed on the doped semiconductor layer,
A compound semiconductor device having a cap layer formed on the doped semiconductor layer, and a source and drain electrode respectively formed on the cap layer, wherein the doped semiconductor layer and the cap layer are provided. Between the
A compound semiconductor device, comprising a layer having the same composition and the same impurities as those of the doped semiconductor layer, wherein the impurity concentration is sufficiently higher than the impurity concentration of the doped semiconductor layer. 2. An undoped semiconductor layer, a doped semiconductor layer formed on the undoped semiconductor layer, having an electron affinity lower than that of the undoped semiconductor layer, and doped with impurities. A gate electrode formed on the doped semiconductor layer,
A compound semiconductor device having a cap layer formed on the doped semiconductor layer, and a source and drain electrode respectively formed on the cap layer, wherein the doped semiconductor layer and the cap layer are provided. Between the
A compound semiconductor device comprising: forming a layer having the same composition and the same impurities as those of a semiconductor layer and having substantially the same impurity concentration, and providing a high concentration planar dopant near the center of the layer.