JPH05102882A - Redundant system selecting circuit - Google Patents
Redundant system selecting circuitInfo
- Publication number
- JPH05102882A JPH05102882A JP25922391A JP25922391A JPH05102882A JP H05102882 A JPH05102882 A JP H05102882A JP 25922391 A JP25922391 A JP 25922391A JP 25922391 A JP25922391 A JP 25922391A JP H05102882 A JPH05102882 A JP H05102882A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- holding
- signal
- control signal
- selection control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、冗長系選択回路に関
し、特に比較的近距離に設置された伝送機器間において
系切替を行う冗長系選択回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a redundant system selection circuit, and more particularly to a redundant system selection circuit for system switching between transmission devices installed at relatively short distances.
【０００２】[0002]
【従来の技術】従来の伝送装置における冗長系選択回路
は、単に２−１選択回路を使用して伝送路Ａ及び伝送路
Ｂからの入力信号を系選択信号によって単純に切替を行
っていた。2. Description of the Related Art A redundant system selection circuit in a conventional transmission apparatus simply uses a 2-1 selection circuit to simply switch input signals from the transmission lines A and B by a system selection signal.
【０００３】２−１選択回路は通常知られている回路を
用いると切替時にその回路構成上瞬断が発生する。切替
時の瞬断は信号誤りの要因となるため、無瞬断切替が可
能な２−１選択回路（例えば、特開平２−２２４４１
３）が提案されており、従来においてはこのような回路
を使用して切替時の誤りを防ぐ方法もあった。この従来
の冗長系選択回路図を図３に示す。伝送路Ａ，Ｂの入力
信号は端子１，２からそれぞれ伝送路Ａ，Ｂを介して２
−１セレクタ８に入力される一方、端子３から２−１セ
レクタ８の選択端子８ａに入力された系選択制御信号Ｓ
によって伝送路Ａ，Ｂのどちらか一方が選択される。If a conventionally known circuit is used as the 2-1 selection circuit, a momentary interruption occurs due to the circuit configuration at the time of switching. Since a momentary interruption at the time of switching causes a signal error, a 2-1 selection circuit capable of non-instantaneous interruption switching (for example, Japanese Patent Laid-Open No. 22441/1990).
3) has been proposed, and in the past, there was also a method of using such a circuit to prevent an error at the time of switching. This conventional redundant system selection circuit diagram is shown in FIG. The input signals of the transmission lines A and B are 2 from the terminals 1 and 2 via the transmission lines A and B, respectively.
System selection control signal S input from the terminal 3 to the selection terminal 8a of the 2-1 selector 8 while being input to the -1 selector 8
Either one of the transmission lines A and B is selected by.
【０００４】この従来の回路において、２−１選択回路
として無瞬断切替が可能な回路を採用した場合のタイム
チャートを図４に示す。この従来例のように、伝送路
Ａ，Ｂの間に（ｔ5 −ｔ3 ）の位相差が発生している
時、系選択信号Ｓによる切替がｔ4 のタイミングでなさ
れた場合、冗長系選択回路の出力Ｙは図４に示す通りと
なる。FIG. 4 shows a time chart in the case where a circuit capable of non-instantaneous interruption switching is adopted as the 2-1 selection circuit in this conventional circuit. When a phase difference of (t 5 -t 3 ) occurs between the transmission lines A and B as in this conventional example, when the switching by the system selection signal S is performed at the timing of t 4 , the redundant system The output Y of the selection circuit is as shown in FIG.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、この出
力結果は後述するように信号誤りの原因となる。これを
防ぐためエラスティックストア等を用いて位相合わせを
行うこともできるが、このような従来技術の場合、回路
周辺が複雑になりがちであるという欠点を持っている。However, this output result causes a signal error as described later. To prevent this, it is possible to perform phase matching using an elastic store or the like, but in the case of such a conventional technique, there is a drawback that the circuit periphery tends to be complicated.
【０００６】２−１選択回路で単純に冗長系切替を行う
場合、伝送路Ａと伝送路Ｂの位相差、及び系選択信号Ｓ
による切替のタイミングによっては入力信号列と出力信
号列が異なる可能性があり、切替時の信号誤りを発生さ
せる原因となっていた。すなわち、図４のチイムチャー
トに示すようにｔ4 のタイミングで伝送路Ａから伝送路
Ｂへの切替を行った場合、ｔ3 〜ｔ4 の間は伝送路Ａの
信号（）が出力され、ｔ4 〜ｔ5 の間は伝送路Ｂの信
号（）が出力される。つまり、入力信号列は伝送路
Ａ，Ｂともに「…」となっているのに対して、
出力信号列は「…」となり、信号誤りとな
る。When the redundant system is simply switched by the 2-1 selection circuit, the phase difference between the transmission line A and the transmission line B and the system selection signal S
There is a possibility that the input signal sequence and the output signal sequence may differ depending on the switching timing due to, which causes a signal error at the time of switching. That is, when the transmission path A is switched to the transmission path B at the timing of t 4 as shown in the chime chart of FIG. 4, the signal () of the transmission path A is output from t 3 to t 4 , between t 4 ~t 5 is the signal of the transmission path B () is output. That is, while the input signal sequence is "..." on both transmission lines A and B,
The output signal string becomes "...", and a signal error occurs.
【０００７】これを防ぐためにエラスティックストアを
用いて位相合わせを行う従来技術では、データ以外に入
力データと同期した書込用クロックと書込用リセットパ
ルス、及び読出用クロックと読出用リセットパルスをエ
ラスティックストアに供給する必要がある。機能的には
２伝送路間の位相差が大きな場合でもエラスティックス
トアの容量範囲内であれば対応できる。In order to prevent this, in the prior art in which phase matching is performed by using an elastic store, a write clock and a write reset pulse, and a read clock and a read reset pulse, which are synchronized with the input data, are used in addition to the data. Need to supply to elastic store. Functionally, even if the phase difference between the two transmission paths is large, it can be accommodated within the capacity range of the elastic store.
【０００８】しかしながら、伝送機器が近距離に設置さ
れている場合では、それほど大きな位相差が発生するこ
とは考え難く、実装面においてもコスト面においても高
価になりがちであった。However, when the transmission equipment is installed at a short distance, it is unlikely that such a large phase difference will occur, and it tends to be expensive both in terms of mounting and cost.
【０００９】そこで、本発明の技術的課題は、信号誤り
を発生させずに系切替を行い、簡単な構成低コストの冗
長系選択回路を得ることにある。Therefore, a technical object of the present invention is to perform a system switching without generating a signal error and to obtain a redundant system selecting circuit having a simple structure and a low cost.
【００１０】[0010]
【課題を解決するための手段】本発明によれば、２つの
伝送路を介してそれぞれ伝送される２つの入力信号を受
け、一方の入力信号を選択することを制御する選択制御
信号に応じて一方の入力信号を選択して出力する選択手
段を備えた冗長系選択回路において、前記２つの入力信
号を受け、これら入力信号が同一か否かを比較し、同一
の場合にのみ保持指示信号を出力する比較手段と、該保
持指示信号に応じて前記選択制御信号を保持し、該保持
した信号を前記選択手段へ供給する保持手段とを有する
ことを特徴とする冗長系選択回路が得られる。According to the present invention, in response to a selection control signal for receiving two input signals respectively transmitted via two transmission lines and controlling selection of one input signal. In a redundant system selection circuit having a selection means for selecting and outputting one of the input signals, the two input signals are received, whether or not these input signals are the same is compared, and only when they are the same, a holding instruction signal is issued. A redundant system selection circuit having a comparison means for outputting and a holding means for holding the selection control signal according to the holding instruction signal and supplying the held signal to the selection means is obtained.
【００１１】[0011]
【作用】２つの伝送路からのそれぞれの信号は、比較手
段において比較される。保持手段は、この比較結果によ
って選択制御信号の保持／非保持を行う。The respective signals from the two transmission lines are compared by the comparison means. The holding means holds / unholds the selection control signal according to the comparison result.
【００１２】[0012]
【実施例】次に本発明の一実施例による冗長系選択回路
について図面を参照して説明する。図１は本発明の一実
施例による冗長系選択回路図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A redundant system selection circuit according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a redundant system selection circuit diagram according to an embodiment of the present invention.
【００１３】本発明の一実施例による冗長系選択回路
は、２つの伝送路の端子１１，１２を介してそれぞれ伝
送される２つの入力信号Ａ，Ｂを受け、遅延させる遅延
手段として作用する遅延用バッファ１６，１７と、選択
制御信号Ｓに応じて一方の入力信号を選択して出力する
選択手段として作用する２−１セレクタ１８とを備えて
いる。この冗長系選択回路は、更に、２つの入力信号
Ａ，Ｂを受け、これら入力信号Ａ，Ｂが時間ｔの内、あ
る時刻に同一か否かを比較し、同一の場合にのみ保持指
示信号を出力する比較手段として作用する比較器（排他
的ＮＯＲ回路）１４と、この保持指示信号１４−１に応
じて上述した選択制御信号Ｓを保持し、この保持した信
号を選択制御信号Ｓ−１として２−１セレクタ１８の選
択端子１８ａに供給する保持手段として作用するＲＳフ
リップフロップ回路１５ａ、インバータ１５ｂ、及びＮ
ＡＮＤ回路１５ｃから成る保持回路（Ｄフリップフロッ
プ回路）１５とを有する。２つの伝送路の端子１１，１
２には、伝送路Ａ，Ｂの信号が入力され、遅延用バッフ
ァ１６，１７を介して２−１選択回路８に入力される。
遅延用バッファは比較器１４並びに保持回路１５での動
作遅延による影響をなくすためのものであり、２−１選
択回路１８は従来例と同様の働きをするものである。切
替時の信号誤りを防ぐという目的を達成するために２−
１選択回路１８は無瞬断切替可能とする。The redundant system selection circuit according to one embodiment of the present invention receives the two input signals A and B respectively transmitted through the terminals 11 and 12 of the two transmission lines and delays them as delay means. Buffers 16 and 17 and a 2-1 selector 18 that functions as a selection unit that selects and outputs one input signal according to the selection control signal S. This redundant system selection circuit further receives two input signals A and B, compares these input signals A and B at a certain time within a time t, and compares them, and only when they are the same, a holding instruction signal. A comparator (exclusive NOR circuit) 14 that operates as a comparison means for outputting the above-described selection control signal, and the selection control signal S described above in accordance with the retention instruction signal 14-1 and retain the retained selection signal S-1. The RS flip-flop circuit 15a, the inverter 15b, and the N acting as holding means for supplying the selection terminal 18a of the 2-1 selector 18 as
A holding circuit (D flip-flop circuit) 15 including an AND circuit 15c is included. Two transmission line terminals 11 and 1
The signals of the transmission paths A and B are input to the input terminal 2 and are input to the 2-1 selection circuit 8 via the delay buffers 16 and 17.
The delay buffer is for eliminating the influence of the operation delay in the comparator 14 and the holding circuit 15, and the 2-1 selection circuit 18 has the same function as the conventional example. To achieve the purpose of preventing signal errors during switching 2-
The 1 selection circuit 18 can be switched without interruption.
【００１４】次に、この冗長系選択回路の動作を説明す
る。両伝送路から入力された信号は比較器１４にて比較
される。比較器１４は両入力が等しい時は“１”を出力
し、異なる場合は“０”を出力する。保持回路１５は比
較器１４からの入力が“１”の時には端子１３からの系
選択制御信号Ｓを非保持で出力し、逆に比較器１４から
の入力が“０”の時には出力を保持する。この保持回路
１５の出力を系選択制御信号Ｓ−１として２−１選択回
路１８の選択端子１８ａに入力する構成となっているた
め、伝送路Ａ，Ｂが等しい場合には系切替が可能となる
が、そうでない場合には切替を行わない。Next, the operation of this redundant system selection circuit will be described. The signals input from both transmission lines are compared by the comparator 14. The comparator 14 outputs "1" when both inputs are equal and outputs "0" when they are different. The holding circuit 15 outputs the system selection control signal S from the terminal 13 without holding when the input from the comparator 14 is "1", and conversely holds the output when the input from the comparator 14 is "0". .. Since the output of the holding circuit 15 is input to the selection terminal 18a of the 2-1 selection circuit 18 as the system selection control signal S-1, the system can be switched when the transmission lines A and B are the same. However, if not, switching is not performed.
【００１５】この冗長系選択回路の動作を図２のタイミ
ングチャートで説明する。このタイミングチャートでは
簡単化のため動作遅延を無視しているが、これは動作遅
延を相殺するための遅延バッファ１６，１７が作用して
いるからである。図２において、ｔ1 のタイミングで系
選択制御信号ＳがＬからＨに変化しているが、このタイ
ミングでは伝送路Ａ，Ｂの信号が異なっているため、２
−１選択回路１８に対する系選択制御信号Ｓ−１はＬに
保持され切替は発生しない。その後、ｔ2 のタイミング
で両伝送路の信号が等しくなった時に系選択制御信号Ｓ
−１がＬからＨに変化して前の伝送路Ａを保持していた
のが非保持となり伝送路Ｂに系切替される。このよう
に、系選択制御信号Ｓ−１のＬからＨへの立上りのタイ
ミングで切り替えることにより、出力信号は切替の前後
で値変化しないため、従来例で発生していた信号誤りを
防ぐことができる。The operation of the redundant system selection circuit will be described with reference to the timing chart of FIG. In this timing chart, the operation delay is ignored for simplification, but this is because the delay buffers 16 and 17 for canceling the operation delay act. In FIG. 2, the system selection control signal S changes from L to H at the timing of t 1 , but since the signals of the transmission lines A and B are different at this timing, 2
The system selection control signal S-1 for the -1 selection circuit 18 is held at L and switching does not occur. After that, when the signals of both transmission lines become equal at the timing of t 2 , the system selection control signal S
-1 changes from L to H and the previous transmission line A is held, but is not held and the system is switched to the transmission line B. In this way, by switching at the timing of the system selection control signal S-1 rising from L to H, the value of the output signal does not change before and after switching, so that the signal error that has occurred in the conventional example can be prevented. it can.
【００１６】[0016]
【発明の効果】以上説明したように本発明によれば、２
伝送路間の信号比較を行い、両信号が等しい場合のみ系
選択回路の切替制御が可能であるため、２伝送路間の位
相差が最大でも１クロック幅以内に収まる程度の近距離
に設置された伝送機器間において、切替時に信号誤りの
ない冗長系選択機能を比較的簡単でかつ経済的にできる
という効果を有する。As described above, according to the present invention, 2
It is possible to compare signals between transmission lines and switch control of the system selection circuit only when both signals are equal, so it is installed in a short distance where the phase difference between two transmission lines is within 1 clock width at the maximum. Further, there is an effect that a redundant system selecting function without a signal error at the time of switching between the transmission devices can be relatively simple and economical.
【図１】本発明の一実施例による冗長系選択回路図であ
る。FIG. 1 is a redundant system selection circuit diagram according to an embodiment of the present invention.
【図２】図１の本発明の回路によるタイミングチャート
である。FIG. 2 is a timing chart of the circuit of the present invention in FIG.
【図３】従来の冗長系選択回路図である。FIG. 3 is a conventional redundant system selection circuit diagram.
【図４】図３の従来の回路によるタイミングチャートで
ある。4 is a timing chart of the conventional circuit of FIG.
１，１１ 伝送路Ａの入力端子 ２，１２ 伝送路Ｂの入力端子 ３，１３ 系選択制御信号Ｓの入力端子 ８，１８ ２−１選択回路 ９，１９ 出力端子 １４ 比較器（排他的ＮＯＲ回路） １５ 保持回路（Ｄフリップフロップ回路） １６ 遅延用バッファ １７ 遅延用バッファ 1, 11 Input terminal of transmission path A 2, 12 Input terminal of transmission path B 3, 13 Input terminal of system selection control signal S 8, 18 2-1 Selection circuit 9, 19 Output terminal 14 Comparator (exclusive NOR circuit ) 15 holding circuit (D flip-flop circuit) 16 delay buffer 17 delay buffer
Claims (2)
る２つの入力信号を受け、一方の入力信号を選択するこ
とを制御する選択制御信号に応じて一方の入力信号を選
択して出力する選択手段を備えた冗長系選択回路におい
て、前記２つの入力信号を受け、これら入力信号が同一
か否かを比較し、同一の場合にのみ保持指示信号を出力
する比較手段と、該保持指示信号に応じて前記選択制御
信号を保持し、該保持した信号を前記選択手段へ供給す
る保持手段とを有することを特徴とする冗長系選択回
路。1. An input signal selected according to a selection control signal for controlling selection of one input signal, receiving two input signals respectively transmitted through two transmission lines, and outputting the selected one input signal. In a redundant system selection circuit including a selection means, a comparison means for receiving the two input signals, comparing whether these input signals are the same, and outputting a holding instruction signal only when they are the same, and the holding instruction signal. Holding circuit for holding the selection control signal in accordance with the above and supplying the held signal to the selecting circuit.
て、前記比較手段は、排他的ＮＯＲ回路から成り、前記
保持手段は、Ｄフリップフロップ回路から成ることを特
徴とする冗長系選択回路。2. The redundant system selection circuit according to claim 1, wherein the comparison means is an exclusive NOR circuit, and the holding means is a D flip-flop circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25922391A JPH05102882A (en) | 1991-10-07 | 1991-10-07 | Redundant system selecting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25922391A JPH05102882A (en) | 1991-10-07 | 1991-10-07 | Redundant system selecting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05102882A true JPH05102882A (en) | 1993-04-23 |
Family
ID=17331116
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25922391A Pending JPH05102882A (en) | 1991-10-07 | 1991-10-07 | Redundant system selecting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05102882A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003518682A (en) * | 1999-12-23 | 2003-06-10 | ピルツ ゲーエムベーハー アンド コー． | Circuit layout for safe disconnection of equipment, especially mechanical equipment |
-
1991
- 1991-10-07 JP JP25922391A patent/JPH05102882A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003518682A (en) * | 1999-12-23 | 2003-06-10 | ピルツ ゲーエムベーハー アンド コー． | Circuit layout for safe disconnection of equipment, especially mechanical equipment |
| JP4836381B2 (en) * | 1999-12-23 | 2011-12-14 | ピルツ ゲーエムベーハー アンド コー．カーゲー | Circuit arrangement for safe disconnection of equipment and safety switch device used therefor |
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