JPH05160878A - Loopback test system - Google Patents

Abstract

PURPOSE:To eliminate the need for the maintenance and the selection of a standby system without raising a fault alarm at the start of test and its release by delaying a phase of a test signal of an incoming transmission line by a prescribed quantity so as to match the phase with a phase of a signal from an outgoing transmission line. CONSTITUTION:A delay selection section 700 in the loopback test delays a test signal of an incoming transmission line by a prescribed quantity with a control signal from a control section 100 and stores the test signal to an elastic storage 800. Then the test signal stored in the timing storage 800 depending on the control signal of the signal of the outgoing transmission line and the test signal is sent to the outgoing transmission line via a selection section 130. Then the test signal sent to the incoming transmission line is compared and collated with the looped back test signal received from the outgoing transmission line to measure the deterioration in the signal due to the transmission line and a transmitter. Thus, it is not required to raise a line alarm at the start of the loopback test and at its release and an undesired maintenance and standby selection are eliminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a loopback test method in a transmission device. At this time, there is a demand for a loopback test method capable of performing a loopback test without issuing a line abnormality alarm at the start and release of the loopback test.

[0002]

2. Description of the Related Art FIG. 8 is a view for explaining a conventional folding back test method. When the loopback test of the transmission device 1 connected to the upstream and downstream transmission lines shown in FIG. 8 (A) is performed by the opposite transmission device (not shown), for example, from the opposite transmission device (not shown) Send a test signal to. Then, the selection unit (hereinafter referred to as SE
(Referred to as L) 2, select the test signal input from the upstream transmission path, send it to the downstream transmission path, and compare and collate the test signal transmitted by the opposing transmission device (not shown) with the return test signal. Therefore, the loopback test of the upstream and downstream transmission lines and the transmission device 1 was performed.

In this case, as the test signal, test data, a frame pulse (FP) indicating the beginning of the test data, and an enable pulse (E) indicating the effective range of the test data are used.
N) is used. At this time, as shown in FIG. 8 (B), when the signal received by the opposite transmission device (not shown) is changed from the normal signal in the downward direction to the test signal, or when the signal from the test signal is changed to the normal signal in the downward direction. When changing, the REC alarm (reception abnormality) will occur at the moment when the state changes because the phases are different.

[0004]

As described above, in the conventional turn-back test method, there is a problem that a REC alarm (reception abnormality) occurs at the moment of entering the test state and at the moment of canceling the test.

Therefore, an object of the present invention is to provide a loopback test method capable of performing a loopback test without issuing a line abnormality alarm at the start and cancellation of the loopback test.

[0006]

The above problems can be solved by the structure of the circuit shown in FIG. That is, in FIG. 1, 700 is a transmission device that is connected to upstream and downstream transmission lines, performs a loopback test by looping back a test signal input from one transmission line and sending out to the other transmission line.
This is a delay selection unit that delays a test signal input from one transmission line by a predetermined amount by a control signal from the control unit 100 and outputs the test signal.

Reference numeral 800 is an elastic store for inputting and storing the test signal output from the delay selecting section 700 and reading it at a timing determined by the control signal of the signal input from the other transmission path.

Reference numeral 100 denotes a delay selection unit 700 based on a frame pulse of a test signal input from one transmission line and delayed and output by a delay selection unit 700 by a predetermined amount and a control signal of a signal input from the other transmission line. Is a control unit that outputs a control signal for delaying and outputting the test signal by a predetermined amount.

A selection unit 130 normally selects a signal input from the other transmission path and selects and outputs a test signal read from the elastic store 800 during a folding test.

[0010]

In FIG. 1, when performing a loopback test, the delay selector 700 delays a test signal input from one transmission path (for example, an upstream transmission path) by a predetermined amount by a control signal from the control section 100. , Store in addition to Elastic Store 800.

Then, the test signal stored in the elastic store 800 is read and selected at the timing determined by the control signal (for example, enable pulse of the received signal) of the signal input from the other transmission line (for example, the downstream transmission line). It is sent to the downstream transmission path via the unit 130. Then, for example, in the opposite transmission device (not shown), the test signal sent to the up transmission line and the return test signal received from the down transmission line are compared and collated, and the signal deterioration due to the transmission line, transmission device, etc. To measure.

As a result, the phase of the test signal input from one transmission line is delayed by a predetermined amount to match the phase of the signal received from the other transmission line. It is possible to perform a loopback test in any phase without issuing a line abnormality alarm at the start and release of the loopback test.

As a result, it is possible to eliminate unnecessary maintenance work and preliminary switching due to the issuing of an alarm. Further, it is possible to eliminate unnecessary data error after the start of the loopback test.

[0014]

FIG. 2 is a block diagram showing the construction of the apparatus of the first embodiment of the present invention. FIG. 3 is a time chart showing a phase relationship in which data jump occurs in the embodiment.

FIG. 4 is a time chart showing the phase relationship of branch points at which data jump occurs in the embodiment.
FIG. 5 is a block diagram showing the configuration of the apparatus of the second embodiment.

FIG. 6 is a time chart for explaining the operation of the second embodiment. FIG. 7 is a time chart showing the phase relationship of each pulse as an example. The same reference numerals denote the same objects throughout the drawings.

In FIG. 7, S data and R data are transmission side and reception side data, SFP and RFP are transmission side and reception side frame pulses, respectively, and SEN and REN.
Indicates the phase relationship between the transmitting side enable pulse and the receiving side enable pulse, respectively. In the S data and R data, the areas indicated by valid data and invalid data respectively represent the valid range of data and the invalid range of data. For example, when a signal on the transmitting side is used as a test signal, S data, SFP and SEN respectively represent test data on the transmitting side, a frame pulse of test data and an enable pulse of test data.

Now, when a loopback test is performed from the transmission device (not shown) facing the transmission device shown in FIG. 2 through the upstream and downstream transmission lines, the transmission device shown in FIG.
The synchronizing unit 3 synchronizes the test signal sent via the upstream transmission line to obtain S data, SFP and S from the test signal.
Separate EN. Then, these are directly added to the delay selection unit 7, and after being delayed for a predetermined time through the delay units 4 to 6, added to the delay selection unit 7. The delay selection unit 7 selects either the direct or the delay units 4 to 6 according to the output signal of a flip-flop circuit (hereinafter referred to as FF) 12 to be described later, and stores it in the elastic store 8. The elastic store 8 is a memory that can write and read data independently.

On the other hand, the synchronizing section 9 synchronizes the signal on the receiving side input from the downstream transmission line to separate the frame pulse (RFP) and the enable pulse (REN) from the received signal and adds them to the elastic store 8. RFP shown in FIG.
At the timing of the start points of REN and "REN (" 1 "), the stored data input from the above-mentioned upstream transmission path is read. And
The test signal is sent to the downstream transmission path through the SEL 13 which is set to switch from the reception signal side to the test signal side by the loop signal (LP signal) indicating whether or not the loopback test is performed. Then, in the opposite transmission device (not shown), the test signal sent to the up transmission line and the return signal sent from the down transmission line are compared and collated to deteriorate the test signal due to the transmission line, transmission device, etc. To measure.

Now, when the delay amounts of the delay units 4 to 6 shown in FIG. 2 are not appropriate values, the unwritten memory area is read out as shown by the range of arrows a and b in FIG. 3 (so-called). (Data jump occurs), and when this is received by the opposite transmission device (not shown), it is determined to be a data error.

Therefore, the frame pulse (RFP) and the enable pulse (REN) of the signal on the receiving side input from the downstream transmission path are added to the pulse generator (hereinafter referred to as PG) 10 shown in FIG. The phase comparison pulse (hereinafter P
C (R)) is generated and output.

This PC (R) is connected to a logical product circuit (hereinafter referred to as AND
(Referred to as a circuit) 11 to one input terminal, and to the other input terminal, the SFP of the output of the delay selection unit 7 is added, and AND
The circuit 11 calculates the logical product of these two inputs and outputs a "1" or "0" pulse. FIGS. 4 (A) and 4 (B) show the phase relationship of the branch points at which data jump occurs, and more specifically, they are diagrams for determining the "1" range of the pulse of the PC (R). (PC (R) shown in FIGS. 4 (A) and 4 (B) does not consider the amount of data phase fluctuation for simplicity. In reality, the pulse is a little wider as indicated by the dotted line in FIG. 4). (A) shows the jump point (limit) of data jump when the valid data of S data one cycle before is read as R data, and the phase of S data is too advanced compared to the phase of R data. Is shown. Contrary to the figure (A), the figure (B) shows the jump point (limit) of the data jump when the phase of the S data is too late, and the S data is slightly shifted to the right. If so, the unwritten area is read by the arrow c.

Therefore, in the case of FIG. 4, the AND circuit 11
Then, the pulse of "1" obtained by calculating the logical product of "1" of SFP and "1" of PC (R) shown in FIG. 4 is applied to the clock terminal (C) of FF12, For example, when the output is "0", a pulse of "1" is output and the delay selection unit 7
Add to. The delay selection unit 7 selects and outputs S data, SFP and SEN of the test signal directly input from the synchronization unit 3 until then, but outputs the S data of the test signal delayed by a certain amount by the delay units 4 to 6. Data, SFP and SEN are selected and output, and stored in addition to the elastic store 8.

The I terminal of the FF12 outputs a value in phase opposite to that of the Q terminal and adds it to the D terminal. Every time the AND circuit 11 adds a "1" pulse to the C terminal, the I terminal of the FF12 is output from the Q terminal. "1" and "0" are alternately output and added to the delay selection unit 7.

Then, as described above, the S data, SFP and SEN stored in the elastic store 8 (delayed by a certain amount) by the timing pulse determined by RFP and REN of the received signal input from the downstream transmission path.
Is read out and sent out to the downstream transmission line via SEL13 which is set to be switched to the test signal side by the LP signal. Then, the opposite transmission device (not shown) measures the deterioration of the test signal due to the transmission path, the transmission device, and the like.

As a result, the phase of the test signal input from the upstream transmission line is delayed by a predetermined amount to match the phase of the signal received from the downstream transmission line. It is possible to perform a loopback test in any phase without issuing a line abnormality alarm at the start and release of the loopback test. As a result, it is possible to eliminate unnecessary maintenance work and preliminary switching due to the issuing of an alarm.

Next, FIG. 5 and FIG. 6 for the second embodiment.
Will be explained. In the second embodiment, the pulse width of PC (R) is changed depending on whether or not the turn-back test is performed.
When the phases are close to each other, the delay amount selected is prevented from changing due to a slight phase fluctuation of data during the test, resulting in no data error.

That is, in FIG. 5, the frame pulse (RFP) and the enable pulse (REN) of the signal on the receiving side input from the downstream transmission path are added to PG10 'shown in FIG. When the turn-back test is not performed, the pulse indicated by PC1 in FIG. 6 is output from PG10 ', and when the turn-back test is started, the pulse output is switched to that indicated by PC2 in FIG. 6 to control the amount of phase fluctuation. The operation other than that described above is the same as that of the first embodiment, and therefore its explanation is omitted.

As a result, by setting PC1 to a pulse width (a pulse width slightly wider than PC2) that allows for the amount of phase fluctuation, it is not necessary to control the amount of phase fluctuation of data after the start of the test. Can be done.

As a result, a loopback test can be performed without issuing a line abnormality alarm at the start and cancellation of the loopback test in any phase of the signals of the upstream and downstream transmission lines, and unnecessary maintenance work or standby due to the alarm issuance can be performed. It is possible to eliminate switching.

Furthermore, it is possible to eliminate unnecessary data errors after the start of the loopback test.

[0032]

As described above, according to the present invention, it is possible to perform a loopback test without issuing a line abnormality alarm at the start and release of the loopback test at any phase of the signals on the upstream and downstream transmission lines. It is possible to eliminate unnecessary maintenance work and pre-switching due to an alarm being issued.

Further, it is possible to eliminate unnecessary data error after the start of the loopback test.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention,

FIG. 2 is a block diagram showing a configuration of an apparatus according to a first embodiment of the present invention,

FIG. 3 is a time chart showing a phase relationship in which interlacing of data occurs in an embodiment,

FIG. 4 is a time chart showing a phase relationship of branch points at which data jump occurs in the embodiment,

FIG. 5 is a block diagram showing a configuration of an apparatus according to a second embodiment,

FIG. 6 is a time chart for explaining the operation of the second embodiment,

FIG. 7 is a time chart showing a phase relationship of each pulse of an example,

FIG. 8 is a diagram for explaining a folding back test method of a conventional example.

[Explanation of symbols]

100 is a control unit, 130 is a selection unit, 700 is a delay selection unit, 800
Indicates an elastic store.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Noriyuki Yogoshi 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Within Fujitsu Limited (72) Inventor Shigeta Samukawa, 1015, Kamiodanaka, Nakahara-ku, Kawasaki, Kanagawa Within Fujitsu Limited

Claims (1)

[Claims] 1. A transmission device, which is connected to an upstream transmission line and a downstream transmission line, performs a loopback test by looping back a test signal input from one transmission line and sending the test signal to the other transmission line. The input test signal is delayed by a predetermined amount by the control signal from the control unit (100) and output, and the test signal output from the delay selection unit (700) is input and stored, Elastic store (800) that reads at the timing determined by the control signal of the signal input from the other transmission path
From the frame pulse of the test signal input from the one transmission path and delayed by a predetermined amount in the delay selection section (700) and the control signal of the signal input from the other transmission path. At (700), select the control unit (100) that outputs a control signal to delay the test signal by a predetermined amount, and select the signal that is normally input from the other transmission line. A loopback test method comprising: a selection unit (130) for selecting and outputting a test signal read from the (800).