JPH03201840A - Switching circuit without short break - Google Patents

Abstract

PURPOSE:To switch an information signal without short break when the signal is transmitted through a node device by detecting the position of a virtual container by using a pointer read circuit, and executing delay control. CONSTITUTION:A coincidence detecting circuit 8 detects whether the delay amount f the virtual container is same for two inputted signal or not, and outputs the result of the detection to a control circuit 7. After the detected result of the coincidence detecting circuit 8 shows coincidence, the control circuit 7 switches a changeover switch 11. Thus, the delay amount of a frame to be inputted to the changeover switch 11 is equal with the delay amount of the virtual container each other. Thus, signals to be outputted to an output terminal 12 are made continuous and discontinuity, namely, a short break does not occur by the delay difference of the signal when the switch is changed over.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical field to which the invention pertains The present invention relates to a transmission system having a plurality of node devices.
The present invention relates to a no-interruption switching circuit for switching signals manually input via different node devices without instantaneous interruption.

(2) Prior Art FIG. 2 shows an example of the configuration of a non-interruption switching circuit using a conventional delay control method. In the figure, 13 is an input terminal (a),
14 is an input terminal (b), 15 is a delay device, 16 is a delay device,
17 is a delay amount setting circuit, 18 is a coincidence detection circuit, 19 is a changeover switch, 20 is a changeover switch control circuit, and 21 is an output terminal, which is a configuration example in which the delay of the transmission path is adjusted on the receiving side.

The operation of this circuit is as follows. The same signal sent by a remote transmitter enters the input terminals 13 and 14 via different transmission paths and therefore with different amounts of delay. Signals inputted from input terminals 13 and 14 are output after being given appropriate delays by delay devices 15 and 16. This output is input to the coincidence detection circuit 18 and changeover switch 19. - The number output circuit 18 detects whether the delay amounts of the two input signals are the same, and outputs the result to the delay amount setting circuit 17 and the changeover switch control circuit 20. If the delay detection result of the coincidence detection circuit 18 does not match, the delay amount setting circuit 17 changes the delay amount of either one of the delay devices 15 or 16, and repeats changing the delay amount until the delays of both match. Set the optimal amount of delay. Therefore,
Since the delay amounts of both signals input to the changeover switch 19 can be made equal, after adjusting the delay, the changeover switch 19 can be switched to either the A measurement or the B side during transmission of the information signal. Even in this case, the signal output to the output terminal (C) 21 is continuous, and there is an advantage that discontinuity of the signal, that is, instantaneous interruption, does not occur when the switch is changed due to the difference in signal delay.

However, when there are multiple node devices and signals are transmitted through each node as in the example shown in FIG.・Interface) etc. are used. According to this regulation, information signals are inserted between node devices in a part called a virtual container, and a transmission frame 29 or 3 as shown in FIG.
Verticel container 32 or 37 at any position within 0
communication of control information between nodes (frame synchronization,
overhead 33 or 38 used for error detection, etc.)
It can be transmitted with a control signal called . Therefore, as shown in FIG. 4, the position of the virtual container 32 in the frame 29 of the signal a directly received from the node 23 and the position of the virtual container 37 in the frame 34 of the signal received via the node 24 may be different. be. In such a case, when the conventional uninterrupted switching circuit matches the delays of frames 29 and 34, the virtual container 3
Since the delays of 2 and 37 do not match, virtual containers 32 and 37 could not be switched without interruption.

Furthermore, if the delays of the virtual containers 32 and 37 are matched, the delays of frames 29 and 34 will not match, so the delays of the overheads 33 and 38 will not match, and there is a drawback that the overheads 33 and 38 cannot be switched without interruption. there were.

(3) Object of the Invention An object of the present invention is to provide a non-interruption switching circuit that has a plurality of node devices and switches information signals without interruption when signals are transmitted via the node devices. It is about providing.

(4) Structure of the invention (4-1) Differences between the characteristics of the invention and the conventional technology The present invention has the following features:
In order to solve the problems of the conventional technology, the position of the virtual container is detected by a pointer inserted in the overhead to indicate the starting position of the virtual container, and the delay of the frame and the virtual container are matched. Achieve instantaneous switching. This method differs from the conventional method in that the position of the virtual container is detected using a pointer readout circuit and the delay is adjusted.

(4-2) Embodiment FIG. 1 is a detailed diagram of the present invention, in which 1 is an input terminal (a), 2 is an input terminal (b), and 3 is a pointer (II).
Read circuit, 4 is pointer value read circuit, 5 is RA
M, 6 is RAM, 7 is a control circuit, 8 is a coincidence detection circuit, 9
．． 10 is a pointer value changing circuit, 11 is a changeover switch, 1
2 is an output terminal, and RAM (random access
(Memory) 5.6, the delay amount is set.

The operation of this circuit is as follows. Input terminals 1 and 2 receive signals (signal a and signal b) having frames 29 and 34 via different transmission paths (node devices) as shown in FIG.
) is done manually. Virtual containers 32 and 37 are then inserted at different positions within their respective frames 29 and 34, and therefore have different amounts of delay. The operation of switching after the delay of signal A is made to match signal a will be described below.

The signal a input from the input terminal 1 is input to the pointer value reading circuit 3 and the RAM 5. The pointer value reading circuit 3 detects the overhead 33 frame information of the signal a, reads out the pointer value 31 indicating the position of the head 30 of the virtual container 32 in the frame 29 from a predetermined position in the overhead, and reads out the frame information and the frame information. The pointer value 31 is output to the control circuit 7. The RAM 5 stores and outputs the signal a according to the output of the control circuit 7. At this time, if a difference is provided between the write address and read address of the signal a to the RAM 5, the signal a output from the RAM 5
will be delayed compared to the manually generated signal a. Similarly, a signal input from the input terminal 2 is input to the pointer value reading circuit 4 and the RAM 6. The pointer value reading circuit 4 detects frame information from the signal overhead 38, reads the pointer value 36 indicating the position of the head 35 of the virtual container 37 in the frame 34 from a predetermined position in the overhead, and reads out the frame information and pointer value 36 from a predetermined position in the overhead. The value 36 is output to the control circuit 7. The RAM 6 stores and outputs signals according to the output of the control circuit 7. The control circuit 7 compares the results of the pointer value reading circuit 3 and the same circuit 4, and reads the RAM 6 so that the positions of the overheads 33 and 38 of the signals output from the RAM 5 and RAM 6 and the start positions 30 and 35 of the virtual container match. control the read address.

The output of the RAM 5.6 is input to a coincidence detection circuit 8 and a pointer value changing circuit 9.10. - The number output circuit 8 detects whether the delay amounts of the virtual containers 32 and 37 of the two input signals are the same, and outputs the result to the control circuit 7. If the delay detection result of the coincidence detection circuit 8 is not a coincidence, the control circuit 7 controls the address of the RAM 6 so that the delay amount of the signal S changes by one frame. Furthermore, the delay amount is repeatedly changed until the results of the -number output circuit 8 match.
Set the optimal amount of delay. Pointer value change circuit lO is R
RA the pointer value 36 in the signal output from AM6.
The pointer value is changed to be the same as the pointer value 31 of the signal a output from M5. The outputs of the pointer value changing circuits 9 and 10 are connected to the changeover switch 11, and the control circuit 7 switches the changeover switch 11 after the detection result of the match detection circuit 8 becomes a match.

With this configuration, the amount of delay of frames 29 and 34 input to the changeover switch 11 and the amount of delay of the virtual containers 32 and 37 are both equal, and it is possible to set the changeover switch 11 to either the a side or the b side. Even in the case of switching, the signal output to the output terminal 12 is continuous, and there is an advantage that discontinuity, that is, instantaneous interruption, does not occur due to the delay difference in the signal at the time of switching.

(5) As described in detail, according to the present invention, by reading the pointer value and adjusting the delay between the frame and the virtual container,
Since it achieves instantaneous switching, it is possible to realize instantaneous switching without depending on the position of the virtual container within the frame, and realizes instantaneous interruption switching of information signals input via different node devices. The advantage is that it is possible.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram of a conventional device, FIG. 3 is an example of connection of node devices, and FIG. 4 is an example of a frame between node devices. 1... Input terminal (a), 2... Input terminal (b), 3
... Pointer value read circuit, 4 ... Pointer value read control circuit, 5 ・RAM (a), 6 ・RA
M(b), 7... Control circuit, 8... - Number configuration circuit, 9... Pointer value changing circuit, 10... Pointer value changing circuit, 11... Changeover switch, 12...・Output terminal, 13...Input terminal (a), 14...Input terminal), 15...Delay device, 16...Delay device, 17...
Delay amount setting circuit, 18...-Number configuration circuit, 19...
Changeover switch, 20... Changeover switch control circuit, 2I
... Output terminal, 23... Node device, 24... Node device, 25... Node device, 26... Transmission line,
27... Transmission line, 28... Transmission line, 29... Frame (a), 30... Virtual container start, 31
...Pointer value, 32...Virtual container, 3
3... Overhead, 34... Frame (b),
35... Virtual container start, 36... Pointer value, 37... Virtual container, 38... Overhead. Figure 2 Figure 3

Claims (1)

[Scope of Claims] A delay circuit that delays each of a plurality of input signals, a coincidence detection circuit that is connected to the output of the delay circuit and detects whether the delay amounts of the plurality of input signals match, and It has a changeover switch that selects one of the connected signals, and by changing the delay amount of the delay circuit and matching the delay amount of the plurality of input signals, it is possible to switch between the plurality of input signals without momentary interruption. A readout circuit connected to the front stage of the delay circuit to read out the position of the information signal from any position within the transmission frame of the input signal, and a readout circuit connected to the front stage of the delay circuit to read out the position of the information signal from any position within the transmission frame of the input signal, and and a control circuit for controlling the delay circuit so that the positions of the information signals of the frame and the information signal match, and the information signal is configured to be able to be switched without momentary interruption by matching the delays of the frame and the information signal. A non-interruption switching circuit characterized by: