JPH0481346B2 - - Google Patents

Info

Publication number
JPH0481346B2
JPH0481346B2 JP58037172A JP3717283A JPH0481346B2 JP H0481346 B2 JPH0481346 B2 JP H0481346B2 JP 58037172 A JP58037172 A JP 58037172A JP 3717283 A JP3717283 A JP 3717283A JP H0481346 B2 JPH0481346 B2 JP H0481346B2
Authority
JP
Japan
Prior art keywords
region
gate electrode
floating gate
potential
injection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58037172A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59161873A (ja
Inventor
Yutaka Hayashi
Yoshikazu Kojima
Masaaki Kamya
Kojiro Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology, Seiko Epson Corp filed Critical Agency of Industrial Science and Technology
Priority to JP58037172A priority Critical patent/JPS59161873A/ja
Publication of JPS59161873A publication Critical patent/JPS59161873A/ja
Priority to US07/013,192 priority patent/US4821236A/en
Publication of JPH0481346B2 publication Critical patent/JPH0481346B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/125—Shapes of junctions between the regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel

Landscapes

  • Non-Volatile Memory (AREA)
  • Static Random-Access Memory (AREA)
JP58037172A 1983-03-07 1983-03-07 半導体不揮発性メモリ Granted JPS59161873A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP58037172A JPS59161873A (ja) 1983-03-07 1983-03-07 半導体不揮発性メモリ
US07/013,192 US4821236A (en) 1983-03-07 1987-02-09 Semiconductor nonvolatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58037172A JPS59161873A (ja) 1983-03-07 1983-03-07 半導体不揮発性メモリ

Publications (2)

Publication Number Publication Date
JPS59161873A JPS59161873A (ja) 1984-09-12
JPH0481346B2 true JPH0481346B2 (en, 2012) 1992-12-22

Family

ID=12490173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58037172A Granted JPS59161873A (ja) 1983-03-07 1983-03-07 半導体不揮発性メモリ

Country Status (2)

Country Link
US (1) US4821236A (en, 2012)
JP (1) JPS59161873A (en, 2012)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2580752B2 (ja) * 1988-12-27 1997-02-12 日本電気株式会社 不揮発性半導体記憶装置
US5216269A (en) * 1989-03-31 1993-06-01 U.S. Philips Corp. Electrically-programmable semiconductor memories with buried injector region
EP0399261B1 (en) * 1989-05-24 1995-03-15 Texas Instruments Incorporated Band-to-band induced substrate hot electron injection
EP0463331A3 (en) * 1990-06-28 1992-12-23 Texas Instruments Incorporated An improved method for programming a non-volatile memory
US5612914A (en) * 1991-06-25 1997-03-18 Texas Instruments Incorporated Asymmetrical non-volatile memory cell, arrays and methods for fabricating same
DE69129393T2 (de) * 1990-08-29 1998-12-17 Texas Instruments Inc., Dallas, Tex. Asymmetrische nichtflüchtige Speicherzelle, Matrix und Verfahren zu ihrer Herstellung
US5583810A (en) * 1991-01-31 1996-12-10 Interuniversitair Micro-Elektronica Centrum Vzw Method for programming a semiconductor memory device
BE1004424A3 (nl) * 1991-01-31 1992-11-17 Imec Inter Uni Micro Electr Transistorstruktuur voor uitwisbare en programmeerbare geheugens.
KR930006954A (ko) * 1991-09-25 1993-04-22 리차드 데이비드 로만 개선된 지속 특성을 갖는 전기적 소거가능 프로그램 가능 판독 전용 메모리(eeprom)
US5712180A (en) * 1992-01-14 1998-01-27 Sundisk Corporation EEPROM with split gate source side injection
US7071060B1 (en) * 1996-02-28 2006-07-04 Sandisk Corporation EEPROM with split gate source side infection with sidewall spacers
US6222762B1 (en) * 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5313421A (en) * 1992-01-14 1994-05-17 Sundisk Corporation EEPROM with split gate source side injection
US6243293B1 (en) 1992-01-29 2001-06-05 Interuniversitair Micro-Elektronica Centrum Contacted cell array configuration for erasable and programmable semiconductor memories
US6009013A (en) * 1992-01-29 1999-12-28 Interuniversitair Micro-Elektronica Centrum Vzw Contactless array configuration for semiconductor memories
US5594685A (en) * 1994-12-16 1997-01-14 National Semiconductor Corporation Method for programming a single EPROM or flash memory cell to store multiple bits of data that utilizes a punchthrough current
US5808937A (en) * 1994-12-16 1998-09-15 National Semiconductor Corporation Self-convergent method for programming FLASH and EEPROM memory cells that moves the threshold voltage from an erased threshold voltage range to one of a plurality of programmed threshold voltage ranges
US5557567A (en) * 1995-04-06 1996-09-17 National Semiconductor Corp. Method for programming an AMG EPROM or flash memory when cells of the array are formed to store multiple bits of data
US7092288B2 (en) * 2004-02-04 2006-08-15 Atmel Corporation Non-volatile memory array with simultaneous write and erase feature
US7020020B1 (en) * 2004-09-21 2006-03-28 Atmel Corporation Low voltage non-volatile memory cells using twin bit line current sensing
US7301197B2 (en) * 2004-09-21 2007-11-27 Atmel Corporation Non-volatile nanocrystal memory transistors using low voltage impact ionization
US6980471B1 (en) * 2004-12-23 2005-12-27 Sandisk Corporation Substrate electron injection techniques for programming non-volatile charge storage memory cells
US8547756B2 (en) 2010-10-04 2013-10-01 Zeno Semiconductor, Inc. Semiconductor memory device having an electrically floating body transistor
US8130547B2 (en) 2007-11-29 2012-03-06 Zeno Semiconductor, Inc. Method of maintaining the state of semiconductor memory having electrically floating body transistor
US10340276B2 (en) 2010-03-02 2019-07-02 Zeno Semiconductor, Inc. Method of maintaining the state of semiconductor memory having electrically floating body transistor

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4037242A (en) * 1975-12-29 1977-07-19 Texas Instruments Incorporated Dual injector, floating gate MOS electrically alterable, non-volatile semiconductor memory device
US4163985A (en) * 1977-09-30 1979-08-07 The United States Of America As Represented By The Secretary Of The Air Force Nonvolatile punch through memory cell with buried n+ region in channel
JPS6046554B2 (ja) * 1978-12-14 1985-10-16 株式会社東芝 半導体記憶素子及び記憶回路
US4361847A (en) * 1980-04-07 1982-11-30 Eliyahou Harari Non-volatile EPROM with enhanced drain overlap for increased efficiency
US4432075A (en) * 1981-12-04 1984-02-14 Hebrew University Of Jerusalem Electrically programmable non-volatile memory

Also Published As

Publication number Publication date
JPS59161873A (ja) 1984-09-12
US4821236A (en) 1989-04-11

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