JPH0480555B2 - - Google Patents
Info
- Publication number
- JPH0480555B2 JPH0480555B2 JP59093365A JP9336584A JPH0480555B2 JP H0480555 B2 JPH0480555 B2 JP H0480555B2 JP 59093365 A JP59093365 A JP 59093365A JP 9336584 A JP9336584 A JP 9336584A JP H0480555 B2 JPH0480555 B2 JP H0480555B2
- Authority
- JP
- Japan
- Prior art keywords
- chip component
- chip
- recess
- board
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910000679 solder Inorganic materials 0.000 claims description 16
- 239000004020 conductor Substances 0.000 claims description 10
- 238000002347 injection Methods 0.000 claims description 9
- 239000007924 injection Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
Description
【発明の詳細な説明】 (イ) 産業上の利用分野 本発明は、電子回路基板に関する。[Detailed description of the invention] (b) Industrial application fields The present invention relates to an electronic circuit board.
(ロ) 従来技術
通常、チツプ抵抗、チツプコンデンサ、チツプ
IC等のチツプ部品を実装する場合、基板に形成
したプリント配線等の導体パターンにランド部を
設けて、このランド部に前記チツプ部品を裁置ま
たは接着した後、前記ランド部とチツプ部品とを
デイツプ或いはリフロ等の手段によりハンダ付け
している。(b) Conventional technology Usually, chip resistors, chip capacitors, chip
When mounting chip components such as ICs, a land portion is provided on a conductor pattern such as printed wiring formed on a board, and after the chip component is placed or bonded on this land portion, the land portion and the chip component are connected. Soldering is done by means such as dip or reflow.
しかしながら、前記チツプ部品をその面積の広
い面を基板に当接するように配設するので、前記
基板への実装密度の向上には限度がある。 However, since the chip components are arranged so that their large surfaces are in contact with the substrate, there is a limit to the improvement in the mounting density on the substrate.
前記問題点を解決するために、例えば実開昭58
−162665号、実開昭58−51465号および実開昭57
−35077号公報に記載された方法がある。しかし
ながら、前記各方法においても、ハンダの接着強
度に関して問題がある。すなわち、チツプ部品が
基板の導体に十分ハンダ盛りができず、そのため
両者の電気接続において信頼性が十分には保証で
きないものであつた。 In order to solve the above problems, for example,
−162665, Utility Model Application No. 58-51465 and Utility Model Application No. 57
There is a method described in the -35077 publication. However, each of the above methods also has problems regarding the adhesive strength of the solder. That is, the chip components could not be sufficiently soldered to the conductors of the board, and therefore the reliability of the electrical connection between the two could not be fully guaranteed.
(ハ) 目的
本発明は、基板への実装密度を向上すると共に
ハイブリツドICの小型化の可能とする電子回路
基板を提供することを目的としている。(c) Purpose An object of the present invention is to provide an electronic circuit board that improves the mounting density on a board and allows miniaturization of a hybrid IC.
本発明のもうひとつの目的は、チツプ部品と基
板上に形成した導体間のハンダ付けが十分にでき
るようにした電子回路基板を提供することを目的
としている。 Another object of the present invention is to provide an electronic circuit board that allows sufficient soldering between chip components and conductors formed on the board.
(ニ) 構成
本発明に係る電子回路基板は、基板とチツプ部
品を具備しており、かつ前記基板は平面視形状が
全体として矩形状であつて、対向する長手方向両
側内壁に直線当接部分を残してハンダ注入用の凹
部を垂直に設けた収納凹所を有しており、前記チ
ツプ部品は前記ハンダ注入用の凹部の位置に対応
して基板の厚さ方向に電極を有するものであり、
かつ前記収納凹所にチツプ部品をその面積の広い
面が垂直となるように収納し、前記チツプ部品と
基板の表面に形成された導体とをハンダ付けする
とともに、前記ハンダ注入用の凹部にハンダが注
入できるように構成したことを特徴としている。(d) Structure The electronic circuit board according to the present invention includes a board and a chip component, and the board has an overall rectangular shape in plan view, and has linear abutting portions on opposing inner walls on both sides in the longitudinal direction. The chip component has a storage recess in which a recess for solder injection is provided vertically with a recess for solder injection, and the chip component has an electrode in the thickness direction of the board corresponding to the position of the recess for solder injection. ,
Then, a chip component is stored in the storage recess so that its wide surface is perpendicular, and the chip component and the conductor formed on the surface of the board are soldered, and the solder is placed in the recess for solder injection. It is characterized by being configured so that it can be injected.
(ホ) 実施例
第１図は本発明に係る電子回路基板を一部切欠
した斜視図である。(E) Embodiment FIG. 1 is a partially cutaway perspective view of an electronic circuit board according to the present invention.
１０は、例えばガラスエポキシからなる基板で
ある。この肉厚は、実装されるチツプ部品２０の
幅寸法と略同一寸法になつており、所定箇所に複
数個の収納凹所１１が開設されている。 10 is a substrate made of, for example, glass epoxy. This wall thickness is approximately the same as the width of the chip component 20 to be mounted, and a plurality of storage recesses 11 are provided at predetermined locations.
そして、例えば前記収納凹所１１の大きさは、
実装されるチツプ部品２０の肉厚寸法より僅かに
大きい寸法になつており、前記チツプ部品２０が
ハンダ付けされる面に対応してハンダ注入用の凹
部１３（以下単に凹部１３という）が設けられて
いる。 For example, the size of the storage recess 11 is
The size is slightly larger than the wall thickness of the chip component 20 to be mounted, and a recess 13 for solder injection (hereinafter simply referred to as recess 13) is provided corresponding to the surface to which the chip component 20 is soldered. ing.
前記凹部１３は収納凹所１１の長手方向両側内
壁に直線当接部分１３１，１３１を残して垂直に
設けられている。 The recess 13 is provided vertically on both inner walls in the longitudinal direction of the storage recess 11, leaving straight abutting portions 131, 131.
１２は、プリント配線された銅箔等からなる導
体であり、前記収納凹所１１に適宜に連結してい
る。 Reference numeral 12 denotes a conductor made of printed copper foil or the like, and is connected to the storage recess 11 as appropriate.
２０は、例えば従来から使用されているチツプ
抵抗或いはチツプコンデンサ等のチツプ部品であ
り、前記収納凹所１１に縦方向（チツプ部品の面
積の広い面が垂直になるように）に収納した後、
前記導体１２のランド部とデイツプ或いはリフロ
等の手段によりハンダ付けされている。 Reference numeral 20 denotes a chip component such as a chip resistor or a chip capacitor that has been conventionally used, and after storing it in the storage recess 11 in the vertical direction (so that the large surface of the chip component is vertical),
It is soldered to the land portion of the conductor 12 by dip or reflow method.
２１は、ネツトワーク抵抗を内蔵したチツプ部
品の例である。前記チツプ部品２０，２１とも前
記ハンダ注入用の凹部の位置に対応して基板の厚
さ方向に電極を有するものとする。 21 is an example of a chip component with a built-in network resistor. Both of the chip components 20 and 21 have electrodes in the thickness direction of the substrate corresponding to the positions of the solder injection recesses.
しかして、本発明に係る電子回路基板にチツプ
部品を実装する方法を以下簡単に説明する。 A method for mounting chip components on an electronic circuit board according to the present invention will be briefly described below.
まず、収納凹所１１の開孔部の適宜な箇所に装
着剤等を予め付けておいて、上方よりチツプ部品
２０，２１を挿入して、仮り止めをしておく。 First, a mounting agent or the like is applied in advance to an appropriate location in the opening of the storage recess 11, and the chip parts 20 and 21 are inserted from above and temporarily secured.
次に、前記チツプ部品２０，２１と基板１０に
プリント配線された導体１２のランド部とをデイ
ツプ或いはリフロ等の手段によりハンダ付けす
る。このとき、前記収納凹所１１の凹部１３に前
記ハンダが流れ込んで、基板の厚さ方向に形成し
た電極にハンダが接着する結果、あたかも当該ハ
ンダが釘状に形成されるので、前記チツプ部品２
０と導体２１とを強固に接続させ、ひいては電子
回路基板の信頼性を向上させることができる。 Next, the chip components 20, 21 and the land portions of the conductor 12 printed on the board 10 are soldered by means such as dip or reflow. At this time, the solder flows into the recess 13 of the storage recess 11 and adheres to the electrodes formed in the thickness direction of the board, so that the solder is formed into a nail shape, so that the chip component 2
0 and the conductor 21 can be firmly connected, and as a result, the reliability of the electronic circuit board can be improved.
尚、上述の実施例では、従来からのチツプ部品
を用いて説明しているが、本発明はこれに限定さ
れず、チツプ部品の電極をチツプ長尺側面両端に
形成したチツプ部品を使用するも好ましい。 Although the above-mentioned embodiments are explained using conventional chip parts, the present invention is not limited to this, and it is also possible to use chip parts in which electrodes are formed on both ends of the long sides of the chip. preferable.
(ヘ) 効果
本発明は、基板に開設された収納凹所にチツプ
部品を収納しているので、このチツプ部品の実装
スペースは、チツプ部品の肉厚程度でよい。(f) Effects In the present invention, since the chip component is stored in the storage recess provided in the board, the mounting space for the chip component only needs to be about the thickness of the chip component.
従つて、従来行われていた実装法に比べて大幅
に実装密度を向上できる。 Therefore, the packaging density can be significantly improved compared to conventional packaging methods.
即ち、本発明によればハイブリツドICの小型
化が容易である。さらにこの発明はハンダ注入用
の凹部を設けてあるので、この部分にハンダが自
動的に注入され、結果として電子回路基板の信頼
性を向上させることができるものである。 That is, according to the present invention, it is easy to downsize the hybrid IC. Furthermore, since the present invention is provided with a recessed portion for injecting solder, solder is automatically injected into this portion, and as a result, the reliability of the electronic circuit board can be improved.
第１図は本発明に係る電子回路基板を一部切欠
した斜視図である。
１０……基板、１１……収納凹所、１２……導
体、２０，２１……チツプ部品。
FIG. 1 is a partially cutaway perspective view of an electronic circuit board according to the present invention. 10... Board, 11... Storage recess, 12... Conductor, 20, 21... Chip parts.
Claims (1)
基板は平面視形状が全体として矩形状であつて、
対向する長手方向両側内壁に直線当接部分を残し
てハンダ注入用の凹部を垂直に設けた収納凹所を
有しており、前記チツプ部品は前記ハンダ注入用
の凹部の位置に対応して基板の厚さ方向に電極を
有するものであり、かつ前記収納凹所にチツプ部
品をその面積の広い面が垂直となるように収納
し、前記チツプ部品と基板の表面に形成された導
体とをハンダ付けするとともに、前記ハンダ注入
用の凹部にハンダが注入できるように構成したこ
とを特徴とする電子回路基板。1 comprises a substrate and chip components, and the substrate has an overall rectangular shape in plan view,
A storage recess is provided in which a recess for solder injection is vertically provided with a straight contact portion left on the inner walls on both sides in the opposing longitudinal direction, and the chip component is placed on the board in correspondence with the position of the recess for solder injection. The chip component has an electrode in the thickness direction of the chip component, and the chip component is stored in the storage recess so that its wide surface is perpendicular, and the chip component and the conductor formed on the surface of the board are soldered. 1. An electronic circuit board characterized in that the electronic circuit board is configured such that solder can be injected into the recessed portion for solder injection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9336584A JPS60236282A (en) | 1984-05-09 | 1984-05-09 | Electronic circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9336584A JPS60236282A (en) | 1984-05-09 | 1984-05-09 | Electronic circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60236282A JPS60236282A (en) | 1985-11-25 |
| JPH0480555B2 true JPH0480555B2 (en) | 1992-12-18 |
Family
ID=14080260
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9336584A Granted JPS60236282A (en) | 1984-05-09 | 1984-05-09 | Electronic circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60236282A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0284370U (en) * | 1988-12-20 | 1990-06-29 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5735077B2 (en) * | 1979-07-31 | 1982-07-27 | ||
| JPS5851465B2 (en) * | 1979-01-26 | 1983-11-16 | 日本電信電話株式会社 | Response monitoring method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5735077U (en) * | 1980-08-01 | 1982-02-24 | ||
| JPS5851465U (en) * | 1981-09-30 | 1983-04-07 | パイオニア株式会社 | printed circuit board equipment |
| JPS58162665U (en) * | 1982-04-24 | 1983-10-29 | ジエコ−株式会社 | Mounting structure of electronic components |
-
1984
- 1984-05-09 JP JP9336584A patent/JPS60236282A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5851465B2 (en) * | 1979-01-26 | 1983-11-16 | 日本電信電話株式会社 | Response monitoring method |
| JPS5735077B2 (en) * | 1979-07-31 | 1982-07-27 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60236282A (en) | 1985-11-25 |
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