JPH0477910A - Constituent device detaching system - Google Patents

Abstract

PURPOSE:To detach an adapter without affecting the other device by providing a circuit receiving and decoding an adapter disconnection instruction from a processor and a circuit holding the output-side connection part of the adapter for the system bus in high impedance when the adapter disconnection instruction is decoded. CONSTITUTION:The adapter disconnection instruction decoding circuit 4 which receives and decodes the adapter disconnection instruction from the processor and the high impedance holding circuit 5 setting and holding the output-side connection part of the adapter 2 for the system bus 1 in high impedance when the adapter disconnection instruction that the circuit 4 receives is decoded to be for itself are provided. Since the connection part of the adapter 2 viewed from the system bus 1 is in high impedance, it is in an electrically opened state. Thus, noise is put on the system bus 1 and the operation of the system is prevented from being disturbed even if the adapter 2 is detached. Thus, the adapter can physically be detached without an inconvenience in the operation of the system.

Description

[Detailed Description of the Invention] (Summary) Regarding the disconnection of a failed adapter in an information processing system, the purpose of this invention is to physically disconnect the adapter without affecting the operation of the system, and to control the main operation of the adapter. a system-independent circuit that receives and decodes an adapter disconnection command from the processor; and an output to the adapter's system bus when the adapter disconnection command received by the circuit is interpreted as being directed to itself. It is constructed by making the side connection part high impedance and providing a circuit to maintain this state.

[Industrial application field]

The present invention relates to control of disconnection of a failed adapter in an information processing system, and in particular, even if the adapter is inoperable, a disconnection command from a processor allows the adapter to be physically disconnected without affecting the system. It relates to a method that can be made into a state where it can be separated.

[Conventional technology]

FIG. 5 is a diagram showing a part of the information processing system, in particular, a diagram showing the relationship between the processor and the adapter,
51 is a processor, 52 is a system bus, 53.54 is an adapter, 55-1.55-2 is an input/output device (DV),
56 represents a communication line.

As shown in the figure, a processor 51, an adapter 53.5
In a general computer system in which the processor 4 is connected to the system bus 52 and various devices and communication lines are further connected under the adapter, the processor 51 is usually
The adapter is controlled by instructions from the software, and the necessary data is read from and written to the device.

The instructions issued by the processor 51 include instructions for controlling the adapter itself, instructions for controlling devices under the adapter, instructions for diagnosis and RAS, etc., and the software is used to control the system status, the status of each adapter, etc. These commands are used depending on the situation.

The adapter is normally in its initial state, operational state, interrupt state,
It has four states including an inoperable state, which becomes the initial state after power is turned on, and becomes an operable state by the firmware on the adapter's CPU. In this state, the adapter waits for instructions from the processor, and upon receiving the instructions, analyzes and executes them, sends the results to the processor, and enters the interrupt state.

If the result is normal, the processor notifies the adapter to that effect, and the adapter thereby becomes operational again. Thereafter, this cycle is repeated to operate as a system.

[Problem to be solved by the invention]

During the operation cycle as described above, if the adapter detects a factor that adversely affects the operation of the system or itself, the adapter becomes inoperable.

Once the adapter is in an inoperable state, it cannot be brought out of this state on its own, so either reset the adapter or choose a time when system operation will not be affected and restart the system. I had to stop the system and remove the adapter for repair.

If an adapter breaks down, it goes without saying that it must be physically removed from the system configuration and replaced with a spare adapter, or the adapter in question must be repaired, as shown in Figure 5. If multiple devices are connected to the system bus as shown, the adapter cannot be removed while the system is in operation.

This is because the adapter and the system bus have an electrical connection relationship, so if the adapter is removed during operation, electrical noise will be generated on the system bus, which will seriously affect system operation, or if the adapter is not connected to the system bus. This is because the voltage transiently generated due to sudden disconnection of the circuit inside the device may damage the circuit elements.

Therefore, conventionally, when removing the adapter, the power to the system must be turned off before the work is performed, which poses a problem in that it causes inconvenience in the operation of the system.

SUMMARY OF THE INVENTION In view of these conventional problems, it is an object of the present invention to provide a means for physically removing an adapter without stopping the system.

[Means to solve the problem]

According to the invention, the above-mentioned object is achieved by the measures specified in the appended claims.

That is, the present invention is connected to a processor via a system bus, controls its own input/output devices according to instructions from the processor, and also controls data transfer between the processor and the input/output devices. to the adapter device that
A circuit that is independent of the control system that controls the main operation of the adapter and that receives and decodes an adapter disconnection command from the processor, and when the adapter disconnection command received by the circuit is decoded as being directed to itself. This is a configuration device separation method in which the output side connection part of the adapter to the system bus is made high impedance, and a circuit is provided to maintain this state.

[For production]

FIG. 1 is a diagram showing the basic configuration of the present invention, where l is a system bus, 2 is an adapter, 3 is a driver which is the output side connection part of the adapter to the system bus, and 4 is a diagram that receives a disconnection command from the processor. a circuit for receiving and decoding via the receiver 6;
5 is a circuit (high impedance holding circuit) which receives the output of the adapter disconnection command decoding circuit 4 and maintains the driver 3 at high impedance.

In the figure, the circuit 4.5 is constructed so that its operation is guaranteed even in a state where the control system of the adapter 2 fails and the adapter is no longer able to perform normal control operations.

Then, when the adapter disconnection command received from the processor is decoded as being directed to itself, the circuit 5 is notified by signal A. The circuit 5 is connected to the driver 3 by the signal B.
is held at high impedance.

In this state, the connection part of adapter 2 seen from system bus l is electrically open due to high impedance, so even if the adapter is attached or detached, noise will be on the system bus and disturb system operation. Such a thing does not occur.

〔Example〕

FIG. 2 is a diagram showing an embodiment of the present invention, in which 7 is a system bus, 8 is an adapter, 9 is a receiver, 10 is a driver, 11 is an instruction control unit (ICNTL), and 12 is a data control unit (DTCNTL). ), 13 is a CPU, 14 is a control memory (C3), 15 is an input/output control unit (DVC), 16 is a processor, 17 is a driver, 18 is a receiver, 19 is an instruction control unit (ICNTL), and 20 is a data control unit (DTCN
TL), 21 represents a CPU, and 22 represents a main memory (LSU).

In the same figure, when the CPU 21 in the processor 16 requests the ICNTL 19 to issue a command based on instructions from software, the ICNTL 19 requests the right to use the bus from the system bus 7, and when the bus is acquired, the adapter (this In the figure, it is issued for 8).

When the firmware is started up and the adapter 8 is in an operable state, the adapter 8 constantly monitors the issued command, and if it determines that the command is addressed to itself, it takes it into the adapter.

The type of instruction taken into the internal unit is determined based on the decoder output, and the instruction is passed to each control unit.

Each control section operates to execute this instruction according to the rules. When the instruction execution is completed, the adapter's ICNT
The LII notifies the processor 16 of the completion of processing,
When the processor 16 receives this notification normally, it notifies the adapter 8 of this fact, and the series of processing ends.

When the adapter 8 fails and cannot operate normally, the signal A from ICNTLII causes the driver IO to change to high impedance and maintain that state.

FIG. 3 is a diagram showing another embodiment of the present invention, and shows the configuration of an adapter in which the adapter decoding circuit is provided separately from the instruction control section.

In the same figure, numbers 7 to 15 are the same as in FIG. 2, and 23 is an adapter disconnection command decoding circuit (DSA
D), 24 represents a flip-flop (FF).

In this embodiment, when an adapter disconnection command on the system bus 7 is received, the adapter disconnection command decoding circuit 23 decodes it and recognizes that it is for the own adapter.
Set the flip-flop 24.

This puts the driver 10 in a high impedance state.

FIG. 4 is a diagram showing an example of a circuit around the instruction control unit (ICNTL) of the adapter of the embodiment shown in FIG. 2.

In the figure, 7 is a system bus, 9 is a receiver,
is a driver, 25 is an output register, 26 is a multiplexer, 27-1 to 27-3 are respective control units, 28 is an input register, 29 is a decoder, 30 is a status register, 31 is an OR gate, 32.33 is a NAND gate. It represents.

In the figure, instructions issued from the processor side are taken into the adapter via a system bus 7. If it can be determined that this instruction is addressed to itself, it is captured in the input register 2nd, and then passed through the decoder 29 and sent to each control unit 27.
-1... is sent.

Each control section can be divided into, for example, a control section of the adapter itself, a control section of the device, and other control sections.

Further, there is a status register 30 that determines the status of each control unit and displays the status of the adapter, and defines the initial status, operable status, interrupt status, and inoperable status of the adapter.

When this status register 30 is in an inoperable state,
Only the instruction receiving circuit is active and constantly monitors instructions from the processor. In this state, the input register 28 determines that the instruction received is an instruction addressed to itself, and if the instruction is a disconnection instruction from the module, the output of the decoder 29 and the value of the status register 30 are determined as NAN.
The output of the D gate 32 becomes "0", and the output of the NAND gate 33 becomes "1" regardless of the state of the OR gate 31. As a result, the driver 10 becomes high impedance, and the adapter itself is disconnected from the system bus 7, so that it no longer adversely affects other modules.

During normal operation, the NAND gate 32 becomes "°1'' when the status register 30 is in the operable state, and the NAND gate 32
The ND gate 33 depends on the state of the OR gate 31, contrary to when it is in an inoperable state, and the state of the OR gate 31 is determined by factors such as transfer requests from each control section.

〔Effect of the invention〕

As explained above, according to the present invention, when a failure occurs in an adapter and it is necessary to replace it with a spare adapter or remove it from the system for repair, the processor issues a command to disconnect the adapter. Since the driver of the system bus connection part of the adapter can be maintained at high impedance, there is an advantage that the adapter can be removed without affecting other devices connected to the system bus.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the basic configuration of the present invention, Fig. 2 is a diagram showing an embodiment of the invention, Fig. 3 is a diagram showing another embodiment of the invention, and Fig. 4 is a diagram showing the embodiment. FIG. 5 is a diagram showing an example of a circuit around the instruction control unit of the adapter, and FIG. 5 is a diagram showing a part of the information processing system. l... System bus, 2... Adapter, 3, 10° 17... Driver, 4, 23... Adapter disconnection command decoding circuit, 5... High impedance holding circuit, 6° 9.18. ...Receiver, 7...System bus, 8.
...Adapter, 11...Instruction control unit (ICNTL),
12...Data control unit (DTCNTL), 13...
CPU. 14... Control storage (CS), 15... Input/output control unit (DVC), 16... Processor, 19... Instruction control unit (ICNTL), 20... Data control unit (DTC)
NTL), 21...CPU, 22...Main memory (LS
U), 24...Flip-flop, 25...Output register, 26...Multiplexer, 27-1 to 27-
3...Control unit, 28...Input register, 29...
Decoder, 30...Status register, 31...
OR Gate, 32.33... NAND Gate agent Patent attorney Takayoshi Honma 0 Losenosa book l! : A diagram showing one piece of bait and one piece of sand.

Claims (1)

[Claims] Connected to the processor via a system bus,
Based on instructions from the processor, the adapter device controls its own input/output devices and controls data transfer between the processor and the input/output devices, independent of the control system that controls the main operations of the adapter. a circuit for receiving and decoding an adapter disconnection command from the processor; and when the adapter disconnection command received by the circuit is decoded as being directed to the adapter, the output connection of the adapter to the system bus is placed in a high impedance state. A component device separation method characterized by having a circuit that maintains this state.