JPS6152752A - Fault display circuit - Google Patents

Abstract

PURPOSE:To attain fault detection in a program by allowing a control processor to start a processor element via a communication line and informing the own element number to the control processor via the communication line at occurrence of a fault. CONSTITUTION:If overflow takes place on the way of operation by the processor element 2-1, the level of a gate circuit 201 goes to logical 1 to drive a signal line 300 via a driver circuit 205, allowing to inform occurrence of the fault to the control processor 1. In this case, when no fault takes place in other processor element, an AND circuit 207 is operated and the number of the processor element having the fault is informed to the control processor 1. If the fault takes place in other processor element, since the level of a signal line 209 is logical 1, the signal is not transmitted to the communication line 301 and the processor element number is not informed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field to which the invention pertains) The present invention relates to a system having a plurality of processor elements and a control processor that controls them, in which a processor element in which an abnormality has occurred changes its own processor element number to the control processor. This relates to an abnormality display circuit that notifies people.

(Conventional technology) Conventionally, one method for performing high-speed scientific operations is to
A processing method in which multiple processor elements operate in parallel to execute operations such as matrix operations.

There is no problem if all processor elements are operating normally, but if even one processor element 1 or more becomes abnormal, the software detects the number of the processor element where the abnormality occurred. If an overflow or the like occurs in the middle of a calculation in the processor element 1-, The control processor needs to parse and rerun the data and needs to know the number to processor number 1 where the overflow occurred. In this case, if more than 1,000 processor elements notify the control processor of an abnormality through individual communication lines, the number of processor elements in which the abnormality has occurred will be sent to the control processor. The question is whether to notify them.

(Object of the Invention) In order to resolve the above-mentioned problem, the present invention provides an abnormality display circuit in which the processor element side notifies the control processor side of the occurrence of an abnormality and at the same time notifies its own processor element number. The drawings will be described in detail below.

(Forty-one features and functions of the invention) FIG. 1 is a block diagram of an embodiment showing the system configuration of the present invention, and 1 is a control processor.

2-1 to 2-4 are processor elements, 3-1, 3
-2 is a communication line that notifies the control processor when the processor element 1- becomes abnormal, and 4-1, 4-2 is a communication line that transfers information between the control processor and the processor element.

The control processor is the processor element 2-1 to 2-
4, the control processor connects communication line 4-1 to
, 4-2, the instructions and data are stored in the memory devices of all the processor elements 2-1 to 2-4, and then the processor elements are activated through the communication WiA 4-1.4-2 to execute the stored program. If, for example, an overflow occurs during an operation in the processor element 2-1, the processor element h2-1 notifies the control processor of the occurrence of an abnormality through the communication line 3-1.

The communication line 3-1 is connected to another processor element (2-
If no abnormality has occurred in step 2), the processor element 2-1 sends its own processor element number 2-1 to the communication line 3-1 and informs the control processor. If an abnormality has occurred, the processor element number will not be notified.

FIG. 2 is a block diagram of an embodiment of the present invention,
1 is the control processor, 2-1.2-2 is the processor element, which is the same as in FIG. 2, detection of illegal instructions, program runaway, etc.
01 is a gate circuit that ORs abnormality causes 200, 202
is a flip-flop that remembers the occurrence of an abnormality, 203
is a logic It 177 when initialized by the control processor 1 on the reset signal line of the flip-flop 202 before the processor element is activated, and resets the flip-flop 202. Also, the communication line 4 in Figure 1
It is also possible to initialize only the processor element 2-1 using the reset signal line 203.
becomes logic "1" and resets the flip-flop 202. 204 is an OR circuit, 205 is a driver circuit, 2
06 is a register storing the number 2-1 of its own processor element, 207 is an AND circuit, 208 is a driver circuit, 209 is the output of the driver circuit 205 of processor element 1-2-2, which is logic-13, II Q II
This means that the signal lines 300, 301 indicate that no abnormality has occurred in processor elements other than processor element 2-1.
is the same as communication line 3-1.3-2 in Figure 1, and 300
indicates that an abnormality has occurred in the processor element.
1 is a signal line that notifies the number. Note that the output of the register 206 has a plurality of bits, and the flow of information is shown by a thick line.

For example, if an overflow occurs during an operation in the processor element 2-1, the gate circuit 201
I and sets the flip-flop 202, and the information is stored in the OR circuit 204. The signal line 300 is driven through the driver circuit 205 to notify the control processor 1 that an abnormality has occurred. At this time, if no abnormality has occurred in other processor elements, the AND circuit 207 operates, sends the contents of the register 206 to the communication line 301 via the driver circuit 208, and sends the contents of the register 206 to the communication line 301, 1, the number to the processor i where the error occurred is sent.

If an abnormality has occurred in another processor element, the number of that processor element has already been sent to the communication line 301, so the processor element l-2-
1 needs to stop sending the number. That is, in this case,
Since the signal line 209 has the logic II II I+, the AND circuit 207 does not operate and the contents of the 1-noister 206 are not sent to the communication line 301. Note that the signal line 209 is connected to the communication line 3 through the OR circuit 203 and the driver circuit 205.
00, and it is possible to notify the control processor 1 that there is an abnormality in another processor element even if the flip-flop 202 is not set.

The control processor 1 finds that the processor element 2-1 is abnormal, and after processing it according to the program,
When the processor element 2-1 is initialized, the reset signal line 203 becomes logic LL I I+, and the flip-flop 202 is reset. If an abnormality occurs in processor element 2-1.2-2, the flip-flop 202 in processor element 2-2
is reset, the 1 communication line 300 continues to be at logic HI I+, and the signal line 209 is now at logic II O
Therefore, the number of the processor 1-2-1 is sent to the communication line 3 old.

With such a configuration, it is possible to read the number of processor number 1- in which an abnormality has occurred using a program within the control processor.

(Effects) As explained above, according to the present invention, the number of the processor element in which the abnormality has occurred is read by the program in the control processor, so that subsequent analysis, processing, etc. can be performed without human intervention. There are advantages to implementing it.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the system configuration of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention. 1...Control processor, 2-1 to 2-4...Procerasaniremen 1 to . 3-1.3-2.4-1.4-2
... Communication line, 200 ... Cause of abnormality, 201 ... Gate circuit, 202 ... Flip-flop, 203 ...
- Reset signal line, 204...OR circuit, 205
... Driver circuit, 206... Register, 20
7...Logic product circuit. 208... Driver circuit, 209... Signal line, 3
00.301...Communication line. Patent applicant Nippon Telegraph and Telephone Corporation! 2+“ Figure 1

Claims (1)

[Claims] A plurality of processor elements, a control processor that controls them, a communication line that notifies the control processor when a processor element becomes abnormal, and a communication line that transfers information between the control processor and the processor element. When the control processor starts up a processor element, it does so through a communication line, and when an abnormality occurs in a processor element, the processor element notifies the control processor through the communication line, and also sends a message to another processor element on the communication line. If no abnormality has occurred, it will send its own processor element number to that communication line to inform the control processor, and if an abnormality has occurred in another processor element, it will send its own processor element number to that communication line. An abnormality display circuit characterized by suppressing notification.