JPS59170951A - Electronic apparatus - Google Patents

Abstract

PURPOSE:To prevent a system from being damaged due to noise or specific phenomena by resetting an abnormal CPU at the generation of abnormality in the CPU and restarting the CPU, in an electronic apparatus including plural CPUs. CONSTITUTION:When a sub-CPU121 can not answer to a main CPU11 because of noise or a specific phenomenon generated with extremely low probability, a timer 16 overs a prescribed time, so that the CPU11 decides the generation of abnormality in the CPU121 and outputs a ''0'' signal to a corresponding I/O port terminal to reset the CPU121. In an electronic apparatus carrying and dividing sheets e.g., a division gate is temporally changed so as to attain restarting the division gate and then outputs the ''0'' signal to the I/O port terminal, so that the CPU11 transfers necessary data to the CPU121 again to make the CPU121 execute normal operation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an electronic device having a plurality of CPUs (Central Processing Units).

[Technical background of the invention and its problems]

Recently, multiple CPUs are often used in a single electronic device, as well as large-scale system devices such as electronic devices that transport and sort paper sheets. Things are becoming more complex.The problem then becomes: what to do if one of these CPUs becomes abnormal?

Usually, as shown in FIG. 1, one main CPU 1 has a plurality of sub CPUs 2. There are many configurations in which ~2n'jC are connected, and when an abnormality occurs in the sub CPU u z or ~2n, conventionally, the main CPU f operates in a manner that allows it to recognize the abnormality seed 'fc according to the location where the abnormality has occurred] They took measures to bring down the entire system by displaying the information on computers and networks. However, in electronic devices that use such methods, it is extremely difficult to find the cause of extremely rare noises or abnormalities that occur when rare conditions occur during system operation, and it is extremely difficult to find the cause. There has been a problem in that downtime is extended and the usage efficiency of electronic equipment is significantly reduced.

[Purpose of the invention]

The present invention has been made in view of the above circumstances, and its purpose is to provide an electronic device that can be prevented from going down due to noise or unusual phenomena, and whose operating rate can be dramatically improved.

[Summary of the invention]

The present invention provides an electronic device having a plurality of CPUs,
If an abnormality occurs in the CPU, the abnormality can be detected by another specific CPU.
When the PU detects this, the electronic device is set to the safe side, the abnormal CPU f9 is set, and a restart is performed, thereby completely preventing the electronic device from going down.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 2, 11 is the main CPU, 121 to 12.
Reference numeral 1 denotes sub CPUs each controlled by this main CPU I, and these are connected by a path line 13. It consists of the above-mentioned pass line 131d, y'-tabus line, address bus line, and control line.

14 is a reset switch, which may be a push button switch, a power initial switch, or a logical OR of both. 15. ~15n are NOR circuits, each output of which is supplied to each reset terminal of the sub CPUs 12+~12n, respectively. The reset signal from the reset switch 14 is supplied to the reset terminal of the main CPIJ 2Z, and is also supplied to one input terminal of each of the NOR circuits 151 to 15n. Also, the main CPU
1 input/output port terminals are NOR circuits 151 to 15, respectively.
It is connected to the input terminal of each region of n. Furthermore, main C
A timer 16 is connected to the PU 11 for detecting abnormalities in the sub CPU.

The operation in such a configuration will be explained. After powering on,
During the initial power supply, the reset switch 14 is in the on state, so the main CPU1, sub C', and PU1
2. ~12n are each reset. Then, when the reset switch 14 turns off, the main CPU
I starts operation, and normally the sub CPU 12. 12n transfers data (or commands) necessary for operation, and at the same time, each sub CPU 12 . ~12
Set the processing time required by n for each CPU. Sub CPU12. ~12n, after realizing the specified range of functions according to the data transferred from the main CPU II, or the progress in the process.
Transfer to II. The main CPU 11 is the sub CPU 1
2. It makes a comprehensive judgment based on the data transferred from ~12n, performs various data processing or control, and checks whether there is a predetermined response from each sub CPU 12, ~12n within a predetermined time set in the timer 16. If there is no response, it is determined that an abnormality has occurred in the CPU and the CPU is reset. That is, for example, sub CPUZ2. The main CPUJ
Suppose that it becomes impossible to respond to J. This happens when,
There is no response from the sub CPU 121 to the main CPU 1, and the timer 16 then stops, so the main CPU 1 sends the sub CPU 2. It is determined that an abnormality has occurred in the sub CPU 12, and a ``0'' signal is output to the corresponding input/output port terminal to completely reset the sub CPU 12. In this case, for example, in an electronic device that transports and sorts paper sheets, after temporarily changing all the sorting molecules so that they can be reprocessed, all "0" signals are output to the input/output port terminals, and the main
The cPU 11 transfers necessary data to the reheave cPU 12I and causes it to perform normal operations. As a result, one sheet of paper that could not be processed due to the occurrence of noise or a peculiar phenomenon I7 can be transported to the reprocessing pocket, and other sheets can be processed as usual. One sheet in the reprocessing pocket can be reprocessed together with other paper sheets. By doing so, it is possible to prevent the electronic device from going down due to noise or unusual phenomena, and the operating rate of the electronic device can be dramatically improved.

Note that in the above embodiment, the main CPU is connected to a plurality of sub CPUs.
v1 (applied to the case of managing and resetting, but conversely, it can also be applied when one of the sub CPUQs manages and resets the operation of the main CPU.

〔Effect of the invention〕

As described in detail above, according to the present invention, it is possible to provide an electronic device that is prevented from going down due to noise or unusual phenomena, and whose operating rate is dramatically improved.

FIG. 1 is a block diagram of a conventional electronic device, and FIG. 2 is a block diagram showing an embodiment of the present invention.

11... Main CPU, 12. ~12I,...Sub CPU, Z,? ...Pass line, 14...Reset switch, 15□~15n...NOR circuit, 16...
timer.

Claims (1)

[Claims] (1.) In an electronic device having a plurality of CPUs (central processing units), the CPU
When at least one specific CPU in 0 detects an abnormality in another CPU, the CPU 6
An electronic device characterized by being configured to be reset. (2) Multiple CPUs are connected to the main CPTJ and this main C
I) There are sub-cPUs controlled by U, with a specific CPU being the main CPU and other CPUs being sub-CPUs.
A manufacturing device according to claim 1. +31% The method of detecting an abnormality when a certain cPU has generated other cP'o+ is to detect whether or not there is a response within a predetermined time to a request output from a specific CPU to another CPU. An electronic device according to claim 1 having all the characteristics.