JPH0472260B2 - - Google Patents

Info

Publication number
JPH0472260B2
JPH0472260B2 JP56197180A JP19718081A JPH0472260B2 JP H0472260 B2 JPH0472260 B2 JP H0472260B2 JP 56197180 A JP56197180 A JP 56197180A JP 19718081 A JP19718081 A JP 19718081A JP H0472260 B2 JPH0472260 B2 JP H0472260B2
Authority
JP
Japan
Prior art keywords
circuit
clock
bus
signal
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP56197180A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5897731A (ja
Inventor
Yoshimune Hagiwara
Shigemichi Maeda
Takashi Akazawa
Shizuo Sugyama
Haruo Koizumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Kokusai Denki Electric Inc
Original Assignee
Hitachi Denshi KK
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK, Hitachi Ltd filed Critical Hitachi Denshi KK
Priority to JP56197180A priority Critical patent/JPS5897731A/ja
Publication of JPS5897731A publication Critical patent/JPS5897731A/ja
Publication of JPH0472260B2 publication Critical patent/JPH0472260B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G06F13/4077—Precharging or discharging

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
JP56197180A 1981-12-07 1981-12-07 論理集積回路の入出力制御方式 Granted JPS5897731A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56197180A JPS5897731A (ja) 1981-12-07 1981-12-07 論理集積回路の入出力制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56197180A JPS5897731A (ja) 1981-12-07 1981-12-07 論理集積回路の入出力制御方式

Publications (2)

Publication Number Publication Date
JPS5897731A JPS5897731A (ja) 1983-06-10
JPH0472260B2 true JPH0472260B2 (enrdf_load_stackoverflow) 1992-11-17

Family

ID=16370129

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56197180A Granted JPS5897731A (ja) 1981-12-07 1981-12-07 論理集積回路の入出力制御方式

Country Status (1)

Country Link
JP (1) JPS5897731A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6352254A (ja) * 1986-08-21 1988-03-05 Ascii Corp メモリ装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5498546A (en) * 1978-01-23 1979-08-03 Nec Corp Test system for data processor
JPS6010664B2 (ja) * 1979-01-29 1985-03-19 富士通株式会社 ワンチツプ・プロセツサ

Also Published As

Publication number Publication date
JPS5897731A (ja) 1983-06-10

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