JPH0470623A - Manufacture of element substrate of liquid crystal display device - Google Patents

Manufacture of element substrate of liquid crystal display device

Info

Publication number
JPH0470623A
JPH0470623A JP2178702A JP17870290A JPH0470623A JP H0470623 A JPH0470623 A JP H0470623A JP 2178702 A JP2178702 A JP 2178702A JP 17870290 A JP17870290 A JP 17870290A JP H0470623 A JPH0470623 A JP H0470623A
Authority
JP
Japan
Prior art keywords
conductor
insulator
transparent substrate
liquid crystal
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2178702A
Other languages
Japanese (ja)
Inventor
Kotoyoshi Takahashi
高橋 士良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2178702A priority Critical patent/JPH0470623A/en
Priority to DE69109547T priority patent/DE69109547T2/en
Priority to EP91111072A priority patent/EP0464810B1/en
Priority to US07/726,072 priority patent/US5246468A/en
Publication of JPH0470623A publication Critical patent/JPH0470623A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve yield by manufacturing a picture element electrode by leaving a first insulating body on the surface other than the side plane of a first conductor by etching, and forming a second in-sulating body and a second conductor on the side plane of the first conductor. CONSTITUTION:The picture element electrode 4 is manufactured by forming the first conductor 1 on a transparent substrate 7, filming the first insulating body 6 on the first conductor 1 and the transparent substrate 7, and furthermore,applying exposure from the back plane of the transparent substrate 7 by applying positive resist 5, performing the development of the positive resist 5, leaving the first insulating body 6 on the surface of the first conductor 1 except for the side plane 2 of the first conductor 1 by etching the first insulating body 6, forming the second insulating body 8 on the side plane 2 of the first conductor 1, and forming the second conductor 3. Therefore, it is possible to prevent the step separation of the second conductor 3 on the side plane of the first conductor pattern 1 from occurring, and to uniformalize the element area of a rateral MIM consisting of a part where the first conductor 1, the second insulating body 8, and the second conductor 3 are superimposed. In such a way, the yield can be improved.

Description

【発明の詳細な説明】 [産業上の利用分野] 液晶表示装置の製造方法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a liquid crystal display device.

[従来の技術] 従来の液晶表示装置の素子基板上の平面図を第3図に示
す。第4図は、第3図のaa’による断面図である。
[Prior Art] FIG. 3 shows a plan view of an element substrate of a conventional liquid crystal display device. FIG. 4 is a sectional view taken along aa' of FIG. 3.

第3図は、画素を駆動するための画素用素子としてメタ
ル インシュレーター メタル(Metal  In5
ulator  Metal、以下MIM)をもちいた
場合を示している。さらに第4図から第3図のMIMは
、第1の導電体(1)の側面(2)だけを画素用素子と
して利用するラテラルMIMの構造を用いていることが
わかる。
Figure 3 shows a metal insulator (Metal In5) as a pixel element for driving pixels.
The case is shown in which ulator metal (hereinafter referred to as MIM) is used. Furthermore, it can be seen that the MIMs shown in FIGS. 4 to 3 use a lateral MIM structure in which only the side surface (2) of the first conductor (1) is used as a pixel element.

ラテラルMIMは、第4図のように第1の導電体(1)
の側面(2)、つまりMIMを形成する部分以外の表面
を第1の絶縁体(以下、バリア層)で覆い、第1の絶縁
体の電気抵抗を高くしてMIM素子として働がないよう
にしたものである。
Lateral MIM has a first conductor (1) as shown in Figure 4.
The side surface (2), that is, the surface other than the part where the MIM is formed, is covered with a first insulator (hereinafter referred to as a barrier layer) so that the electrical resistance of the first insulator is increased so that it does not function as an MIM element. This is what I did.

このような構造にすることで、MIM素子の面積を非常
に小さくすることができる。MIM素子を画素用素子に
用いた液晶表示装置の高密度化、高精細化には有効な技
術である。
By adopting such a structure, the area of the MIM element can be made extremely small. This is an effective technique for increasing the density and definition of liquid crystal display devices that use MIM elements as pixel elements.

従来の液晶表示装置の素子基板の製造プロセスを第5図
(a)〜(e)にしめす。
The manufacturing process of a conventional element substrate of a liquid crystal display device is shown in FIGS. 5(a) to 5(e).

透明基板(7)上に第1の導電体(1)を形成する。 
 (a) 第1の導電体(1)上にバリア層(6)を形成する。 
 (b) 第1の導電体とバリア層を同時にフォトエツチングによ
ってパターニングする。 (C)第1の導電体の側面(
2)に第2の絶縁体(8)を形成する。 (d) 第2の導電体(3)と画素電極(4)をそれぞれ形成し
バターニングする。 (e) ここで、第1の導電体(1)と第2の絶縁体(8)さら
に第2の導電体(3)の重なる部分がMIM素子を形成
する。
A first conductor (1) is formed on a transparent substrate (7).
(a) Forming a barrier layer (6) on the first conductor (1).
(b) Patterning the first conductor and barrier layer simultaneously by photoetching. (C) Side surface of the first conductor (
2) forming a second insulator (8); (d) Form and pattern the second conductor (3) and pixel electrode (4), respectively. (e) Here, the overlapping portions of the first conductor (1), the second insulator (8), and the second conductor (3) form an MIM element.

MIM素子に用いられる導電体として、Ta、A1、A
u、IT○、NiCr+AuさらにITQ+Crなどが
よく知られている。また第2の絶縁体として、TaOx
、SiOx、SiNx、SiOxNy、TaNx、Zn
0xなどが良く知られている。これらの第2の絶縁膜は
、熱酸化や陽極酸化、またはスパッタリングなどで形成
される。
Ta, A1, A1 are used as conductors for MIM devices.
u, IT○, NiCr+Au, and ITQ+Cr are well known. In addition, as the second insulator, TaOx
, SiOx, SiNx, SiOxNy, TaNx, Zn
0x etc. are well known. These second insulating films are formed by thermal oxidation, anodic oxidation, sputtering, or the like.

またバリア層には、上記第2の絶縁膜に使われる無機材
料のほかにポリイミドなどの有機膜を用いるものも知ら
れている。
In addition to the inorganic material used for the second insulating film, it is also known that the barrier layer uses an organic film such as polyimide.

MIM素子として最もよく知られている構造は、第1の
導電体(1)にTa(タンタル)第2の絶縁体(8)に
TaOx (酸化タンタル)、第2の導電体(3)にC
r(クロム)を用いたものである。
The most well-known structure for MIM elements is Ta (tantalum) for the first conductor (1), TaOx (tantalum oxide) for the second insulator (8), and C for the second conductor (3).
It uses r (chromium).

以下、MIM素子として代表的な構造であるT a /
 T a Ox / Crを用いて説明する。
Below, T a / which is a typical structure as an MIM element
This will be explained using T a Ox / Cr.

バリア層としては、TaOxを用いて説明する。The description will be made using TaOx as the barrier layer.

[発明が解決しようとする課題] しかしながら従来の第5図で示される製造方法では、著
しく歩留まりが悪く、実用的でないという問題点があっ
た。
[Problems to be Solved by the Invention] However, the conventional manufacturing method shown in FIG. 5 has a problem in that the yield is extremely low and it is not practical.

このことを第6図(a)〜(b)、 (c)〜(e)を
用いて説明する。
This will be explained using FIGS. 6(a)-(b) and (c)-(e).

第6図(C)においてエツチングを行なうが、一般に絶
縁体である酸化膜や窒化膜は導電体である金属膜よりも
エツチングレートが遅い。TaとTaoxではTaOx
のほうが1/2程度のエツチングレートでありTaNx
の場合には、さらに差が開く。従って第6図(C)に示
されるようにTa(1)の側面(2)がオーバーハング
形状となる。
Etching is performed in FIG. 6C, but generally an oxide film or a nitride film which is an insulator has a slower etching rate than a metal film which is a conductor. Ta and Taox are TaOx
The etching rate is about 1/2 that of TaNx.
In the case of , the difference becomes even wider. Therefore, as shown in FIG. 6(C), the side surface (2) of Ta (1) has an overhang shape.

第6図(d)でTaOx (8)を形成し第6図(e)
でCr (3)と画素電極(4)を形成するが、Cr(
3)を形成するときにTaの側面(2)のオーバーハン
グでCrが段差切れをおこしてしまう。またCrの段差
切れが無い場合でもTaの側面(2)の形状(テーパー
形状)を制御することができないためラテラルMIM素
子の面積を制御できないことになる。
Figure 6(d) forms TaOx (8) and Figure 6(e)
The pixel electrode (4) is formed with Cr (3), but Cr (
3), the overhang of the Ta side surface (2) causes a step break in the Cr. Further, even if there is no step cut in Cr, the shape (tapered shape) of the side surface (2) of Ta cannot be controlled, so the area of the lateral MIM element cannot be controlled.

MIM素子の素子面積が制御できないということは、液
晶表示装置にとって画素の表示状態が制御できないこと
になり、致命的な欠陥となる。
The fact that the element area of the MIM element cannot be controlled means that the display state of the pixels cannot be controlled for the liquid crystal display device, which is a fatal defect.

このように従来の製造方法では著しく歩留まりが悪く実
用的でないという問題点があった。
As described above, the conventional manufacturing method has a problem in that the yield is extremely low and it is not practical.

[課題を解決するための手段] 本発明による液晶表示装置の素子基板の製造方法は、透
明基板上に第1の導電体と、該第1の導電体の側面を除
く表面に形成された第1の絶縁体と、該第1の導電体の
側面に形成された第2の絶縁体と、第2の導電体を積層
してなり、該第1の導電体と該第2の絶縁体と該第2の
導電体の重なる部分が、液晶表示装置の画素電極を駆動
するための画素用素子となる液晶表示装置の素子基板に
おいて、該透明基板上に該第1の導電体を形成し、該第
1の導電体と該透明基板上に該第1の絶縁体を膜付けし
、さらにポジレジストを塗布し該透明基板の裏面から露
光を行い、該ポジレジストの現像を行い、該第1の導電
体の側面を除く該第1の導電体の表面上の該第1の絶縁
体を該第1の絶縁体のエツチングによって残し、該第1
の導電体の側面に第2の絶縁体を形成し、該第2の導電
体を形成し、該画素電極を形成したことを、特徴とする
[Means for Solving the Problems] A method for manufacturing an element substrate for a liquid crystal display device according to the present invention includes a first conductor on a transparent substrate, and a first conductor formed on the surface of the first conductor except for the side surfaces. A first insulator, a second insulator formed on a side surface of the first conductor, and a second conductor are laminated, and the first conductor and the second insulator are laminated. forming the first conductor on the transparent substrate in an element substrate of a liquid crystal display device in which the overlapping portion of the second conductor becomes a pixel element for driving a pixel electrode of the liquid crystal display device; The first insulator is deposited on the first conductor and the transparent substrate, a positive resist is applied, exposure is performed from the back side of the transparent substrate, the positive resist is developed, and the first etching the first insulator to leave the first insulator on the surface of the first conductor except for the side surfaces of the first conductor;
A second insulator is formed on a side surface of the conductor, the second conductor is formed, and the pixel electrode is formed.

[実施例] 本発明による液晶表示装置の素子基板の製造プロセスを
第1図(a)〜(f)に示し、本図を用いて説明する。
[Example] A manufacturing process of an element substrate of a liquid crystal display device according to the present invention is shown in FIGS. 1(a) to 1(f), and will be explained using these figures.

透明基板(7)上にTa膜を膜付けする。 (a)ホト
エツチングによりTaパターンを形成する。
A Ta film is deposited on a transparent substrate (7). (a) A Ta pattern is formed by photoetching.

(b) 透明基板(7)及びTaパターン(1)上にバリア層の
TaOx膜を膜付けする。 (C)Taパターン(1)
上のTaOx (6)だけ残しバリア層とするためにホ
トエツチングを行なう。
(b) A TaOx film as a barrier layer is deposited on the transparent substrate (7) and the Ta pattern (1). (C) Ta pattern (1)
Photoetching is performed to leave only the upper TaOx (6) as a barrier layer.

(C) 薄いTa0x(8)を陽極酸化または熱酸化によって膜
付けする。 (e) Crと画素電極を膜付けし、ホトエツチングによりCr
パターン(3)と画素電極パターン(4)を形成する。
(C) A thin film of Ta0x (8) is deposited by anodic oxidation or thermal oxidation. (e) Cr and pixel electrode are deposited as a film, and Cr is removed by photo-etching.
A pattern (3) and a pixel electrode pattern (4) are formed.

 (f) 第1図(C)と(d)の工程が本発明に特徴的なプロセ
スである。
(f) The steps shown in FIG. 1(C) and (d) are the processes characteristic of the present invention.

第1図(C)〜(d)の工程を詳細に示したものが第2
図(a)〜(d)である。
The second figure shows the steps in Figures 1(C) to (d) in detail.
Figures (a) to (d).

ここで第1図(C)の工程は、バリア層の膜付けである
が、Taox膜をスパッタリングやCvD(ケミカル 
ベイバー デポジション)などの方法で行なう。バリア
層をTaOx膜以外の材料(例えば、TaNx、SiN
xなど)で行なう場合も同様である。
Here, the step shown in FIG. 1(C) is to form a barrier layer, and the Taox film is deposited by sputtering or CvD (chemical).
This is done using methods such as barber deposition. The barrier layer is made of a material other than TaOx film (for example, TaNx, SiN
The same applies to the case of using x, etc.).

第1図(d)の工程でバリア層のTaOx膜をTaパタ
ーン上に残す方法は以下のように行なう。
The method of leaving the TaOx film of the barrier layer on the Ta pattern in the step of FIG. 1(d) is carried out as follows.

第2図(a)〜(d)を用いて説明する。This will be explained using FIGS. 2(a) to 2(d).

透明基板(7)の膜面(Taパターンの存在する面)に
ポジレジスト(光の当たらない部分が残るレジスト)を
塗布する。次に透明基板の膜面と逆の面つまり透明基板
の裏側がら露光を行なう。
A positive resist (a resist that leaves areas not exposed to light) is applied to the film surface (the surface where the Ta pattern is present) of the transparent substrate (7). Next, exposure is performed from the opposite side of the transparent substrate to the film surface, that is, from the back side of the transparent substrate.

第2図(b) TaOxなどの酸化膜や窒化膜は透明膜であるので、不
透明膜であるTaパターン上のポジレジストだけが露光
されないことになる。従って現像を行なえばTaパター
ン上のレジストだけが残る。
FIG. 2(b) Since an oxide film such as TaOx or a nitride film is a transparent film, only the positive resist on the Ta pattern, which is an opaque film, is not exposed. Therefore, when development is performed, only the resist on the Ta pattern remains.

第2図(c) つぎにバリア層であるTaOxのエツチングを行なう。Figure 2(c) Next, the barrier layer of TaOx is etched.

第2図(d) 従来の工程の第6図(C)で示される状態と異なり、エ
ツチングされる膜は透明基板上全面に膜付けされたTa
Ox膜でありエツチングレートは、そろっていることに
なる。従ってTaパターン(1)の側面(2)がオーバ
ーハング状にならないようにエツチングすることができ
る。またTaパターンの側面(2)のテーパー形状は、
第1図(b)の工程で既に形成されているので均一で良
好な側面形状を得ることができる。  これによって、
Cr(3)がTaパターンの側面で段差切れをおこさず
、Ta(1)とTaOx (8)とCr(3)の重なる
部分からなるラテラルMIMの素子面積も均一にするこ
とができる。
FIG. 2(d) Unlike the state shown in FIG. 6(C) in the conventional process, the film to be etched is a Ta film deposited on the entire surface of the transparent substrate.
Since it is an Ox film, the etching rate is the same. Therefore, the side surface (2) of the Ta pattern (1) can be etched without overhanging. In addition, the tapered shape of the side surface (2) of the Ta pattern is
Since it has already been formed in the process shown in FIG. 1(b), it is possible to obtain a uniform and good side surface shape. by this,
Cr(3) does not cause step cuts on the side surfaces of the Ta pattern, and the element area of the lateral MIM made of the overlapping portions of Ta(1), TaOx(8), and Cr(3) can be made uniform.

[発明の効果コ 以上述べたように本発明の製造プロセスによって、ラテ
ラルMIMを画素用素子に用いた液晶表示装置の素子基
板を高い歩留まりで提供することができる。
[Effects of the Invention] As described above, by the manufacturing process of the present invention, element substrates for liquid crystal display devices using lateral MIMs as pixel elements can be provided at a high yield.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明による液晶表示装置の素子基板の製造
方法を示す断面図。 第2図は、本発明による液晶表示装置の素子基板の製造
方法を示す断面図。 第3図は、液晶表示装置の素子基板の部分平面図。 第4図は、第3図のaa’による断面図。 第5図は、従来の液晶表示装置の素子基板の製造方法を
示す断面図。 第6図は、従来の液晶表示装置の素子基板の製造方法を
示す断面図。 1第、■の導電体(Ta) 2第1の導電体の側面 3第2の導電体(Cr) 画素電極 ポジレジスト 6第1の絶縁体(TaOx) (バリア層) 7透明基板 8第2の絶縁体(TaOx) 以上
FIG. 1 is a sectional view showing a method of manufacturing an element substrate of a liquid crystal display device according to the present invention. FIG. 2 is a cross-sectional view showing a method of manufacturing an element substrate of a liquid crystal display device according to the present invention. FIG. 3 is a partial plan view of an element substrate of a liquid crystal display device. FIG. 4 is a sectional view taken along aa' in FIG. 3. FIG. 5 is a cross-sectional view showing a conventional method of manufacturing an element substrate of a liquid crystal display device. FIG. 6 is a cross-sectional view showing a conventional method of manufacturing an element substrate of a liquid crystal display device. 1. Conductor (Ta) 2. Side surface of the first conductor 3. Second conductor (Cr) Pixel electrode positive resist 6. First insulator (TaOx) (barrier layer) 7. Transparent substrate 8. 2. Insulator (TaOx) or more

Claims (1)

【特許請求の範囲】[Claims] 透明基板上に第1の導電体と、該第1の導電体の側面を
除く表面に形成された第1の絶縁体と、該第1の導電体
の側面に形成された第2の絶縁体と、第2の導電体を積
層してなり、該第1の導電体と該第2の絶縁体と該第2
の導電体の重なる部分が、液晶表示装置の画素電極を駆
動するための画素用素子となる液晶表示装置の素子基板
において、該透明基板上に該第1の導電体を形成し、該
第1の導電体と該透明基板上に該第1の絶縁体を膜付け
し、さらにポジレジストを塗布し該透明基板の裏面から
露光を行い、該ポジレジストを現像し、該第1の導電体
の側面を除く該第1の導電体の表面上の該第1の絶縁体
を該第1の絶縁体のエッチングによって残し、該第1の
導電体の側面に第2の絶縁体を形成し、該第2の導電体
を形成し、該画素電極を形成したことを、特徴とする液
晶表示装置の素子基板の製造方法。
A first conductor on a transparent substrate, a first insulator formed on the surface of the first conductor except for the side surfaces, and a second insulator formed on the side surfaces of the first conductor. and a second conductor, the first conductor, the second insulator, and the second conductor.
In an element substrate of a liquid crystal display device in which an overlapping portion of the conductors serves as a pixel element for driving a pixel electrode of the liquid crystal display device, the first conductor is formed on the transparent substrate, and the first conductor is formed on the transparent substrate. The first insulator is coated on the conductor and the transparent substrate, and a positive resist is applied and exposed from the back side of the transparent substrate. The positive resist is developed to form a film of the first conductor. etching the first insulator to leave the first insulator on the surface of the first conductor except for the side surfaces, forming a second insulator on the side surfaces of the first conductor; A method for manufacturing an element substrate for a liquid crystal display device, characterized in that a second conductor is formed and the pixel electrode is formed.
JP2178702A 1990-07-06 1990-07-06 Manufacture of element substrate of liquid crystal display device Pending JPH0470623A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2178702A JPH0470623A (en) 1990-07-06 1990-07-06 Manufacture of element substrate of liquid crystal display device
DE69109547T DE69109547T2 (en) 1990-07-06 1991-07-04 Method of manufacturing a substrate for a liquid crystal display device.
EP91111072A EP0464810B1 (en) 1990-07-06 1991-07-04 Method for producing an element substrate for a liquid crystal display device
US07/726,072 US5246468A (en) 1990-07-06 1991-07-05 Method of fabricating a lateral metal-insulator-metal device compatible with liquid crystal displays

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2178702A JPH0470623A (en) 1990-07-06 1990-07-06 Manufacture of element substrate of liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH0470623A true JPH0470623A (en) 1992-03-05

Family

ID=16053065

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2178702A Pending JPH0470623A (en) 1990-07-06 1990-07-06 Manufacture of element substrate of liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH0470623A (en)

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