JPH0469411B2 - - Google Patents

Info

Publication number
JPH0469411B2
JPH0469411B2 JP58210985A JP21098583A JPH0469411B2 JP H0469411 B2 JPH0469411 B2 JP H0469411B2 JP 58210985 A JP58210985 A JP 58210985A JP 21098583 A JP21098583 A JP 21098583A JP H0469411 B2 JPH0469411 B2 JP H0469411B2
Authority
JP
Japan
Prior art keywords
resist
resist layer
layer
opening
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58210985A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60103614A (ja
Inventor
Hitoshi Tsuji
Chiharu Kato
Hiroshi Ishitani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58210985A priority Critical patent/JPS60103614A/ja
Publication of JPS60103614A publication Critical patent/JPS60103614A/ja
Publication of JPH0469411B2 publication Critical patent/JPH0469411B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP58210985A 1983-11-11 1983-11-11 半導体装置の製造方法 Granted JPS60103614A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58210985A JPS60103614A (ja) 1983-11-11 1983-11-11 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58210985A JPS60103614A (ja) 1983-11-11 1983-11-11 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS60103614A JPS60103614A (ja) 1985-06-07
JPH0469411B2 true JPH0469411B2 (enExample) 1992-11-06

Family

ID=16598398

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58210985A Granted JPS60103614A (ja) 1983-11-11 1983-11-11 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS60103614A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006108500A (ja) * 2004-10-07 2006-04-20 Shin Etsu Polymer Co Ltd 導電パターンの形成方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58204532A (ja) * 1982-05-24 1983-11-29 Hitachi Ltd パタ−ン形成方法

Also Published As

Publication number Publication date
JPS60103614A (ja) 1985-06-07

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