JPH0467226B2 - - Google Patents
Info
- Publication number
- JPH0467226B2 JPH0467226B2 JP10951282A JP10951282A JPH0467226B2 JP H0467226 B2 JPH0467226 B2 JP H0467226B2 JP 10951282 A JP10951282 A JP 10951282A JP 10951282 A JP10951282 A JP 10951282A JP H0467226 B2 JPH0467226 B2 JP H0467226B2
- Authority
- JP
- Japan
- Prior art keywords
- interlock
- processor
- output
- signal
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10951282A JPS58225467A (ja) | 1982-06-25 | 1982-06-25 | マルチプロセツサシステムにおけるインタロツク方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10951282A JPS58225467A (ja) | 1982-06-25 | 1982-06-25 | マルチプロセツサシステムにおけるインタロツク方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58225467A JPS58225467A (ja) | 1983-12-27 |
JPH0467226B2 true JPH0467226B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-10-27 |
Family
ID=14512138
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10951282A Granted JPS58225467A (ja) | 1982-06-25 | 1982-06-25 | マルチプロセツサシステムにおけるインタロツク方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58225467A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61198355A (ja) * | 1985-02-28 | 1986-09-02 | Toshiba Corp | マルチプロセツサシステム |
JPH0664567B2 (ja) * | 1989-12-25 | 1994-08-22 | 株式会社日立製作所 | 多重プロセッサシステム |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51131232A (en) * | 1975-05-12 | 1976-11-15 | Toshiba Corp | Computer composit system |
JPS5289438A (en) * | 1976-01-21 | 1977-07-27 | Hitachi Ltd | Request selection device |
-
1982
- 1982-06-25 JP JP10951282A patent/JPS58225467A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS58225467A (ja) | 1983-12-27 |
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