JPH0465571B2 - - Google Patents

Info

Publication number
JPH0465571B2
JPH0465571B2 JP58240104A JP24010483A JPH0465571B2 JP H0465571 B2 JPH0465571 B2 JP H0465571B2 JP 58240104 A JP58240104 A JP 58240104A JP 24010483 A JP24010483 A JP 24010483A JP H0465571 B2 JPH0465571 B2 JP H0465571B2
Authority
JP
Japan
Prior art keywords
transistor
output terminal
load element
input
gate circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58240104A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60130921A (ja
Inventor
Masaru Hashirano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58240104A priority Critical patent/JPS60130921A/ja
Publication of JPS60130921A publication Critical patent/JPS60130921A/ja
Publication of JPH0465571B2 publication Critical patent/JPH0465571B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP58240104A 1983-12-20 1983-12-20 多入力ｃｍｏｓゲ−ト回路 Granted JPS60130921A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58240104A JPS60130921A (ja) 1983-12-20 1983-12-20 多入力ｃｍｏｓゲ−ト回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58240104A JPS60130921A (ja) 1983-12-20 1983-12-20 多入力ｃｍｏｓゲ−ト回路

Publications (2)

Publication Number Publication Date
JPS60130921A JPS60130921A (ja) 1985-07-12
JPH0465571B2 true JPH0465571B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-10-20

Family

ID=17054546

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58240104A Granted JPS60130921A (ja) 1983-12-20 1983-12-20 多入力ｃｍｏｓゲ−ト回路

Country Status (1)

Country Link
JP (1) JPS60130921A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56107644A (en) * 1980-01-31 1981-08-26 Toshiba Corp Logical circuit
JPS58196729A (ja) * 1982-05-11 1983-11-16 Matsushita Electric Ind Co Ltd Ｃ―ｍｏｓ多入力ゲート回路

Also Published As

Publication number Publication date
JPS60130921A (ja) 1985-07-12

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