JPH045105Y2 - - Google Patents
Info
- Publication number
- JPH045105Y2 JPH045105Y2 JP17557087U JP17557087U JPH045105Y2 JP H045105 Y2 JPH045105 Y2 JP H045105Y2 JP 17557087 U JP17557087 U JP 17557087U JP 17557087 U JP17557087 U JP 17557087U JP H045105 Y2 JPH045105 Y2 JP H045105Y2
- Authority
- JP
- Japan
- Prior art keywords
- output
- vertical synchronization
- circuit
- oscillation
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000926 separation method Methods 0.000 claims description 23
- 230000010355 oscillation Effects 0.000 claims description 22
- 230000001360 synchronised effect Effects 0.000 claims description 9
- 230000003111 delayed effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 230000001172 regenerating effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17557087U JPH045105Y2 (en, 2012) | 1987-11-17 | 1987-11-17 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17557087U JPH045105Y2 (en, 2012) | 1987-11-17 | 1987-11-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63105964U JPS63105964U (en, 2012) | 1988-07-08 |
JPH045105Y2 true JPH045105Y2 (en, 2012) | 1992-02-13 |
Family
ID=31115017
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17557087U Expired JPH045105Y2 (en, 2012) | 1987-11-17 | 1987-11-17 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH045105Y2 (en, 2012) |
-
1987
- 1987-11-17 JP JP17557087U patent/JPH045105Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS63105964U (en, 2012) | 1988-07-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4812783A (en) | Phase locked loop circuit with quickly recoverable stability | |
US4520394A (en) | Horizontal scanning frequency multiplying circuit | |
US4772950A (en) | Method and apparatus for sampling and processing a video signal | |
JPS6051312B2 (ja) | 水平走査周波数逓倍回路 | |
JPH045105Y2 (en, 2012) | ||
JPH0523557B2 (en, 2012) | ||
JPS5989038A (ja) | フエ−ズ・ロツクド・ル−プ回路 | |
US4922118A (en) | Apparatus for increasing number of scanning lines | |
US4868686A (en) | Method and system for recording asynchronous biphase encoded data on a video tape recorder and for recovering the encoded recorded data | |
US4351000A (en) | Clock generator in PCM signal reproducing apparatus | |
JPS6120711Y2 (en, 2012) | ||
JPH01307317A (ja) | Pll回路 | |
JP2541124B2 (ja) | オ―ディオサンプリングクロック発生装置 | |
JPS6245336Y2 (en, 2012) | ||
JPS63111724A (ja) | クロツク再生位相同期回路 | |
JPH053463A (ja) | スタツフ多重通信受信回路 | |
JP2570722B2 (ja) | ビデオ信号測定装置 | |
JPS6336510Y2 (en, 2012) | ||
JPH0247653Y2 (en, 2012) | ||
JPH0632468B2 (ja) | 同期回路 | |
JPH0211048B2 (en, 2012) | ||
JPH01155571A (ja) | クロック発生回路 | |
JP3398393B2 (ja) | Pll回路および信号処理装置 | |
JPS6339988B2 (en, 2012) | ||
JPS583433B2 (ja) | テレビジヨンシンゴウサイセイホウシキ |