JPH0442730U - - Google Patents
Info
- Publication number
- JPH0442730U JPH0442730U JP8351590U JP8351590U JPH0442730U JP H0442730 U JPH0442730 U JP H0442730U JP 8351590 U JP8351590 U JP 8351590U JP 8351590 U JP8351590 U JP 8351590U JP H0442730 U JPH0442730 U JP H0442730U
- Authority
- JP
- Japan
- Prior art keywords
- power semiconductor
- die
- bonded
- semiconductor element
- heat spreader
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Die Bonding (AREA)
Description
第１図は本考案実施例の構成を示す平面図、第
２図および第３図は本考案実施例に用いられるヒ
ートスプレツダの構造を示す図でおのおのａは平
面図、ｂは正面図を示し、第４図ａは従来用いら
れたヒートスプレツダの構造を示す平面図、ｂは
その正面図である。 １……打ち抜き穴、２……電力半導体素子、３
……ヒートスプレツダ、４……溝、５……金属ベ
ース基板、６……端子、７……ワイヤーボンデイ
ング、８……ボンデイングパターン、９……導体
パターン。
２図および第３図は本考案実施例に用いられるヒ
ートスプレツダの構造を示す図でおのおのａは平
面図、ｂは正面図を示し、第４図ａは従来用いら
れたヒートスプレツダの構造を示す平面図、ｂは
その正面図である。 １……打ち抜き穴、２……電力半導体素子、３
……ヒートスプレツダ、４……溝、５……金属ベ
ース基板、６……端子、７……ワイヤーボンデイ
ング、８……ボンデイングパターン、９……導体
パターン。
Claims (1)
- 電力半導体素子がダイボンドされたヒートスプ
レツダが、金属ベース基板にハンダ付けされ、樹
脂により封止されてなる電力半導体装置において
、上記電力半導体素子がダイボンドされている部
分を除く上記ヒートスプレツダ上に貫通穴を設け
たことを特徴とする電力半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8351590U JP2505195Y2 (ja) | 1990-08-06 | 1990-08-06 | 電力半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8351590U JP2505195Y2 (ja) | 1990-08-06 | 1990-08-06 | 電力半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0442730U true JPH0442730U (ja) | 1992-04-10 |
| JP2505195Y2 JP2505195Y2 (ja) | 1996-07-24 |
Family
ID=31631246
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8351590U Expired - Fee Related JP2505195Y2 (ja) | 1990-08-06 | 1990-08-06 | 電力半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2505195Y2 (ja) |
-
1990
- 1990-08-06 JP JP8351590U patent/JP2505195Y2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2505195Y2 (ja) | 1996-07-24 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |