JPH0440799B2 - - Google Patents

Info

Publication number
JPH0440799B2
JPH0440799B2 JP57037405A JP3740582A JPH0440799B2 JP H0440799 B2 JPH0440799 B2 JP H0440799B2 JP 57037405 A JP57037405 A JP 57037405A JP 3740582 A JP3740582 A JP 3740582A JP H0440799 B2 JPH0440799 B2 JP H0440799B2
Authority
JP
Japan
Prior art keywords
terminal
integrated circuit
semiconductor memory
memory integrated
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57037405A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58154257A (ja
Inventor
Toshio Sasaki
Osamu Minato
Toshiaki Masuhara
Akira Yamamoto
Yukio Sasaki
Kotaro Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57037405A priority Critical patent/JPS58154257A/ja
Publication of JPS58154257A publication Critical patent/JPS58154257A/ja
Publication of JPH0440799B2 publication Critical patent/JPH0440799B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/006—Identification

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP57037405A 1982-03-10 1982-03-10 半導体メモリ集積回路装置 Granted JPS58154257A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57037405A JPS58154257A (ja) 1982-03-10 1982-03-10 半導体メモリ集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57037405A JPS58154257A (ja) 1982-03-10 1982-03-10 半導体メモリ集積回路装置

Publications (2)

Publication Number Publication Date
JPS58154257A JPS58154257A (ja) 1983-09-13
JPH0440799B2 true JPH0440799B2 (enrdf_load_stackoverflow) 1992-07-06

Family

ID=12496612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57037405A Granted JPS58154257A (ja) 1982-03-10 1982-03-10 半導体メモリ集積回路装置

Country Status (1)

Country Link
JP (1) JPS58154257A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3929327B2 (ja) 2002-03-01 2007-06-13 独立行政法人科学技術振興機構 軟磁性金属ガラス合金
JP2019149513A (ja) * 2018-02-28 2019-09-05 新日本無線株式会社 抵抗素子を形成するための中間体およびそれを用いた抵抗素子の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051199B2 (ja) * 1980-11-13 1985-11-12 富士通株式会社 半導体装置
JPS58115828A (ja) * 1981-12-29 1983-07-09 Fujitsu Ltd 半導体集積回路

Also Published As

Publication number Publication date
JPS58154257A (ja) 1983-09-13

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