JPH0438522Y2 - - Google Patents

Info

Publication number
JPH0438522Y2
JPH0438522Y2 JP1986118453U JP11845386U JPH0438522Y2 JP H0438522 Y2 JPH0438522 Y2 JP H0438522Y2 JP 1986118453 U JP1986118453 U JP 1986118453U JP 11845386 U JP11845386 U JP 11845386U JP H0438522 Y2 JPH0438522 Y2 JP H0438522Y2
Authority
JP
Japan
Prior art keywords
carrier
pattern
chip component
recess
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1986118453U
Other languages
English (en)
Japanese (ja)
Other versions
JPS6324838U (enFirst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986118453U priority Critical patent/JPH0438522Y2/ja
Publication of JPS6324838U publication Critical patent/JPS6324838U/ja
Application granted granted Critical
Publication of JPH0438522Y2 publication Critical patent/JPH0438522Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1986118453U 1986-08-01 1986-08-01 Expired JPH0438522Y2 (enFirst)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986118453U JPH0438522Y2 (enFirst) 1986-08-01 1986-08-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986118453U JPH0438522Y2 (enFirst) 1986-08-01 1986-08-01

Publications (2)

Publication Number Publication Date
JPS6324838U JPS6324838U (enFirst) 1988-02-18
JPH0438522Y2 true JPH0438522Y2 (enFirst) 1992-09-09

Family

ID=31004918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986118453U Expired JPH0438522Y2 (enFirst) 1986-08-01 1986-08-01

Country Status (1)

Country Link
JP (1) JPH0438522Y2 (enFirst)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3323958B2 (ja) * 1993-06-14 2002-09-09 ポリプラスチックス株式会社 モールド形電気部品の製造方法
US10971468B2 (en) 2016-11-21 2021-04-06 3M Innovative Properties Company Automatic registration between circuit dies and interconnects

Also Published As

Publication number Publication date
JPS6324838U (enFirst) 1988-02-18

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