JPH04372025A - Storage device with access bit - Google Patents

Abstract

PURPOSE:To enable the decision of the presence or absence of an access to the specific address by providing a memory cell for access bit equipped with the access bit storing the presence of the reading and writing. CONSTITUTION:A storage device 1 capable of reading and writing data by an address decoder 5 and a data 10 part 6 is provided with a control means composing its memory of a memory cell 2 for data performing the reading and writing of the data, a memory cell 3 for access bit equipped with the access bit to be allocated corresponding to the address of the memory 2, an access bit control part 8 turning On the access bit corresponding to the address receiving the read/write access, and a multiplexer 7 to be used at the time of the reference of the access bit.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a storage device with an access bit that can record in hardware whether or not a specific address has been accessed during software development and debugging.

0002

[Prior Art] When developing and debugging software, some kind of checking means is necessary. Conventionally, for this purpose, a parity bit or the like is built into a memory element, and a parity bit or the like is built into the memory element to detect changes in the bit. error
is detected and debugged.

For example, in Japanese Unexamined Patent Publication No. 2-195457, a parity data section is provided which generates parity data based on stored data during the process of accessing the memory and checks this parity data. A configuration is proposed.

However, although it is possible to detect errors with the check using parity data, it is not possible to perform a test to confirm whether or not a specific address in a program has been accessed. If it is possible to know whether or not a specific address in a program has been accessed, it becomes possible to identify the state in which the program was executed, the route taken in the event of an error, etc., which greatly facilitates software development and debugging. Be able to do it. Conventionally, debugging is performed by using debugging software to understand the contents of memory and analyze what the user is trying to do.

[0005]

However, the above-mentioned prior art has the inconvenience of having to prepare debugging software.

An object of the present invention has been made in view of the above-described actual state of the prior art, and provides a storage device that makes it possible to determine whether or not a specific address is being accessed without using debugging software or the like. It is about providing.

[0007]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a storage device equipped with a memory capable of reading/writing data, wherein the memory is capable of storing data. A memory cell for data that is read/written, a memory cell for access bits that has an access bit assigned corresponding to the address of this memory cell, and a memory cell for the access bit that corresponds to the address that has been accessed for read/write. control means for turning on the access bit to be accessed.

[0008]

[Operation] According to the above-mentioned means, an access bit is set for an address that has been accessed in the past.
This allows for later confirmation. Therefore, software development and debugging can be carried out efficiently. For example, it becomes possible to determine the route taken at the time of an error, check the status during execution, and perform program tests covering all slaps.

[0009]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a storage device according to the present invention.

The memory device 1 includes a memory 4 from a data memory cell 2 in which data is stored and an access bit memory cell 3, an address coder 5 for specifying an address to the memory 4, and a memory 4. A data IO unit 6 controls the input/output of data read from the memory, a multiplexer (MPX) 7 mixes and outputs data and access bits, and turns on/off access bits in the access bit memory cell 3.
The access bit control unit 8 is configured to include access bit control units 8 that control off.

The access bit memory cell 3 is set to "1" for addresses to which data has been accessed in the past.
is set and held at "0" if there is no access (read/write request). This access bit memory cell 3 is provided in hardware to each byte of the memory. In the above configuration, normal read/write (
Read/write to data memory cell 2) is performed by AS(
When the access bit select signal) is not input, CS
(chip select signal), RD (read signal), WR
This is performed by controlling the data IO control section 6 based on the write signal. At this time, the multiplexer 7 is set to connect between DO and DO.

Read/write to access bits is performed using CS (chip select signal) and RD (read signal) when AS (access bit select signal) is in the input state.
, the data IO control unit 6 based on WR (write signal).
This is done under the control of When AS (access bit select signal) is input, the access bit control unit 8 and data IO control unit 6 operate to select the data memory cell 2 (
dn to do) are controlled so that no reading or writing is performed, and the multiplexer 7
It is set to connect the two.

Furthermore, during normal read/write (read/write to data memory cell 2), an access bit attached to the accessed data memory cell is set to 1. .

Next, a method of using access bits will be explained.

After inputting AS and clearing all access bits to O, AS is made non-input. In this state, run the software C you want to debug. When a read/write access is made to address a of data memory cell 2 in software C, the access bit attached to data memory cell 2 at address a is set to 1. . If address b is not accessed in software C, the access bit attached to the data memory cell 2 at address b remains at O. After operating software C, by inputting AS and reading the state of the access bit, the history of where software C actually accessed can be found.

As shown above, according to the embodiments of the present invention, it is possible to efficiently develop and debug software, and specifically, it is possible to efficiently develop and debug software. It becomes possible to confirm, confirm the state in which the program was executed, and execute program tests.

[0018]

As explained above, the present invention provides a storage device equipped with a memory capable of reading/writing data, in which the memory is equipped with a memory capable of reading/writing data. - Turn on the memory cell for data, the memory cell for access bit that has an access bit assigned corresponding to the address of this memory cell, and the access bit corresponding to the address to which read/write access was performed. Since the configuration consists of a control means, the rules passed in the event of an error are
This makes it possible to confirm the execution status, check the execution state, and test the program, making it possible to develop and debug software efficiently.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of a storage device according to the present invention.

[Explanation of symbols]

1. Storage device 2. Data memory cell 3 Memory cell for access bit 4 Memory 5 Address recorder 6 Data IO section 7 Multiplexer 8 Access bit control section

Claims (1)

[Claims] 1. A storage device comprising a memory capable of reading/writing data, wherein the memory comprises a data memory cell for reading/writing data, and a memory cell for data reading/writing. It is characterized by comprising an access bit memory cell having an access bit assigned corresponding to the address of the cell, and a control means for turning on the access bit corresponding to the address accessed for read/write. A storage device with access bits.