JPH0434851B2 - - Google Patents

Info

Publication number
JPH0434851B2
JPH0434851B2 JP57109338A JP10933882A JPH0434851B2 JP H0434851 B2 JPH0434851 B2 JP H0434851B2 JP 57109338 A JP57109338 A JP 57109338A JP 10933882 A JP10933882 A JP 10933882A JP H0434851 B2 JPH0434851 B2 JP H0434851B2
Authority
JP
Japan
Prior art keywords
signal
output
circuit
pll circuit
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57109338A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59227A (ja
Inventor
Ryuichi Naito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP57109338A priority Critical patent/JPS59227A/ja
Priority to KR1019830002797A priority patent/KR860002215B1/ko
Publication of JPS59227A publication Critical patent/JPS59227A/ja
Priority to US06/744,649 priority patent/US4617527A/en
Publication of JPH0434851B2 publication Critical patent/JPH0434851B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/12—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a scanning signal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S331/00—Oscillators
    • Y10S331/02—Phase locked loop having lock indicating or detecting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP57109338A 1982-06-25 1982-06-25 Ｐｌｌ回路の引込制御装置 Granted JPS59227A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP57109338A JPS59227A (ja) 1982-06-25 1982-06-25 Ｐｌｌ回路の引込制御装置
KR1019830002797A KR860002215B1 (ko) 1982-06-25 1983-06-21 Pll 회로의 인입 제어장치
US06/744,649 US4617527A (en) 1982-06-25 1985-06-13 PU lock acquisition with scan restart upon false lock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57109338A JPS59227A (ja) 1982-06-25 1982-06-25 Ｐｌｌ回路の引込制御装置

Publications (2)

Publication Number Publication Date
JPS59227A JPS59227A (ja) 1984-01-05
JPH0434851B2 true JPH0434851B2 (en, 2012) 1992-06-09

Family

ID=14507689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57109338A Granted JPS59227A (ja) 1982-06-25 1982-06-25 Ｐｌｌ回路の引込制御装置

Country Status (3)

Country Link
US (1) US4617527A (en, 2012)
JP (1) JPS59227A (en, 2012)
KR (1) KR860002215B1 (en, 2012)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4580926A (en) * 1983-09-28 1986-04-08 Mobil Oil Corporation Foundation level and orientation tool
US4690536A (en) * 1985-09-09 1987-09-01 Minolta Camera Kabushiki Kaisha Exposure control device for a camera in flash photography
JPS63173928U (en, 2012) * 1987-04-30 1988-11-11
JP2692080B2 (ja) * 1987-06-09 1997-12-17 ソニー株式会社 Ａｆｃ回路
JP2844596B2 (ja) * 1987-07-17 1999-01-06 ソニー株式会社 Ｐｌｌ回路
JP2568110B2 (ja) * 1988-07-15 1996-12-25 パイオニア株式会社 フェーズロックドループ回路
US5049838A (en) * 1989-09-19 1991-09-17 The Boeing Company Minimum intrusion search oscillator for use in feedback loops
US5220293A (en) * 1991-12-19 1993-06-15 Sun Microsystems, Inc. High reliability phase-locked loop
US5210509A (en) * 1992-05-29 1993-05-11 Unisys Corporation Dual loop phase locked circuit with sweep generator and compensation for drift
DE10064476A1 (de) * 2000-12-22 2002-07-11 Atmel Germany Gmbh Verfahren zur Abstimmung einer PLL-Schaltung

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4000476A (en) * 1974-12-19 1976-12-28 Digital Communications Corporation Phase locked loop with circuit for preventing sidelock
US4077016A (en) * 1977-02-22 1978-02-28 Ncr Corporation Apparatus and method for inhibiting false locking of a phase-locked loop
US4423390A (en) * 1981-01-09 1983-12-27 Harris Corporation Side lock avoidance network for PSK demodulator
US4443769A (en) * 1981-04-27 1984-04-17 Rca Corporation Frequency search system for a phase locked loop

Also Published As

Publication number Publication date
KR840005291A (ko) 1984-11-05
US4617527A (en) 1986-10-14
KR860002215B1 (ko) 1986-12-31
JPS59227A (ja) 1984-01-05

Similar Documents

Publication Publication Date Title
JP3292521B2 (ja) 位相ロックループ及び復号回路
EP0057612B1 (en) Motor controlling circuit of reproducing apparatus and method of controlling
KR860001260B1 (ko) 디지탈 변조신호 판독장치에 있어서의 클록 발생용 pll의 록 검출 방식
JPH0434851B2 (en, 2012)
US4617526A (en) Sync responsive clock generator for digital demodulators
JP2000230947A (ja) デジタル位相制御ループにおける周波数検出方法
KR100422600B1 (ko) 재생장치및회전서보회로
US6757341B1 (en) Digital audio interface signal demodulating device
JP3434421B2 (ja) 離散的な記録長で変調記録されたデジタル情報を再生する装置
JPH0434768A (ja) クロツク抽出回路
JP3661893B2 (ja) 光ディスク再生装置
JPH0557774B2 (en, 2012)
JPH0465470B2 (en, 2012)
JP2675096B2 (ja) 再生信号補正方法
JP3772462B2 (ja) ディジタルｐｌｌ回路
JP2800772B2 (ja) クロック抽出回路
JP2565231B2 (ja) デジタルｐｌｌ回路
JPH06188924A (ja) Ｆｓｋ復調回路
JP2934113B2 (ja) 光ディスク用ｆｓｋ復調回路
JPH0135420B2 (en, 2012)
JPH0877715A (ja) ディジタル記録再生装置の復調装置
JPH0430104B2 (en, 2012)
JPH06188925A (ja) Ｆｓｋ復調回路
JPH09297969A (ja) 光ディスク装置
JPH09297968A (ja) ディジタルｐｌｌ回路