JPH0434673U - - Google Patents
Info
- Publication number
- JPH0434673U JPH0434673U JP7549490U JP7549490U JPH0434673U JP H0434673 U JPH0434673 U JP H0434673U JP 7549490 U JP7549490 U JP 7549490U JP 7549490 U JP7549490 U JP 7549490U JP H0434673 U JPH0434673 U JP H0434673U
- Authority
- JP
- Japan
- Prior art keywords
- output
- signal
- input
- gate
- decoder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7549490U JPH0434673U (enExample) | 1990-07-16 | 1990-07-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7549490U JPH0434673U (enExample) | 1990-07-16 | 1990-07-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0434673U true JPH0434673U (enExample) | 1992-03-23 |
Family
ID=31616120
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7549490U Pending JPH0434673U (enExample) | 1990-07-16 | 1990-07-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0434673U (enExample) |
-
1990
- 1990-07-16 JP JP7549490U patent/JPH0434673U/ja active Pending
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