JPH043368U - - Google Patents

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Publication number
JPH043368U
JPH043368U JP4436090U JP4436090U JPH043368U JP H043368 U JPH043368 U JP H043368U JP 4436090 U JP4436090 U JP 4436090U JP 4436090 U JP4436090 U JP 4436090U JP H043368 U JPH043368 U JP H043368U
Authority
JP
Japan
Prior art keywords
error rate
measuring device
input
rate measuring
input data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4436090U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4436090U priority Critical patent/JPH043368U/ja
Publication of JPH043368U publication Critical patent/JPH043368U/ja
Pending legal-status Critical Current

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  • Detection And Prevention Of Errors In Transmission (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の実施例を示すブロツク図、
第2図はそのレベル検出部27及び制御信号発生
部28の具体例を示すブロツク図、第3図は従来
の誤り率測定装置を示すブロツク図である。
Figure 1 is a block diagram showing an embodiment of this invention.
FIG. 2 is a block diagram showing a specific example of the level detecting section 27 and control signal generating section 28, and FIG. 3 is a block diagram showing a conventional error rate measuring device.

Claims (1)

【実用新案登録請求の範囲】 入力データと、これと同期したクロツクとを入
力し、その入力クロツクをタイミング基準として
上記入力データと基準データとを比較して誤り率
を測定する誤り率測定装置において、 上記入力クロツクの入力端子と上記誤り率測定
装置のロジツク部との間に通過周波数可変の帯域
通過炉波器が挿入されていることを特徴とする誤
り率測定装置。
[Claims for Utility Model Registration] In an error rate measuring device that receives input data and a clock synchronized with the input data, and measures the error rate by comparing the input data and reference data using the input clock as a timing reference. . An error rate measuring device, characterized in that a bandpass reactor having a variable pass frequency is inserted between an input terminal of the input clock and a logic section of the error rate measuring device.
JP4436090U 1990-04-25 1990-04-25 Pending JPH043368U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4436090U JPH043368U (en) 1990-04-25 1990-04-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4436090U JPH043368U (en) 1990-04-25 1990-04-25

Publications (1)

Publication Number Publication Date
JPH043368U true JPH043368U (en) 1992-01-13

Family

ID=31557591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4436090U Pending JPH043368U (en) 1990-04-25 1990-04-25

Country Status (1)

Country Link
JP (1) JPH043368U (en)

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